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/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx51-digi-connectcore-som.dtsi15 reg = <0x90000000 0x08000000>;
21 pinctrl-0 = <&pinctrl_ecspi1>;
25 pmic: mc13892@0 {
27 pinctrl-0 = <&pinctrl_mc13892>;
31 reg = <0>;
130 pinctrl-0 = <&pinctrl_esdhc1>;
137 pinctrl-0 = <&pinctrl_esdhc2>;
150 pinctrl-0 = <&pinctrl_fec>;
158 pinctrl-0 = <&pinctrl_i2c2>;
167 pinctrl-0 = <&pinctrl_mma7455l>;
[all …]
H A Dimx51-zii-scu3-esb.dts22 reg = <0x90000000 0>;
32 pinctrl-0 = <&pinctrl_usb_mmc_reset>;
44 pinctrl-0 = <&pinctrl_ecspi1>;
49 pmic@0 {
52 pinctrl-0 = <&pinctrl_pmic>;
55 reg = <0>;
153 #size-cells = <0>;
154 led-control = <0x0 0x0 0x3f83f8 0x0>;
181 pinctrl-0 = <&pinctrl_esdhc1>;
192 pinctrl-0 = <&pinctrl_esdhc4>;
[all …]
H A Dimx51-zii-scu2-mezz.dts22 reg = <0x90000000 0>;
32 pinctrl-0 = <&pinctrl_usb_mmc_reset>;
43 pinctrl-0 = <&pinctrl_swmdio>;
47 #size-cells = <0>;
49 switch@0 {
51 reg = <0>;
52 dsa,member = <0 0>;
61 #size-cells = <0>;
63 port@0 {
64 reg = <0>;
[all …]
H A Dimx51-zii-rdu1.dts21 reg = <0x90000000 0>;
31 #clock-cells = <0>;
38 pinctrl-0 = <&pinctrl_clk26mhz>;
40 #clock-cells = <0>;
47 pinctrl-0 = <&pinctrl_usbgate26mhz>;
49 #clock-cells = <0>;
56 pinctrl-0 = <&pinctrl_sndgate26mhz>;
58 #clock-cells = <0>;
81 pinctrl-0 = <&pinctrl_ipu_disp1>;
84 #size-cells = <0>;
[all …]
/linux/drivers/gpu/drm/amd/include/asic_reg/smu/
H A Dsmu_8_0_d.h27 #define ixTHM_TCON_CSR_CONFIG 0xd82014a4
28 #define ixTHM_TCON_CSR_DATA 0xd82014a8
29 #define ixTHM_TCON_HTC 0xd8200c64
30 #define ixTHM_TCON_CUR_TMP 0xd8200ca4
31 #define ixTHM_TCON_THERM_TRIP 0xd8200ce4
32 #define ixTHM_GPIO_PROCHOT_CTRL 0xd8200d00
33 #define ixTHM_GPIO_THERMTRIP_CTRL 0xd8200d04
34 #define ixTHM_THERMAL_INT_ENA 0xd8200d10
35 #define ixTHM_THERMAL_INT_CTRL 0xd8200d14
36 #define ixTHM_THERMAL_INT_STATUS 0xd8200d18
[all …]
H A Dsmu_7_1_1_d.h27 #define mmGCK_SMC_IND_INDEX 0x80
28 #define mmGCK0_GCK_SMC_IND_INDEX 0x80
29 #define mmGCK1_GCK_SMC_IND_INDEX 0x82
30 #define mmGCK2_GCK_SMC_IND_INDEX 0x84
31 #define mmGCK3_GCK_SMC_IND_INDEX 0x86
32 #define mmGCK_SMC_IND_DATA 0x81
33 #define mmGCK0_GCK_SMC_IND_DATA 0x81
34 #define mmGCK1_GCK_SMC_IND_DATA 0x83
35 #define mmGCK2_GCK_SMC_IND_DATA 0x85
36 #define mmGCK3_GCK_SMC_IND_DATA 0x87
[all …]
H A Dsmu_7_1_2_d.h27 #define mmGCK_SMC_IND_INDEX 0x80
28 #define mmGCK0_GCK_SMC_IND_INDEX 0x80
29 #define mmGCK1_GCK_SMC_IND_INDEX 0x82
30 #define mmGCK2_GCK_SMC_IND_INDEX 0x84
31 #define mmGCK3_GCK_SMC_IND_INDEX 0x86
32 #define mmGCK_SMC_IND_DATA 0x81
33 #define mmGCK0_GCK_SMC_IND_DATA 0x81
34 #define mmGCK1_GCK_SMC_IND_DATA 0x83
35 #define mmGCK2_GCK_SMC_IND_DATA 0x85
36 #define mmGCK3_GCK_SMC_IND_DATA 0x87
[all …]
H A Dsmu_7_1_3_d.h27 #define mmGCK_SMC_IND_INDEX 0x80
28 #define mmGCK0_GCK_SMC_IND_INDEX 0x80
29 #define mmGCK1_GCK_SMC_IND_INDEX 0x82
30 #define mmGCK2_GCK_SMC_IND_INDEX 0x84
31 #define mmGCK3_GCK_SMC_IND_INDEX 0x86
32 #define mmGCK_SMC_IND_DATA 0x81
33 #define mmGCK0_GCK_SMC_IND_DATA 0x81
34 #define mmGCK1_GCK_SMC_IND_DATA 0x83
35 #define mmGCK2_GCK_SMC_IND_DATA 0x85
36 #define mmGCK3_GCK_SMC_IND_DATA 0x87
[all …]
H A Dsmu_7_1_0_d.h27 #define mmGCK_SMC_IND_INDEX 0x80
28 #define mmGCK0_GCK_SMC_IND_INDEX 0x80
29 #define mmGCK1_GCK_SMC_IND_INDEX 0x82
30 #define mmGCK2_GCK_SMC_IND_INDEX 0x84
31 #define mmGCK3_GCK_SMC_IND_INDEX 0x86
32 #define mmGCK_SMC_IND_DATA 0x81
33 #define mmGCK0_GCK_SMC_IND_DATA 0x81
34 #define mmGCK1_GCK_SMC_IND_DATA 0x83
35 #define mmGCK2_GCK_SMC_IND_DATA 0x85
36 #define mmGCK3_GCK_SMC_IND_DATA 0x87
[all …]
H A Dsmu_7_0_1_d.h27 #define mmGCK_SMC_IND_INDEX 0x80
28 #define mmGCK0_GCK_SMC_IND_INDEX 0x80
29 #define mmGCK1_GCK_SMC_IND_INDEX 0x82
30 #define mmGCK2_GCK_SMC_IND_INDEX 0x84
31 #define mmGCK3_GCK_SMC_IND_INDEX 0x86
32 #define mmGCK_SMC_IND_DATA 0x81
33 #define mmGCK0_GCK_SMC_IND_DATA 0x81
34 #define mmGCK1_GCK_SMC_IND_DATA 0x83
35 #define mmGCK2_GCK_SMC_IND_DATA 0x85
36 #define mmGCK3_GCK_SMC_IND_DATA 0x87
[all …]
/linux/drivers/media/pci/tw686x/
H A Dtw686x-regs.h6 a0 + 8, a0 + 0xa, a0 + 0xc, a0 + 0xe})
7 #define REG8_8(a0) ((const u16[8]) { a0, a0 + 8, a0 + 0x10, a0 + 0x18, \
8 a0 + 0x20, a0 + 0x28, a0 + 0x30, \
9 a0 + 0x38})
10 #define INT_STATUS 0x00
11 #define PB_STATUS 0x01
12 #define DMA_CMD 0x02
13 #define VIDEO_FIFO_STATUS 0x03
14 #define VIDEO_CHANNEL_ID 0x04
15 #define VIDEO_PARSER_STATUS 0x05
[all …]
/linux/drivers/video/fbdev/
H A Dplatinumfb.h54 * F = 14.3MHz * c0 / (c1 & 0x1f) / (1 << (c1 >> 5))
55 * Newer ones use the values in clocksel[0], for which the formula
57 * F = 15MHz * c0 / ((c1 & 0x1f) + 2) / (1 << (c1 >> 5))
69 #define DIV2 0x20
70 #define DIV4 0x40
71 #define DIV8 0x60
72 #define DIV16 0x80
76 0x5c00,
78 { 0xffc, 4, 0, 0, 0, 0, 0x428, 0,
79 0, 0xb3, 0xd3, 0x12, 0x1a5, 0x23, 0x28, 0x2d,
[all …]
/linux/drivers/gpu/drm/radeon/
H A Dppsmc.h28 #define PPSMC_SWSTATE_FLAG_DC 0x01
29 #define PPSMC_SWSTATE_FLAG_UVD 0x02
30 #define PPSMC_SWSTATE_FLAG_VCE 0x04
31 #define PPSMC_SWSTATE_FLAG_PCIE_X1 0x08
33 #define PPSMC_THERMAL_PROTECT_TYPE_INTERNAL 0x00
34 #define PPSMC_THERMAL_PROTECT_TYPE_EXTERNAL 0x01
35 #define PPSMC_THERMAL_PROTECT_TYPE_NONE 0xff
37 #define PPSMC_SYSTEMFLAG_GPIO_DC 0x01
38 #define PPSMC_SYSTEMFLAG_STEPVDDC 0x02
39 #define PPSMC_SYSTEMFLAG_GDDR5 0x04
[all …]
/linux/drivers/gpu/drm/amd/pm/legacy-dpm/
H A Dppsmc.h28 #define PPSMC_SWSTATE_FLAG_DC 0x01
29 #define PPSMC_SWSTATE_FLAG_UVD 0x02
30 #define PPSMC_SWSTATE_FLAG_VCE 0x04
31 #define PPSMC_SWSTATE_FLAG_PCIE_X1 0x08
33 #define PPSMC_THERMAL_PROTECT_TYPE_INTERNAL 0x00
34 #define PPSMC_THERMAL_PROTECT_TYPE_EXTERNAL 0x01
35 #define PPSMC_THERMAL_PROTECT_TYPE_NONE 0xff
37 #define PPSMC_SYSTEMFLAG_GPIO_DC 0x01
38 #define PPSMC_SYSTEMFLAG_STEPVDDC 0x02
39 #define PPSMC_SYSTEMFLAG_GDDR5 0x04
[all …]
/linux/tools/perf/pmu-events/arch/arm64/fujitsu/a64fx/
H A Dother.json4 "EventCode": "0x139",
10 "EventCode": "0x180",
16 "EventCode": "0x181",
22 "EventCode": "0x182",
28 "EventCode": "0x183",
34 "EventCode": "0x184",
40 "EventCode": "0x185",
46 "EventCode": "0x186",
52 "EventCode": "0x187",
58 "EventCode": "0x188",
[all …]
/linux/drivers/leds/rgb/
H A Dleds-mt6370-rgb.c27 MT6370_LED_ISNK1 = 0,
35 MT6370_LED_PWM_MODE = 0,
42 F_RGB_EN = 0,
64 R_LED123_CURR = 0,
72 P_LED_TR1 = 0,
81 #define MT6370_REG_DEV_INFO 0x100
82 #define MT6370_REG_RGB1_DIM 0x182
83 #define MT6370_REG_RGB2_DIM 0x183
84 #define MT6370_REG_RGB3_DIM 0x184
85 #define MT6370_REG_RGB_EN 0x185
[all …]
/linux/drivers/gpu/drm/amd/pm/powerplay/inc/
H A Dsmu7_ppsmc.h30 #define PPSMC_MSG_SetGBDroopSettings ((uint16_t) 0x305)
32 #define PPSMC_SWSTATE_FLAG_DC 0x01
33 #define PPSMC_SWSTATE_FLAG_UVD 0x02
34 #define PPSMC_SWSTATE_FLAG_VCE 0x04
36 #define PPSMC_THERMAL_PROTECT_TYPE_INTERNAL 0x00
37 #define PPSMC_THERMAL_PROTECT_TYPE_EXTERNAL 0x01
38 #define PPSMC_THERMAL_PROTECT_TYPE_NONE 0xff
40 #define PPSMC_SYSTEMFLAG_GPIO_DC 0x01
41 #define PPSMC_SYSTEMFLAG_STEPVDDC 0x02
42 #define PPSMC_SYSTEMFLAG_GDDR5 0x04
[all …]
H A Dtonga_ppsmc.h29 #define PPSMC_SWSTATE_FLAG_DC 0x01
30 #define PPSMC_SWSTATE_FLAG_UVD 0x02
31 #define PPSMC_SWSTATE_FLAG_VCE 0x04
32 #define PPSMC_SWSTATE_FLAG_PCIE_X1 0x08
34 #define PPSMC_THERMAL_PROTECT_TYPE_INTERNAL 0x00
35 #define PPSMC_THERMAL_PROTECT_TYPE_EXTERNAL 0x01
36 #define PPSMC_THERMAL_PROTECT_TYPE_NONE 0xff
38 #define PPSMC_SYSTEMFLAG_GPIO_DC 0x01
39 #define PPSMC_SYSTEMFLAG_STEPVDDC 0x02
40 #define PPSMC_SYSTEMFLAG_GDDR5 0x04
[all …]
H A Dfiji_ppsmc.h30 #define PPSMC_SWSTATE_FLAG_DC 0x01
31 #define PPSMC_SWSTATE_FLAG_UVD 0x02
32 #define PPSMC_SWSTATE_FLAG_VCE 0x04
34 #define PPSMC_THERMAL_PROTECT_TYPE_INTERNAL 0x00
35 #define PPSMC_THERMAL_PROTECT_TYPE_EXTERNAL 0x01
36 #define PPSMC_THERMAL_PROTECT_TYPE_NONE 0xff
38 #define PPSMC_SYSTEMFLAG_GPIO_DC 0x01
39 #define PPSMC_SYSTEMFLAG_STEPVDDC 0x02
40 #define PPSMC_SYSTEMFLAG_GDDR5 0x04
42 #define PPSMC_SYSTEMFLAG_DISABLE_BABYSTEP 0x08
[all …]
/linux/drivers/media/usb/gspca/
H A Dstk1135.c51 if (gspca_dev->usb_err < 0) in reg_r()
52 return 0; in reg_r()
53 ret = usb_control_msg(dev, usb_rcvctrlpipe(dev, 0), in reg_r()
54 0x00, in reg_r()
56 0x00, in reg_r()
61 gspca_dbg(gspca_dev, D_USBI, "reg_r 0x%x=0x%02x\n", in reg_r()
62 index, gspca_dev->usb_buf[0]); in reg_r()
63 if (ret < 0) { in reg_r()
64 pr_err("reg_r 0x%x err %d\n", index, ret); in reg_r()
66 return 0; in reg_r()
[all …]
/linux/include/dt-bindings/input/
H A Dlinux-event-codes.h23 #define INPUT_PROP_POINTER 0x00 /* needs a pointer */
24 #define INPUT_PROP_DIRECT 0x01 /* direct input devices */
25 #define INPUT_PROP_BUTTONPAD 0x02 /* has button(s) under pad */
26 #define INPUT_PROP_SEMI_MT 0x03 /* touch rectangle only */
27 #define INPUT_PROP_TOPBUTTONPAD 0x04 /* softbuttons at top of pad */
28 #define INPUT_PROP_POINTING_STICK 0x05 /* is a pointing stick */
29 #define INPUT_PROP_ACCELEROMETER 0x06 /* has accelerometer */
30 #define INPUT_PROP_PRESSUREPAD 0x07 /* pressure triggers clicks */
32 #define INPUT_PROP_MAX 0x1f
39 #define EV_SYN 0x0
[all...]
/linux/include/uapi/linux/
H A Dinput-event-codes.h23 #define INPUT_PROP_POINTER 0x00 /* needs a pointer */
24 #define INPUT_PROP_DIRECT 0x01 /* direct input devices */
25 #define INPUT_PROP_BUTTONPAD 0x02 /* has button(s) under pad */
26 #define INPUT_PROP_SEMI_MT 0x03 /* touch rectangle only */
27 #define INPUT_PROP_TOPBUTTONPAD 0x04 /* softbuttons at top of pad */
28 #define INPUT_PROP_POINTING_STICK 0x05 /* is a pointing stick */
29 #define INPUT_PROP_ACCELEROMETER 0x06 /* has accelerometer */
30 #define INPUT_PROP_PRESSUREPAD 0x07 /* pressure triggers clicks */
32 #define INPUT_PROP_MAX 0x1f
39 #define EV_SYN 0x00
[all …]
/linux/include/linux/mfd/madera/
H A Dregisters.h14 #define MADERA_SOFTWARE_RESET 0x00
15 #define MADERA_HARDWARE_REVISION 0x01
16 #define MADERA_CTRL_IF_CFG_1 0x08
17 #define MADERA_CTRL_IF_CFG_2 0x09
18 #define MADERA_CTRL_IF_CFG_3 0x0A
19 #define MADERA_WRITE_SEQUENCER_CTRL_0 0x16
20 #define MADERA_WRITE_SEQUENCER_CTRL_1 0x17
21 #define MADERA_WRITE_SEQUENCER_CTRL_2 0x18
22 #define MADERA_TONE_GENERATOR_1 0x20
23 #define MADERA_TONE_GENERATOR_2 0x21
[all …]
/linux/drivers/gpu/drm/amd/include/asic_reg/gmc/
H A Dgmc_7_1_d.h27 #define mmMC_CONFIG 0x800
28 #define mmMC_ARB_AGE_CNTL 0x9bf
29 #define mmMC_ARB_RET_CREDITS2 0x9c0
30 #define mmMC_ARB_FED_CNTL 0x9c1
31 #define mmMC_ARB_GECC2_STATUS 0x9c2
32 #define mmMC_ARB_GECC2_MISC 0x9c3
33 #define mmMC_ARB_GECC2_DEBUG 0x9c4
34 #define mmMC_ARB_GECC2_DEBUG2 0x9c5
35 #define mmMC_ARB_PERF_CID 0x9c6
36 #define mmMC_ARB_GECC2 0x9c9
[all …]
/linux/include/sound/
H A Dsdca_function.h4 * https://www.mipi.org/mipi-sdca-v1-0-download
65 * SDCA Function Types from SDCA specification v1.0a Section 5.1.2
73 SDCA_FUNCTION_TYPE_SMART_AMP = 0x01,
74 SDCA_FUNCTION_TYPE_SIMPLE_AMP = 0x02,
75 SDCA_FUNCTION_TYPE_SMART_MIC = 0x03,
76 SDCA_FUNCTION_TYPE_SIMPLE_MIC = 0x04,
77 SDCA_FUNCTION_TYPE_SPEAKER_MIC = 0x05,
78 SDCA_FUNCTION_TYPE_UAJ = 0x06,
79 SDCA_FUNCTION_TYPE_RJ = 0x07,
80 SDCA_FUNCTION_TYPE_SIMPLE_JACK = 0x08,
[all …]

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