Lines Matching +full:0 +full:x185
22 reg = <0x90000000 0x10000000>;
38 pinctrl-0 = <&pinctrl_enable_lcd>;
48 pwms = <&pwm1 0 78770 0>;
49 brightness-levels = <0 150 200 255>;
58 pinctrl-0 = <&pinctrl_lcd>;
69 vback-porch = <0>;
70 vfront-porch = <0>;
85 pinctrl-0 = <&pinctrl_esdhc1>;
86 cd-gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
93 pinctrl-0 = <&pinctrl_fec>;
102 pinctrl-0 = <&pinctrl_i2c2>;
107 reg = <0x68>;
117 pinctrl-0 = <&pinctrl_pwm_backlight>;
123 pinctrl-0 = <&pinctrl_uart1>;
129 pinctrl-0 = <&pinctrl_uart2>;
135 pinctrl-0 = <&pinctrl_uart3>;
141 pinctrl-0 = <&pinctrl_weim>;
144 fpga@0 {
146 fsl,weim-cs-timing = <0x0061008F 0x00000002 0x1c022000
147 0x00000000 0x1c092480 0x00000000>;
148 reg = <0 0x0000000 0x1d000>;
151 ranges = <0 0 0 0x1d000>;
155 reg = <0x10000 0x3d>;
160 syscon = <&syscon 0xe>;
166 reg = <0x12000 0x1000>;
167 syscon = <&syscon 0x10 6>;
172 reg = <0x15000 0x1000>;
174 pinctrl-0 = <&pinctrl_interrupt_fpga>;
183 reg = <0x1a000 0x100>;
187 nxp,tx-output-config = <0x06>;
196 MX51_PAD_CSPI1_MISO__ECSPI1_MISO 0x185
197 MX51_PAD_CSPI1_MOSI__ECSPI1_MOSI 0x185
198 MX51_PAD_CSPI1_SCLK__ECSPI1_SCLK 0x185
199 MX51_PAD_CSPI1_SS0__GPIO4_24 0x85 /* CS0 */
205 MX51_PAD_CSI2_D12__GPIO4_9 0x1c5
211 MX51_PAD_SD1_CMD__SD1_CMD 0x400020d5
212 MX51_PAD_SD1_CLK__SD1_CLK 0x20d5
213 MX51_PAD_SD1_DATA0__SD1_DATA0 0x20d5
214 MX51_PAD_SD1_DATA1__SD1_DATA1 0x20d5
215 MX51_PAD_SD1_DATA2__SD1_DATA2 0x20d5
216 MX51_PAD_SD1_DATA3__SD1_DATA3 0x20d5
217 MX51_PAD_GPIO1_0__GPIO1_0 0x100
218 MX51_PAD_GPIO1_1__GPIO1_1 0x100
224 MX51_PAD_EIM_EB2__FEC_MDIO 0x000001f5
225 MX51_PAD_EIM_EB3__FEC_RDATA1 0x00000085
226 MX51_PAD_EIM_CS2__FEC_RDATA2 0x00000085
227 MX51_PAD_EIM_CS3__FEC_RDATA3 0x00000085
228 MX51_PAD_EIM_CS4__FEC_RX_ER 0x00000180
229 MX51_PAD_EIM_CS5__FEC_CRS 0x00000180
230 MX51_PAD_DISP2_DAT10__FEC_COL 0x00000180
231 MX51_PAD_DISP2_DAT11__FEC_RX_CLK 0x00000180
232 MX51_PAD_DISP2_DAT14__FEC_RDATA0 0x00002180
233 MX51_PAD_DISP2_DAT15__FEC_TDATA0 0x00002004
234 MX51_PAD_NANDF_CS2__FEC_TX_ER 0x00002004
235 MX51_PAD_DI2_PIN2__FEC_MDC 0x00002004
236 MX51_PAD_DISP2_DAT6__FEC_TDATA1 0x00002004
237 MX51_PAD_DISP2_DAT7__FEC_TDATA2 0x00002004
238 MX51_PAD_DISP2_DAT8__FEC_TDATA3 0x00002004
239 MX51_PAD_DISP2_DAT9__FEC_TX_EN 0x00002004
240 MX51_PAD_DISP2_DAT13__FEC_TX_CLK 0x00002180
241 MX51_PAD_DISP2_DAT12__FEC_RX_DV 0x000020a4
242 MX51_PAD_EIM_A20__GPIO2_14 0x00000085 /* Phy Reset */
248 MX51_PAD_KEY_COL4__I2C2_SCL 0x400001ed
249 MX51_PAD_KEY_COL5__I2C2_SDA 0x400001ed
255 MX51_PAD_EIM_D27__GPIO2_9 0xe5
261 MX51_PAD_DISP1_DAT0__DISP1_DAT0 0x5
262 MX51_PAD_DISP1_DAT1__DISP1_DAT1 0x5
263 MX51_PAD_DISP1_DAT2__DISP1_DAT2 0x5
264 MX51_PAD_DISP1_DAT3__DISP1_DAT3 0x5
265 MX51_PAD_DISP1_DAT4__DISP1_DAT4 0x5
266 MX51_PAD_DISP1_DAT5__DISP1_DAT5 0x5
267 MX51_PAD_DISP1_DAT6__DISP1_DAT6 0x5
268 MX51_PAD_DISP1_DAT7__DISP1_DAT7 0x5
269 MX51_PAD_DISP1_DAT8__DISP1_DAT8 0x5
270 MX51_PAD_DISP1_DAT9__DISP1_DAT9 0x5
271 MX51_PAD_DISP1_DAT10__DISP1_DAT10 0x5
272 MX51_PAD_DISP1_DAT11__DISP1_DAT11 0x5
273 MX51_PAD_DISP1_DAT12__DISP1_DAT12 0x5
274 MX51_PAD_DISP1_DAT13__DISP1_DAT13 0x5
275 MX51_PAD_DISP1_DAT14__DISP1_DAT14 0x5
276 MX51_PAD_DISP1_DAT15__DISP1_DAT15 0x5
277 MX51_PAD_DISP1_DAT16__DISP1_DAT16 0x5
278 MX51_PAD_DISP1_DAT17__DISP1_DAT17 0x5
279 MX51_PAD_DISP1_DAT18__DISP1_DAT18 0x5
280 MX51_PAD_DISP1_DAT19__DISP1_DAT19 0x5
281 MX51_PAD_DISP1_DAT20__DISP1_DAT20 0x5
282 MX51_PAD_DISP1_DAT21__DISP1_DAT21 0x5
283 MX51_PAD_DISP1_DAT22__DISP1_DAT22 0x5
284 MX51_PAD_DISP1_DAT23__DISP1_DAT23 0x5
285 MX51_PAD_DI1_PIN2__DI1_PIN2 0x5
286 MX51_PAD_DI1_PIN3__DI1_PIN3 0x5
287 MX51_PAD_DI2_DISP_CLK__DI2_DISP_CLK 0x5
288 MX51_PAD_DI_GP4__DI2_PIN15 0x5
294 MX51_PAD_GPIO1_2__PWM1_PWMO 0x80000000
300 MX51_PAD_UART1_RXD__UART1_RXD 0x1c5
301 MX51_PAD_UART1_TXD__UART1_TXD 0x1c5
307 MX51_PAD_UART2_RXD__UART2_RXD 0x1c5
308 MX51_PAD_UART2_TXD__UART2_TXD 0x1c5
314 MX51_PAD_EIM_D25__UART3_RXD 0x1c5
315 MX51_PAD_EIM_D26__UART3_TXD 0x1c5
321 MX51_PAD_EIM_DTACK__EIM_DTACK 0x85
322 MX51_PAD_EIM_CS0__EIM_CS0 0x0
323 MX51_PAD_EIM_CS1__EIM_CS1 0x0
324 MX51_PAD_EIM_EB0__EIM_EB0 0x85
325 MX51_PAD_EIM_EB1__EIM_EB1 0x85
326 MX51_PAD_EIM_OE__EIM_OE 0x85
327 MX51_PAD_EIM_LBA__EIM_LBA 0x85