Searched +full:0 +full:x18300000 (Results 1 – 7 of 7) sorted by relevance
23 reg = <0x18300000 0x100000>;24 interrupts = <0 170 0>;35 qcom,ee = <0>;44 3. CRCI assignment, if applicable. If no CRCI flow control is required, use 0.53 pinctrl-0 = <&spi_pins>;56 cs-gpios = <&qcom_pinmux 20 0>;
59 minimum: 082 reg = <0x18300000 0x100000>;83 interrupts = <0 170 0>;96 qcom,ee = <0>;
34 reg = <0x60000000 0x10000000>;65 flash@0 {67 reg = <0x0 0x04000000>;68 pinctrl-0 = <&flash_pins>;77 partition@0 {79 reg = <0x00000000 0x00040000>;84 reg = <0x00040000 0x00040000>;89 reg = <0x00080000 0x03f80000>;96 reg = <0x18300000 0x1000>;99 interrupts-extended = <&irqpin 0 IRQ_TYPE_EDGE_FALLING>;[all …]
21 #clock-cells = <0>;26 #clock-cells = <0>;32 #size-cells = <0>;34 cpu0: cpu@0 {37 reg = <0x0>;47 reg = <0x1>;57 reg = <0x2>;67 reg = <0x3>;84 qcom,dload-mode = <&tcsr 0x6100>;91 reg = <0x0 0x40000000 0x0 0x0>;[all …]
26 #clock-cells = <0>;31 #clock-cells = <0>;37 #clock-cells = <0>;42 #clock-cells = <0>;48 #size-cells = <0>;50 cpu0: cpu@0 {53 reg = <0x0>;66 reg = <0x1>;79 reg = <0x2>;92 reg = <0x3>;[all …]
23 #size-cells = <0>;25 cpu0: cpu@0 {29 reg = <0>;54 polling-delay-passive = <0>;55 polling-delay = <0>;56 thermal-sensors = <&tsens 0>;74 polling-delay-passive = <0>;75 polling-delay = <0>;94 polling-delay-passive = <0>;95 polling-delay = <0>;[all …]
1 0x00 = 0x000000002 0x01 = 0x010000003 0x02 = 0x020000004 0x03 = 0x030000005 0x04 = 0x040000006 0x05 = 0x050000007 0x06 = 0x060000008 0x07 = 0x070000009 0x08 = 0x0800000010 0x09 = 0x09000000[all …]