| /linux/Documentation/devicetree/bindings/ata/ |
| H A D | fsl,pq-sata.yaml | 38 1 for controller @ 0x18000 39 2 for controller @ 0x19000 40 3 for controller @ 0x1a000 41 4 for controller @ 0x1b000 55 reg = <0x18000 0x1000>;
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| /linux/arch/powerpc/boot/dts/fsl/ |
| H A D | pq3-sata2-0.dtsi | 2 * PQ3 SATAv2 device tree stub [ controller @ offset 0x18000 ] 37 reg = <0x18000 0x1000>; 39 interrupts = <74 0x2 0 0>;
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| H A D | b4si-post.dtsi | 37 alloc-ranges = <0 0 0x10000 0>; 42 alloc-ranges = <0 0 0x10000 0>; 47 alloc-ranges = <0 0 0x10000 0>; 54 interrupts = <25 2 0 0>; 57 /* controller at 0x200000 */ 63 bus-range = <0x0 0xff>; 64 interrupts = <20 2 0 0>; 66 pcie@0 { 71 reg = <0 0 0 0 0>; 72 interrupts = <20 2 0 0>; [all …]
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| H A D | t2081si-post.dtsi | 37 alloc-ranges = <0 0 0x10000 0>; 42 alloc-ranges = <0 0 0x10000 0>; 47 alloc-ranges = <0 0 0x10000 0>; 54 interrupts = <25 2 0 0>; 57 /* controller at 0x240000 */ 59 compatible = "fsl,t2080-pcie", "fsl,qoriq-pcie-v3.0", "fsl,qoriq-pcie"; 63 bus-range = <0x0 0xff>; 64 interrupts = <20 2 0 0>; 66 pcie@0 { 67 reg = <0 0 0 0 0>; [all …]
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| H A D | t1040si-post.dtsi | 39 alloc-ranges = <0 0 0x10000 0>; 44 alloc-ranges = <0 0 0x10000 0>; 49 alloc-ranges = <0 0 0x10000 0>; 56 interrupts = <25 2 0 0>; 64 bus-range = <0x0 0xff>; 65 interrupts = <20 2 0 0>; 67 pcie@0 { 68 reg = <0 0 0 0 0>; 73 interrupts = <20 2 0 0>; 74 interrupt-map-mask = <0xf800 0 0 7>; [all …]
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| H A D | qoriq-bman1-portals.dtsi | 40 bman-portal@0 { 42 reg = <0x0 0x4000>, <0x100000 0x1000>; 43 interrupts = <105 2 0 0>; 47 reg = <0x4000 0x4000>, <0x101000 0x1000>; 48 interrupts = <107 2 0 0>; 52 reg = <0x8000 0x4000>, <0x102000 0x1000>; 53 interrupts = <109 2 0 0>; 57 reg = <0xc000 0x4000>, <0x103000 0x1000>; 58 interrupts = <111 2 0 0>; 62 reg = <0x10000 0x4000>, <0x104000 0x1000>; [all …]
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| /linux/sound/pci/au88x0/ |
| H A D | au88x0_a3d.h | 18 #define HRTF_SZ 0x38 19 #define DLINE_SZ 0x28 48 #define A3D_A_HrtfCurrent 0x18000 /* 56 ULONG */ 49 #define A3D_A_GainCurrent 0x180E0 50 #define A3D_A_GainTarget 0x180E4 51 #define A3D_A_A12Current 0x180E8 /* Atmospheric current. */ 52 #define A3D_A_A21Target 0x180EC /* Atmospheric target */ 53 #define A3D_A_B01Current 0x180F0 /* Atmospheric current */ 54 #define A3D_A_B10Target 0x180F4 /* Atmospheric target */ 55 #define A3D_A_B2Current 0x180F8 /* Atmospheric current */ [all …]
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| /linux/arch/arm/boot/dts/marvell/ |
| H A D | armada-390.dtsi | 19 reg = <0x18000 0x20>;
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| H A D | armada-398.dtsi | 19 reg = <0x18000 0x20>; 24 reg = <0xe0000 0x2000>;
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| H A D | armada-395.dtsi | 19 reg = <0x18000 0x20>; 24 reg = <0xa8000 0x2000>; 32 reg = <0xf0000 0x4000>,<0xf4000 0x4000>;
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| /linux/Documentation/devicetree/bindings/powerpc/fsl/ |
| H A D | ccf.txt | 42 reg = <0x18000 0x1000>;
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| /linux/drivers/gpu/drm/nouveau/nvkm/subdev/instmem/ |
| H A D | nv04.c | 51 nvkm_wr32(device, 0x700000 + iobj->node->offset + offset, data); in nv04_instobj_wr32() 59 return nvkm_rd32(device, 0x700000 + iobj->node->offset + offset); in nv04_instobj_rd32() 78 return device->pri + 0x700000 + iobj->node->offset; in nv04_instobj_acquire() 137 ret = nvkm_mm_head(&imem->heap, 0, 1, size, size, align ? align : 1, &iobj->node); in nv04_instobj_new() 149 return nvkm_rd32(imem->subdev.device, 0x700000 + addr); in nv04_instmem_rd32() 155 nvkm_wr32(imem->subdev.device, 0x700000 + addr, data); in nv04_instmem_wr32() 197 return 0; in nv04_instmem_suspend() 210 ret = nvkm_mm_init(&imem->heap, 0, 0, imem->base.reserved, 1); in nv04_instmem_oneinit() 214 /* 0x00000-0x10000: reserve for probable vbios image */ in nv04_instmem_oneinit() 215 ret = nvkm_memory_new(device, NVKM_MEM_TARGET_INST, 0x10000, 0, false, in nv04_instmem_oneinit() [all …]
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| /linux/tools/perf/pmu-events/arch/x86/icelakex/ |
| H A D | other.json | 4 "Counter": "0,1,2,3", 5 "EventCode": "0x28", 7 …s where the core was running with power-delivery for baseline license level 0. This includes non-… 9 "UMask": "0x7" 13 "Counter": "0,1,2,3", 14 "EventCode": "0x28", 18 "UMask": "0x18" 22 "Counter": "0,1,2,3", 23 "EventCode": "0x28", 27 "UMask": "0x20" [all …]
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| /linux/tools/perf/pmu-events/arch/x86/icelake/ |
| H A D | other.json | 4 "Counter": "0,1,2,3", 5 "EventCode": "0x28", 7 …s where the core was running with power-delivery for baseline license level 0. This includes non-… 9 "UMask": "0x7" 13 "Counter": "0,1,2,3", 14 "EventCode": "0x28", 18 "UMask": "0x18" 22 "Counter": "0,1,2,3", 23 "EventCode": "0x28", 27 "UMask": "0x20" [all …]
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| /linux/tools/perf/pmu-events/arch/x86/rocketlake/ |
| H A D | other.json | 4 "Counter": "0,1,2,3", 5 "EventCode": "0x28", 7 …s where the core was running with power-delivery for baseline license level 0. This includes non-… 9 "UMask": "0x7" 13 "Counter": "0,1,2,3", 14 "EventCode": "0x28", 18 "UMask": "0x18" 22 "Counter": "0,1,2,3", 23 "EventCode": "0x28", 27 "UMask": "0x20" [all …]
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| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | jpeg_v4_0_3.h | 27 #define regUVD_JRBC_EXTERNAL_REG_INTERNAL_OFFSET 0x1bfff 28 #define regUVD_JPEG_GPCOM_CMD_INTERNAL_OFFSET 0x404d 29 #define regUVD_JPEG_GPCOM_DATA0_INTERNAL_OFFSET 0x404e 30 #define regUVD_JPEG_GPCOM_DATA1_INTERNAL_OFFSET 0x404f 31 #define regUVD_LMI_JRBC_RB_MEM_WR_64BIT_BAR_LOW_INTERNAL_OFFSET 0x40ab 32 #define regUVD_LMI_JRBC_RB_MEM_WR_64BIT_BAR_HIGH_INTERNAL_OFFSET 0x40ac 33 #define regUVD_LMI_JRBC_IB_VMID_INTERNAL_OFFSET 0x40a4 34 #define regUVD_LMI_JPEG_VMID_INTERNAL_OFFSET 0x40a6 35 #define regUVD_LMI_JRBC_IB_64BIT_BAR_LOW_INTERNAL_OFFSET 0x40b6 36 #define regUVD_LMI_JRBC_IB_64BIT_BAR_HIGH_INTERNAL_OFFSET 0x40b7 [all …]
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| /linux/drivers/dma/amd/qdma/ |
| H A D | qdma-comm-regs.c | 12 [QDMA_REGO_CTXT_DATA] = QDMA_REGO(0x804, 8), 13 [QDMA_REGO_CTXT_CMD] = QDMA_REGO(0x844, 1), 14 [QDMA_REGO_CTXT_MASK] = QDMA_REGO(0x824, 8), 15 [QDMA_REGO_MM_H2C_CTRL] = QDMA_REGO(0x1004, 1), 16 [QDMA_REGO_MM_C2H_CTRL] = QDMA_REGO(0x1204, 1), 17 [QDMA_REGO_QUEUE_COUNT] = QDMA_REGO(0x120, 1), 18 [QDMA_REGO_RING_SIZE] = QDMA_REGO(0x204, 1), 19 [QDMA_REGO_H2C_PIDX] = QDMA_REGO(0x18004, 1), 20 [QDMA_REGO_C2H_PIDX] = QDMA_REGO(0x18008, 1), 21 [QDMA_REGO_INTR_CIDX] = QDMA_REGO(0x18000, 1), [all …]
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| /linux/drivers/gpu/drm/imx/dcss/ |
| H A D | dcss-drv.c | 40 int err = 0; in dcss_drv_platform_probe() 46 remote = of_graph_get_remote_node(dev->of_node, 0, 0); in dcss_drv_platform_probe() 71 return 0; in dcss_drv_platform_probe() 97 .blkctl_ofs = 0x2F000, 98 .ctxld_ofs = 0x23000, 99 .dtg_ofs = 0x20000, 100 .scaler_ofs = 0x1C000, 101 .ss_ofs = 0x1B000, 102 .dpr_ofs = 0x18000,
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| /linux/drivers/net/ethernet/intel/fm10k/ |
| H A D | fm10k_mbx.h | 14 #define FM10K_MBMEM(_n) ((_n) + 0x18000) 15 #define FM10K_MBMEM_VF(_n, _m) (((_n) * 0x10) + (_m) + 0x18000) 16 #define FM10K_MBMEM_SM(_n) ((_n) + 0x18400) 17 #define FM10K_MBMEM_PF(_n) ((_n) + 0x18600) 19 #define FM10K_MBMEM_PF_XOR (FM10K_MBMEM_SM(0) ^ FM10K_MBMEM_PF(0)) 20 #define FM10K_MBX(_n) ((_n) + 0x18800) 21 #define FM10K_MBX_REQ 0x00000002 22 #define FM10K_MBX_ACK 0x00000004 23 #define FM10K_MBX_REQ_INTERRUPT 0x00000008 24 #define FM10K_MBX_ACK_INTERRUPT 0x00000010 [all …]
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| /linux/arch/arc/boot/dts/ |
| H A D | vdk_axs10x_mb.dtsi | 13 ranges = <0x00000000 0xe0000000 0x10000000>; 20 #clock-cells = <0>; 26 #clock-cells = <0>; 30 #clock-cells = <0>; 39 reg = < 0x18000 0x2000 >; 43 snps,phy-addr = < 0 >; // VDK model phy address is 0 51 reg = < 0x40000 0x100 >; 57 reg = <0x20000 0x100>; 67 reg = <0x21000 0x100>; 77 reg = <0x22000 0x100>; [all …]
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| /linux/drivers/net/wireless/intel/iwlwifi/cfg/ |
| H A D | rf-jf.c | 29 #define IWL_JF_NVM_VERSION 0x0a1d 32 #define IWL9000_DCCM_OFFSET 0x800000 33 #define IWL9000_DCCM_LEN 0x18000 34 #define IWL9000_DCCM2_OFFSET 0x880000 35 #define IWL9000_DCCM2_LEN 0x8000
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| /linux/drivers/media/dvb-frontends/ |
| H A D | bsbe1.h | 12 0x01, 0x15, /* XTAL = 4MHz, VCO = 352 MHz */ 13 0x02, 0x30, /* MCLK = 88 MHz */ 14 0x03, 0x00, /* ACR output 0 */ 15 0x04, 0x7d, /* F22FR = 0x7d, F22 = f_VCO / 128 / 0x7d = 22 kHz */ 16 0x05, 0x05, /* I2CT = 0, SCLT = 1, SDAT = 1 */ 17 0x06, 0x00, /* DAC output 0 */ 18 0x08, 0x40, /* DiSEqC off, LNB power on OP2/LOCK pin on */ 19 0x09, 0x00, /* FIFO */ 20 0x0c, 0x51, /* OP1/OP0 normal, val = 1 (LNB power on) */ 21 0x0d, 0x82, /* DC offset compensation = on, beta_agc1 = 2 */ [all …]
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| /linux/drivers/gpu/drm/msm/disp/mdp5/ |
| H A D | mdp5_cfg.c | 22 0, 35 .base = { 0x00500, 0x00600, 0x00700, 0x00800, 0x00900 }, 36 .flush_hw_mask = 0x0003ffff, 40 .base = { 0x01100, 0x01500, 0x01900 }, 45 0, 49 .base = { 0x01d00, 0x02100, 0x02500 }, 53 0, 57 .base = { 0x02900, 0x02d00 }, 60 0, 64 .base = { 0x03100, 0x03500, 0x03900, 0x03d00, 0x04100 }, [all …]
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| /linux/drivers/net/wireless/ath/ath10k/ |
| H A D | coredump.c | 21 {0x800, 0x810}, 22 {0x820, 0x82C}, 23 {0x830, 0x8F4}, 24 {0x90C, 0x91C}, 25 {0xA14, 0xA18}, 26 {0xA84, 0xA94}, 27 {0xAA8, 0xAD4}, 28 {0xADC, 0xB40}, 29 {0x1000, 0x10A4}, 30 {0x10BC, 0x111C}, [all …]
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| /linux/drivers/media/pci/intel/ipu6/ |
| H A D | ipu6-platform-isys-csi2-reg.h | 9 #define CSI_REG_BASE 0x220000 10 #define CSI_REG_PORT_BASE(id) (CSI_REG_BASE + (id) * 0x1000) 13 #define CSI_REG_PORT_GPREG_SRST 0x0 14 #define CSI_REG_PORT_GPREG_CSI2_SLV_REG_SRST 0x4 15 #define CSI_REG_PORT_GPREG_CSI2_PORT_CONTROL 0x8 24 #define CSI_PORT_REG_BASE_IRQ_CSI 0x80 25 #define CSI_PORT_REG_BASE_IRQ_CSI_SYNC 0xA0 26 #define CSI_PORT_REG_BASE_IRQ_S2M_SIDS0TOS7 0xC0 27 #define CSI_PORT_REG_BASE_IRQ_S2M_SIDS8TOS15 0xE0 29 #define CSI_PORT_REG_BASE_IRQ_EDGE_OFFSET 0x0 [all …]
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