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Searched +full:0 +full:x15820000 (Results 1 – 5 of 5) sorted by relevance

/linux/Documentation/devicetree/bindings/crypto/
H A Dnvidia,tegra234-se-aes.yaml47 reg = <0x15820000 0x10000>;
/linux/Documentation/devicetree/bindings/clock/
H A Dmediatek,mt8192-clock.yaml56 reg = <0x10720000 0x1000>;
63 reg = <0x11007000 0x1000>;
70 reg = <0x11cb1000 0x1000>;
77 reg = <0x11d03000 0x1000>;
84 reg = <0x11d23000 0x1000>;
91 reg = <0x11e01000 0x1000>;
98 reg = <0x11f02000 0x1000>;
105 reg = <0x11f10000 0x1000>;
112 reg = <0x13fbf000 0x1000>;
119 reg = <0x15020000 0x1000>;
[all …]
/linux/arch/arm64/boot/dts/renesas/
H A Dr9a09g057.dtsi19 #clock-cells = <0>;
21 clock-frequency = <0>;
31 cluster0_opp: opp-table-0 {
59 #size-cells = <0>;
61 cpu0: cpu@0 {
63 reg = <0>;
74 reg = <0x100>;
85 reg = <0x200>;
96 reg = <0x300>;
105 L3_CA55: cache-controller-0 {
[all...]
H A Dr9a09g056.dtsi12 /* RZV2N_Px = Offset address of PFC_P_mn - 0x20 */
13 #define RZV2N_P0 0
37 #clock-cells = <0>;
39 clock-frequency = <0>;
49 cluster0_opp: opp-table-0 {
77 #size-cells = <0>;
79 cpu0: cpu@0 {
81 reg = <0>;
92 reg = <0x100>;
103 reg = <0x20
[all...]
/linux/drivers/soc/tegra/cbb/
H A Dtegra194-cbb.c27 #define ERRLOGGER_0_ID_COREID_0 0x00000000
28 #define ERRLOGGER_0_ID_REVISIONID_0 0x00000004
29 #define ERRLOGGER_0_FAULTEN_0 0x00000008
30 #define ERRLOGGER_0_ERRVLD_0 0x0000000c
31 #define ERRLOGGER_0_ERRCLR_0 0x00000010
32 #define ERRLOGGER_0_ERRLOG0_0 0x00000014
33 #define ERRLOGGER_0_ERRLOG1_0 0x00000018
34 #define ERRLOGGER_0_RSVD_00_0 0x0000001c
35 #define ERRLOGGER_0_ERRLOG3_0 0x00000020
36 #define ERRLOGGER_0_ERRLOG4_0 0x0000002
[all...]