Searched +full:0 +full:x14003000 (Results 1 – 6 of 6) sorted by relevance
58 reg = <0x14003000 0x1000>;59 mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0x3000 0x1000>;
67 reg = <0x14003000 0x1000>;68 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x3000 0x1000>;76 reg = <0x14004000 0x1000>;77 mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x4000 0x1000>;
35 reg = <0 0x14001000 0 0x1000>;45 reg = <0 0x14002000 0 0x1000>;54 reg = <0 0x14003000 0 0x1000>;61 reg = <0 0x14004000 0 0x1000>;68 reg = <0 0x14005000 0 0x1000>;75 reg = <0 0x14006000 0 0x1000>;83 reg = <0 0x14007000 0 0x1000>;91 reg = <0 0x14008000 0 0x1000>;
105 * 0..au1000 1..au1500 2..au1100 3..au1550 4..au1200 5..au1300108 #define AU1000_AC97_PHYS_ADDR 0x10000000 /* 012 */109 #define AU1300_ROM_PHYS_ADDR 0x10000000 /* 5 */110 #define AU1300_OTP_PHYS_ADDR 0x10002000 /* 5 */111 #define AU1300_VSS_PHYS_ADDR 0x10003000 /* 5 */112 #define AU1300_UART0_PHYS_ADDR 0x10100000 /* 5 */113 #define AU1300_UART1_PHYS_ADDR 0x10101000 /* 5 */114 #define AU1300_UART2_PHYS_ADDR 0x10102000 /* 5 */115 #define AU1300_UART3_PHYS_ADDR 0x10103000 /* 5 */116 #define AU1000_USB_OHCI_PHYS_ADDR 0x10100000 /* 012 */[all …]
53 cluster0_opp: opp-table-0 {129 #size-cells = <0>;151 cpu0: cpu@0 {154 reg = <0x000>;169 reg = <0x001>;184 reg = <0x100>;199 reg = <0x101>;214 CPU_SLEEP_0: cpu-sleep-0 {220 arm,psci-suspend-param = <0x0010000>;242 cpu_suspend = <0x84000001>;[all …]
36 #clock-cells = <0>;45 #clock-cells = <0>;52 #clock-cells = <0>;59 #size-cells = <0>;61 cpu0: cpu@0 {64 reg = <0x000>;75 performance-domains = <&performance 0>;83 reg = <0x100>;94 performance-domains = <&performance 0>;102 reg = <0x200>;[all …]