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/linux/Documentation/devicetree/bindings/usb/
H A Dmediatek,mtu3.yaml206 "^usb@[0-9a-f]+$":
240 reg = <0x11271000 0x3000>, <0x11280700 0x0100>;
252 mediatek,syscon-wakeup = <&pericfg 0x400 1>;
259 reg = <0x11270000 0x1000>;
276 reg = <0x112c1000 0x3000>, <0x112d0700 0x0100>;
291 reg = <0x11270000 0x1000>;
311 reg = <0x11201000 0x2e00>, <0x11203e00 0x0100>;
317 mediatek,syscon-wakeup = <&pericfg 0x400 1>;
328 reg = <0x11200000 0x1000>;
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt7986a.dtsi21 #size-cells = <0>;
22 cpu0: cpu@0 {
24 reg = <0x0>;
32 reg = <0x1>;
40 reg = <0x2>;
48 reg = <0x3>;
58 #clock-cells = <0>;
73 reg = <0 0x43000000 0 0x30000>;
79 reg = <0 0x4fc00000 0 0x00100000>;
83 reg = <0 0x4fd00000 0 0x40000>;
[all …]
H A Dmt8365.dtsi24 #size-cells = <0>;
26 cluster0_opp: opp-table-0 {
128 cpu0: cpu@0 {
131 reg = <0x0>;
135 i-cache-size = <0x8000>;
138 d-cache-size = <0x8000>;
151 reg = <0x1>;
155 i-cache-size = <0x8000>;
158 d-cache-size = <0x8000>;
171 reg = <0x2>;
[all …]
H A Dmt8192.dtsi36 #clock-cells = <0>;
45 #clock-cells = <0>;
52 #clock-cells = <0>;
59 #size-cells = <0>;
61 cpu0: cpu@0 {
64 reg = <0x000>;
75 performance-domains = <&performance 0>;
83 reg = <0x100>;
94 performance-domains = <&performance 0>;
102 reg = <0x200>;
[all …]
H A Dmt8183.dtsi293 #size-cells = <0>;
327 cpu0: cpu@0 {
330 reg = <0x000>;
353 reg = <0x001>;
376 reg = <0x002>;
399 reg = <0x003>;
422 reg = <0x100>;
445 reg = <0x101>;
468 reg = <0x102>;
491 reg = <0x103>;
[all …]
H A Dmt8186.dtsi35 reg = <0 0x1000ce00 0 0x200>;
336 #size-cells = <0>;
374 cpu0: cpu@0 {
377 reg = <0x000>;
401 reg = <0x100>;
425 reg = <0x200>;
449 reg = <0x300>;
473 reg = <0x400>;
497 reg = <0x500>;
521 reg = <0x600>;
[all …]
H A Dmt8188.dtsi59 #size-cells = <0>;
61 cpu0: cpu@0 {
64 reg = <0x000>;
76 performance-domains = <&performance 0>;
83 reg = <0x100>;
95 performance-domains = <&performance 0>;
102 reg = <0x200>;
114 performance-domains = <&performance 0>;
121 reg = <0x300>;
133 performance-domains = <&performance 0>;
[all …]
H A Dmt8195.dtsi51 #size-cells = <0>;
53 cpu0: cpu@0 {
56 reg = <0x000>;
58 performance-domains = <&performance 0>;
75 reg = <0x100>;
77 performance-domains = <&performance 0>;
94 reg = <0x200>;
96 performance-domains = <&performance 0>;
113 reg = <0x300>;
115 performance-domains = <&performance 0>;
[all …]