Searched +full:0 +full:x11006000 (Results 1 – 11 of 11) sorted by relevance
87 reg = <0x11006000 0x1000>;
19 #size-cells = <0>;21 cpu@0 {24 reg = <0x0>;29 reg = <0x1>;34 reg = <0x2>;39 reg = <0x3>;47 #clock-cells = <0>;53 #clock-cells = <0>;59 #clock-cells = <0>;65 reg = <0x10008000 0x80>;[all …]
16 #size-cells = <0>;19 cpu@0 {22 reg = <0x0>;27 reg = <0x1>;34 #clock-cells = <0>;40 #clock-cells = <0>;46 #clock-cells = <0>;57 reg = <0x10007000 0x100>;65 reg = <0x10008000 0x80>;73 reg = <0x10200100 0x1c>;[all …]
19 #size-cells = <0>;22 cpu@0 {25 reg = <0x0>;30 reg = <0x1>;35 reg = <0x2>;40 reg = <0x3>;54 #clock-cells = <0>;60 #clock-cells = <0>;66 #clock-cells = <0>;78 reg = <0x10008000 0x80>;[all …]
42 #size-cells = <0>;45 cpu0: cpu@0 {48 reg = <0x000>;54 reg = <0x001>;60 reg = <0x100>;66 reg = <0x101>;77 reg = <0 0x80002000 0 0x1000>;90 #clock-cells = <0>;96 #clock-cells = <0>;101 #clock-cells = <0>;[all …]
24 #size-cells = <0>;27 cpu0: cpu@0 {30 reg = <0x0>;38 reg = <0x1>;51 clk20m: oscillator-0 {53 #clock-cells = <0>;60 #clock-cells = <0>;83 reg = <0x10000000 0x1000>;89 reg = <0x10002000 0x1000>;97 reg = <0x10006000 0x1000>;[all …]
94 pinctrl-0: true117 reg = <0x11006000 0x400>;123 pinctrl-0 = <&uart_pin>;
44 #clock-cells = <0>;49 #size-cells = <0>;51 cpu_atlas0: cpu@0 {54 reg = <0x0>;56 i-cache-size = <0xc000>;59 d-cache-size = <0x8000>;68 reg = <0x1>;70 i-cache-size = <0xc000>;73 d-cache-size = <0x8000>;82 reg = <0x2>;[all …]
69 #size-cells = <0>;71 cpu0: cpu@0 {74 reg = <0x0 0x0>;89 reg = <0x0 0x1>;111 #clock-cells = <0>;116 #clock-cells = <0>;140 reg = <0 0x43000000 0 0x30000>;150 thermal-sensors = <&thermal 0>;216 reg = <0 0x10000000 0 0x1000>;223 reg = <0 0x10001000 0 0x250>;[all …]
22 cluster0_opp: opp-table-0 {66 #size-cells = <0>;85 cpu0: cpu@0 {88 reg = <0x000>;100 reg = <0x001>;113 reg = <0x200>;126 CPU_SLEEP_0: cpu-sleep-0 {132 arm,psci-suspend-param = <0x0010000>;135 CLUSTER_SLEEP_0: cluster-sleep-0 {141 arm,psci-suspend-param = <0x1010000>;[all …]
38 #size-cells = <0>;40 cluster0_opp: opp-table-0 {142 cpu0: cpu@0 {145 reg = <0x0>;149 i-cache-size = <0x8000>;152 d-cache-size = <0x8000>;165 reg = <0x1>;169 i-cache-size = <0x8000>;172 d-cache-size = <0x8000>;185 reg = <0x2>;[all …]