Searched +full:0 +full:x11000300 (Results 1 – 8 of 8) sorted by relevance
120 reg = <0x1100d000 0x70>, <0x11000300 0x80>;129 #size-cells = <0>;
25 #size-cells = <0>;27 cpu0: cpu@0 {31 reg = <0x000>;38 reg = <0x001>;45 reg = <0x002>;52 reg = <0x003>;59 reg = <0x100>;66 reg = <0x101>;73 reg = <0x102>;80 reg = <0x103>;[all …]
48 #size-cells = <0>;50 cpu0: cpu@0 {54 reg = <0x000>;63 reg = <0x001>;78 reg = <0x002>;93 reg = <0x003>;108 reg = <0x100>;123 reg = <0x101>;138 reg = <0x102>;153 reg = <0x103>;[all …]
22 cluster0_opp: opp-table-0 {66 #size-cells = <0>;85 cpu0: cpu@0 {88 reg = <0x000>;100 reg = <0x001>;113 reg = <0x200>;126 CPU_SLEEP_0: cpu-sleep-0 {132 arm,psci-suspend-param = <0x0010000>;135 CLUSTER_SLEEP_0: cluster-sleep-0 {141 arm,psci-suspend-param = <0x1010000>;[all …]
38 #size-cells = <0>;40 cluster0_opp: opp-table-0 {142 cpu0: cpu@0 {145 reg = <0x0>;149 i-cache-size = <0x8000>;152 d-cache-size = <0x8000>;165 reg = <0x1>;169 i-cache-size = <0x8000>;172 d-cache-size = <0x8000>;185 reg = <0x2>;[all …]
53 cluster0_opp: opp-table-0 {129 #size-cells = <0>;151 cpu0: cpu@0 {154 reg = <0x000>;169 reg = <0x001>;184 reg = <0x100>;199 reg = <0x101>;214 CPU_SLEEP_0: cpu-sleep-0 {220 arm,psci-suspend-param = <0x0010000>;242 cpu_suspend = <0x84000001>;[all …]
293 #size-cells = <0>;327 cpu0: cpu@0 {330 reg = <0x000>;353 reg = <0x001>;376 reg = <0x002>;399 reg = <0x003>;422 reg = <0x100>;445 reg = <0x101>;468 reg = <0x102>;491 reg = <0x103>;[all …]
25 #size-cells = <0>;28 cpu@0 {31 reg = <0x0>;36 reg = <0x1>;41 reg = <0x2>;46 reg = <0x3>;57 reg = <0 0x80002000 0 0x1000>;64 #clock-cells = <0>;70 #clock-cells = <0>;73 clk26m: oscillator@0 {[all …]