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12

/freebsd/sys/contrib/device-tree/src/arm/arm/
H A Dintegratorap.dts17 #size-cells = <0>;
19 cpu@0 {
28 reg = <0>;
37 operating-points = <71000 0
38 66000 0
39 60000 0
40 48000 0
41 36000 0
42 24000 0
43 12000 0>;
[all …]
/freebsd/sys/gnu/dev/bwn/phy_n/
H A Dif_bwn_phy_n_tables.c84 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
85 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
86 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
87 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
88 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
89 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
90 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
91 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
92 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
93 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
[all …]
/freebsd/contrib/llvm-project/llvm/lib/ExecutionEngine/RuntimeDyld/Targets/
H A DRuntimeDyldMachOAArch64.h3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
38 int64_t Addend = 0; in decodeAddend()
71 assert((((uintptr_t)LocalAddress & 0x3) == 0) && in decodeAddend()
90 assert(((*p & 0xFC000000) == 0x14000000 || in decodeAddend()
91 (*p & 0xFC000000) == 0x94000000) && in decodeAddend()
97 Addend = (*p & 0x03FFFFFF) << 2; in decodeAddend()
105 assert((*p & 0x9F000000) == 0x90000000 && "Expected adrp instruction."); in decodeAddend()
110 Addend = ((*p & 0x60000000) >> 29) | ((*p & 0x01FFFFE0) >> 3) << 12; in decodeAddend()
119 assert((*p & 0x3B000000) == 0x39000000 && in decodeAddend()
127 assert((((*p & 0x3B000000) == 0x39000000) || in decodeAddend()
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/exynos/
H A Dexynosautov920.dtsi38 #clock-cells = <0>;
44 #size-cells = <0>;
87 cpu0: cpu@0 {
90 reg = <0x0 0x0>;
97 reg = <0x0 0x100>;
104 reg = <0x0 0x200>;
111 reg = <0x0 0x300>;
118 reg = <0x0 0x10000>;
125 reg = <0x0 0x10100>;
132 reg = <0x0 0x10200>;
[all …]
/freebsd/sys/contrib/device-tree/Bindings/pinctrl/
H A Dsamsung,pinctrl.yaml87 "^[a-z]+[0-9]*-gpio-bank$":
166 reg = <0x7f008000 0x1000>;
172 interrupts-extended = <&vic0 0>,
174 <&vic1 0>,
189 samsung,pins = "gpa-0", "gpa-1";
191 samsung,pin-pud = <0>;
202 reg = <0x11400000 0x1000>;
206 pinctrl-0 = <&sleep0>;
219 samsung,pins = "gpa0-0", "gpa0-1";
221 samsung,pin-pud = <0>;
[all …]
H A Dsamsung-pinctrl.txt42 reg = <0x10580000 0x1a20>, <0x11090000 0x100>;
46 interrupts = <0 16 0>;
59 Eg: <&gpx2 6 0>
65 - Pin number: is a value between 0 to 7.
66 - Flags: 0 - Active High
85 as "gpa0-0", "gpa0-1", "gpa0-2" and so on. The names should be in lower case.
215 reg = <0x11400000 0x1000>;
216 interrupts = <0 47 0>;
246 interrupts = <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>,
247 <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm/samsung/
H A Dexynos4210.dtsi178 #size-cells = <0>;
194 reg = <0x900>;
213 reg = <0x901>;
230 bus_leftbus_opp_table: opp-table-0 {
249 reg = <0x02020000 0x20000>;
252 ranges = <0 0x02020000 0x20000>;
254 smp-sram@0 {
[all...]
H A Dexynos4x12.dtsi70 #interconnect-cells = <0>;
80 #interconnect-cells = <0>;
120 #interconnect-cells = <0>;
211 reg = <0x11400000 0x1000>;
217 reg = <0x11000000 0x1000>;
229 reg = <0x03860000 0x100
[all...]
H A Dexynos3250.dtsi199 #size-cells = <0>;
212 cpu0: cpu@0 {
215 reg = <0>;
259 xusbxti: clock-0 {
261 clock-frequency = <0>;
262 #clock-cells = <0>;
268 clock-frequency = <0>;
269 #clock-cells = <0>;
275 clock-frequency = <0>;
276 #clock-cells = <0>;
[all …]
H A Dexynos5250.dtsi47 #size-cells = <0>;
60 cpu0: cpu@0 {
63 reg = <0>;
80 cpu0_opp_table: opp-table-0 {
176 reg = <0x02020000 0x30000>;
179 ranges = <0 0x02020000 0x30000>;
181 smp-sram@0 {
183 reg = <0x0 0x1000>;
188 reg = <0x2f000 0x1000>;
194 reg = <0x10044000 0x20>;
[all …]
H A Dexynos5420.dtsi153 cluster_a15_opp_table: opp-table-0 {
270 reg = <0x10d20000 0x1000>;
271 ranges = <0x0 0x10d20000 0x6000>;
276 reg = <0x4000 0x1000>;
281 reg = <0x5000 0x1000>;
287 reg = <0x10010000 0x30000>;
293 reg = <0x03810000 0x0c>;
303 reg = <0x11000000 0x10000>;
316 #size-cells = <0>;
317 reg = <0x12200000 0x2000>;
[all …]
/freebsd/sys/contrib/openzfs/module/icp/asm-x86_64/aes/
H A Daestab2.h49 0x00000001, 0x00000002, 0x00000004, 0x00000008,
50 0x00000010, 0x00000020, 0x00000040, 0x00000080,
51 0x0000001b, 0x00000036
57 0x00000063, 0x0000007c, 0x00000077, 0x0000007b,
58 0x000000f2, 0x0000006b, 0x0000006f, 0x000000c5,
59 0x00000030, 0x00000001, 0x00000067, 0x0000002b,
60 0x000000fe, 0x000000d7, 0x000000ab, 0x00000076,
61 0x000000ca, 0x00000082, 0x000000c9, 0x0000007d,
62 0x000000fa, 0x00000059, 0x00000047, 0x000000f0,
63 0x000000ad, 0x000000d4, 0x000000a2, 0x000000af,
[all …]
/freebsd/sys/contrib/device-tree/Bindings/cpu/
H A Didle-states.yaml102 between 0 and infinite time, until a wake-up event occurs.
127 wakeup-delay = exit-latency + max(entry-latency - (now - entry-timestamp), 0)
167 0| 1 time(ms)
172 The graph curve with X-axis values = { x | 0 < x < 1ms } has a steep slope
444 #size-cells = <0>;
447 cpu@0 {
450 reg = <0x0 0x0>;
459 reg = <0x0 0x1>;
468 reg = <0x0 0x100>;
477 reg = <0x0 0x101>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm/qcom/
H A Dqcom-ipq8064.dtsi23 #size-cells = <0>;
25 cpu0: cpu@0 {
29 reg = <0>;
54 polling-delay-passive = <0>;
55 polling-delay = <0>;
56 thermal-sensors = <&tsens 0>;
74 polling-delay-passive = <0>;
75 polling-delay = <0>;
94 polling-delay-passive = <0>;
95 polling-delay = <0>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm/rockchip/
H A Drk322x.dtsi30 #size-cells = <0>;
35 reg = <0xf00>;
47 reg = <0xf01>;
57 reg = <0xf02>;
67 reg = <0xf03>;
75 cpu0_opp_table: opp-table-0 {
131 #clock-cells = <0>;
141 reg = <0x100b0000 0x4000>;
148 pinctrl-0 = <&i2s1_bus>;
154 reg = <0x100c0000 0x4000>;
[all …]
/freebsd/contrib/llvm-project/lldb/source/Plugins/Instruction/ARM64/
H A DEmulateInstructionARM64.cpp3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
29 #define GPR_OFFSET_NAME(reg) 0
31 #define FPU_OFFSET_NAME(reg) 0
32 #define EXC_OFFSET_NAME(reg) 0
33 #define DBG_OFFSET_NAME(reg) 0
34 #define DBG_OFFSET_NAME(reg) 0
36 "na", nullptr, 8, 0, lldb::eEncodingUint, lldb::eFormatHex, \
61 #define No_VFP 0
77 static inline bool IsZero(uint64_t x) { return x == 0; } in IsZero()
85 if (shift == 0) in LSL()
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/exynos/google/
H A Dgs101.dtsi34 #size-cells = <0>;
71 cpu0: cpu@0 {
74 reg = <0x0000>;
84 reg = <0x0100>;
94 reg = <0x0200>;
104 reg = <0x0300>;
114 reg = <0x0400>;
124 reg = <0x0500>;
134 reg = <0x0600>;
144 reg = <0x0700>;
[all …]
/freebsd/sys/dev/qlnx/qlnxe/
H A Dmcp_public.h51 #define OFFSIZE_OFFSET_OFFSET 0
52 #define OFFSIZE_OFFSET_MASK 0x0000ffff
55 #define OFFSIZE_SIZE_MASK 0xffff0000
70 u32 speed; /* 0 = autoneg, 1000/10000/20000/25000/40000/50000/100000 */
71 #define ETH_SPEED_AUTONEG 0
72 #define ETH_SPEED_SMARTLINQ 0x8 /* deprecated - use link_modes field instead */
75 #define ETH_PAUSE_NONE 0x0
76 #define ETH_PAUSE_AUTONEG 0x1
77 #define ETH_PAUSE_RX 0x2
78 #define ETH_PAUSE_TX 0x4
[all …]
H A Decore_init_values.h35 0x00030003, 0xffff0000, /* if phase != 'engine', skip 3 ops (no DMAE) */
36 0x00020002, 0x00020000, /* if mode != '!asic', skip 2 ops */
37 0x0280c201, 0x00000000, /* write 0x0 to address 0x50184 */
38 0x02810201, 0x00000000, /* write 0x0 to address 0x50204 */
40 0x00110003, 0xffff0000, /* if phase != 'engine', skip 17 ops (no DMAE) */
41 0x00030002, 0x00020000, /* if mode != '!asic', skip 3 ops */
42 0x0048c201, 0x00000000, /* write 0x0 to address 0x9184 */
43 0x0048d201, 0x00000000, /* write 0x0 to address 0x91a4 */
44 0x004ba601, 0x00000001, /* write 0x1 to address 0x974c */
45 0x00020002, 0x00be0000, /* if mode != '(!asic)&bb', skip 2 ops */
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/mediatek/
H A Dmt8186.dtsi329 #size-cells = <0>;
367 cpu0: cpu@0 {
370 reg = <0x000>;
394 reg = <0x100>;
418 reg = <0x200>;
442 reg = <0x300>;
466 reg = <0x400>;
490 reg = <0x500>;
514 reg = <0x600>;
538 reg = <0x700>;
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonDepMask.h3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
17 0xf0000000,
18 0xb0000000,
19 0x0fe03fe0,
20 0 },
23 0xffc00000,
24 0x76000000,
25 0x00203fe0,
26 0 },
29 0xff800000,
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/nvidia/
H A Dtegra194.dtsi20 bus@0 {
25 ranges = <0x0 0x0 0x0 0x0 0x100 0x0>;
29 reg = <0x0 0x00100000 0x
[all...]
H A Dtegra234.dtsi19 bus@0 {
24 ranges = <0x0 0x0 0x0 0x0 0x100 0x0>;
28 reg = <0x0 0x00100000 0x0 0xf000>,
29 <0x0 0x0010f000 0x0 0x1000>;
35 reg = <0x0 0x02080000 0x0 0x00121000>;
36 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
58 reg = <0x0 0x02200000 0x0 0x10000>,
59 <0x0 0x02210000 0x0 0x10000>;
112 gpio-ranges = <&pinmux 0 0 164>;
117 reg = <0x0 0x2430000 0x0 0x19100>;
[all …]
/freebsd/sys/dev/msk/
H A Dif_mskreg.h102 #define VENDORID_SK 0x1148
107 #define VENDORID_MARVELL 0x11AB
112 #define VENDORID_DLINK 0x1186
117 #define DEVICEID_SK_YUKON2 0x9000
118 #define DEVICEID_SK_YUKON2_EXPR 0x9e00
123 #define DEVICEID_MRVL_8021CU 0x4340
124 #define DEVICEID_MRVL_8022CU 0x4341
125 #define DEVICEID_MRVL_8061CU 0x4342
126 #define DEVICEID_MRVL_8062CU 0x4343
127 #define DEVICEID_MRVL_8021X 0x4344
[all …]
/freebsd/sys/dev/bxe/
H A Decore_hsi.h33 #define FW_ENCODE_32BIT_PATTERN 0x1e1e1e1e
39 #define LICENSE_MAX_ISCSI_TRGT_CONN_MASK 0xFFFF
40 #define LICENSE_MAX_ISCSI_TRGT_CONN_SHIFT 0
41 #define LICENSE_MAX_ISCSI_INIT_CONN_MASK 0xFFFF0000
47 #define LICENSE_MAX_FCOE_TRGT_CONN_MASK 0xFFFF
48 #define LICENSE_MAX_FCOE_TRGT_CONN_SHIFT 0
49 #define LICENSE_MAX_FCOE_INIT_CONN_MASK 0xFFFF0000
61 #define PIN_CFG_NA 0x00000000
62 #define PIN_CFG_GPIO0_P0 0x00000001
63 #define PIN_CFG_GPIO1_P0 0x00000002
[all …]

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