Searched +full:0 +full:x10210000 (Results 1 – 8 of 8) sorted by relevance
24 #size-cells = <0>;27 cpu0: cpu@0 {30 reg = <0x0>;38 reg = <0x1>;51 clk20m: oscillator-0 {53 #clock-cells = <0>;60 #clock-cells = <0>;83 reg = <0x10000000 0x1000>;89 reg = <0x10002000 0x1000>;97 reg = <0x10006000 0x1000>;[all …]
14 reg = <0x00000000 0x04000000>,15 <0x08000000 0x04000000>;20 reg = <0x10210000 0x1000>;37 reg = <0x101e2000 0x1000>;46 reg = <0x101e300[all...]
29 #size-cells = <0>;34 reg = <0xf00>;43 cpu_opp_table: opp-table-0 {85 #clock-cells = <0>;90 reg = <0x10080000 0x2000>;93 ranges = <0 0x10080000 0x2000>;98 reg = <0x1021000[all...]
69 #size-cells = <0>;71 cpu0: cpu@0 {74 reg = <0x0 0x0>;89 reg = <0x0 0x1>;111 #clock-cells = <0>;116 #clock-cells = <0>;140 reg = <0 0x43000000 0 0x30000>;150 thermal-sensors = <&thermal 0>;216 reg = <0 0x10000000 0 0x1000>;223 reg = <0 0x10001000 0 0x250>;[all …]
59 * special values defined in the document, they are of the form 0xLTTTNNNN,63 * 0: static configuration100 #define TLV_TAG_END (0xEEEEEEEE)105 #define TLV_TAG_SKIP (0x00000000)106 #define TLV_TAG_INVALID (0xFFFFFFFF)111 * 0.114 #define TLV_TAG_PARTITION_HEADER (0xEF10DA7A)120 /* 0 indicates the default segment (always located at offset 0), while other values122 * The default segment may also have preset > 0, which means that it is a preset123 * selected through an RFID command and copied by FW to the location at offset 0. */[all …]
20 #size-cells = <0>;22 S7_0: cpu@0 {24 reg = <0>;200 cpu_opp: opp-table-0 {260 #clock-cells = <0>;265 #clock-cells = <0>;271 #clock-cells = <0>;277 #clock-cells = <0>;283 #clock-cells = <0>;289 #clock-cells = <0>;[all …]
51 #define OFFSIZE_OFFSET_OFFSET 052 #define OFFSIZE_OFFSET_MASK 0x0000ffff55 #define OFFSIZE_SIZE_MASK 0xffff000070 u32 speed; /* 0 = autoneg, 1000/10000/20000/25000/40000/50000/100000 */71 #define ETH_SPEED_AUTONEG 072 #define ETH_SPEED_SMARTLINQ 0x8 /* deprecated - use link_modes field instead */75 #define ETH_PAUSE_NONE 0x076 #define ETH_PAUSE_AUTONEG 0x177 #define ETH_PAUSE_RX 0x278 #define ETH_PAUSE_TX 0x4[all …]
1 0x00 = 0x000000002 0x01 = 0x010000003 0x02 = 0x020000004 0x03 = 0x030000005 0x04 = 0x040000006 0x05 = 0x050000007 0x06 = 0x060000008 0x07 = 0x070000009 0x08 = 0x0800000010 0x09 = 0x09000000[all …]