Searched +full:0 +full:x1005c000 (Results 1 – 3 of 3) sorted by relevance
| /linux/Documentation/devicetree/bindings/clock/ |
| H A D | renesas,r9a08g045-vbattb.yaml | 74 reg = <0x1005c000 0x1000>;
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| /linux/arch/arm64/boot/dts/renesas/ |
| H A D | r9a08g045.dtsi | 19 #size-cells = <0>;
21 cpu0: cpu@0 {
23 reg = <0>;
31 L3_CA55: cache-controller-0 {
35 cache-size = <0x40000>;
41 #clock-cells = <0>;
43 clock-frequency = <0>;
60 reg = <0 0x1004b800 0 0x400>;
78 reg = <0 0x1004ec00 0 0x400>;
92 reg = <0 0x1005c000 0 0x1000>;
[all …]
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| /linux/drivers/net/ethernet/microchip/sparx5/ |
| H A D | sparx5_main.c | 53 { TARGET_CPU, 0, 0 }, /* 0x600000000 */
54 { TARGET_FDMA, 0x80000, 0 }, /* 0x600080000 */
55 { TARGET_PCEP, 0x400000, 0 }, /* 0x600400000 */
56 { TARGET_DEV2G5, 0x10004000, 1 }, /* 0x610004000 */
57 { TARGET_DEV5G, 0x10008000, 1 }, /* 0x610008000 */
58 { TARGET_PCS5G_BR, 0x1000c000, 1 }, /* 0x61000c000 */
59 { TARGET_DEV2G5 + 1, 0x10010000, 1 }, /* 0x610010000 */
60 { TARGET_DEV5G + 1, 0x10014000, 1 }, /* 0x610014000 */
61 { TARGET_PCS5G_BR + 1, 0x10018000, 1 }, /* 0x610018000 */
62 { TARGET_DEV2G5 + 2, 0x1001c000, 1 }, /* 0x61001c000 */
[all …]
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