/freebsd/crypto/libecc/src/examples/hash/ |
H A D | tdes.c | 24 } while( 0 ) 34 } while( 0 ) 40 0x01010400, 0x00000000, 0x00010000, 0x01010404, 41 0x01010004, 0x00010404, 0x00000004, 0x00010000, 42 0x00000400, 0x01010400, 0x01010404, 0x00000400, 43 0x01000404, 0x01010004, 0x01000000, 0x00000004, 44 0x00000404, 0x01000400, 0x01000400, 0x00010400, 45 0x00010400, 0x01010000, 0x01010000, 0x01000404, 46 0x00010004, 0x01000004, 0x01000004, 0x00010004, 47 0x00000000, 0x00000404, 0x00010404, 0x01000000, [all …]
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/freebsd/sys/contrib/device-tree/Bindings/spi/ |
H A D | spi-sifive.yaml | 62 enum: [0, 1, 2, 3, 4, 5, 6, 7, 8] 77 reg = <0x10040000 0x1000>, <0x20000000 0x10000000>; 82 #size-cells = <0>;
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/freebsd/sys/contrib/device-tree/Bindings/arm/samsung/ |
H A D | pmu.yaml | 62 pattern: '^clkout([0-9]|[12][0-9]|3[0-1])$' 121 reg = <0x10040000 0x5000>;
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/freebsd/sys/contrib/device-tree/src/arm/st/ |
H A D | stm32mp157a-microgea-stm32mp1.dtsi | 13 reg = <0xc0000000 0x10000000>; 23 reg = <0x10000000 0x40000>; 29 reg = <0x10040000 0x1000>; 35 reg = <0x10041000 0x1000>; 41 reg = <0x10042000 0x4000>; 47 reg = <0x30000000 0x40000>; 53 reg = <0x38000000 0x10000>; 100 pinctrl-0 = <&fmc_pins_a>; 104 nand-controller@4,0 { 107 nand@0 { [all …]
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H A D | stm32mp157a-icore-stm32mp1.dtsi | 13 reg = <0xc0000000 0x20000000>; 23 reg = <0x10000000 0x40000>; 29 reg = <0x10040000 0x1000>; 35 reg = <0x10041000 0x1000>; 41 reg = <0x10042000 0x4000>; 47 reg = <0x30000000 0x40000>; 53 reg = <0x38000000 0x10000>; 159 pinctrl-0 = <&i2c2_pins_a>; 176 mboxes = <&ipcc 0>, <&ipcc 1>, <&ipcc 2>;
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H A D | stm32mp15xx-osd32.dtsi | 19 reg = <0x10000000 0x40000>; 25 reg = <0x10040000 0x1000>; 31 reg = <0x10041000 0x1000>; 37 reg = <0x10042000 0x4000>; 43 reg = <0x30000000 0x40000>; 49 reg = <0x38000000 0x10000>; 57 pinctrl-0 = <&i2c4_pins_a>; 66 reg = <0x33>; 67 interrupts-extended = <&gpioa 0 IRQ_TYPE_EDGE_FALLING>; 84 regulator-initial-mode = <0>; [all …]
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H A D | stm32mp15xx-dhcor-som.dtsi | 20 reg = <0xc0000000 0x40000000>; 30 reg = <0x10000000 0x40000>; 36 reg = <0x10040000 0x1000>; 42 reg = <0x10041000 0x1000>; 48 reg = <0x1004200 [all...] |
H A D | stm32mp157c-odyssey-som.dtsi | 22 reg = <0xc0000000 0x20000000>; 32 reg = <0x10000000 0x40000>; 38 reg = <0x10040000 0x1000>; 44 reg = <0x10041000 0x1000>; 50 reg = <0x1004200 [all...] |
H A D | stm32mp157c-ed1.dts | 30 reg = <0xC0000000 0x40000000>; 40 reg = <0x10000000 0x40000>; 46 reg = <0x10040000 0x1000>; 52 reg = <0x10041000 0x1000>; 58 reg = <0x10042000 0x4000>; 64 reg = <0x30000000 0x40000>; 70 reg = <0x38000000 0x10000>; 95 gpios-states = <0>; 96 states = <1800000 0x1>, 97 <2900000 0x0>; [all …]
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H A D | stm32mp157c-emstamp-argon.dtsi | 28 reg = <0xc0000000 0x20000000>; 38 reg = <0x10000000 0x40000>; 44 reg = <0x10040000 0x2000>; 50 reg = <0x10042000 0x2000>; 56 reg = <0x1004400 [all...] |
H A D | stm32mp15xx-dhcom-som.dtsi | 21 reg = <0xC0000000 0x40000000>; 31 reg = <0x10000000 0x40000>; 37 reg = <0x10040000 0x1000>; 43 reg = <0x10041000 0x1000>; 49 reg = <0x1004200 [all...] |
H A D | stm32mp157c-phycore-stm32mp15-som.dtsi | 55 reg = <0x38000000 0x10000>; 61 reg = <0x30000000 0x40000>; 67 reg = <0x10000000 0x40000>; 73 reg = <0x10040000 0x1000>; 79 reg = <0x1004100 [all...] |
H A D | stm32mp15x-mecio1-io.dtsi | 31 reg = <0xC0000000 0x10000000>; 41 reg = <0x10000000 0x40000>; 47 reg = <0x10040000 0x1000>; 53 reg = <0x10041000 0x1000>; 59 reg = <0x10042000 0x4000>; 65 reg = <0x30000000 0x40000>; 71 reg = <0x38000000 0x10000>; 94 pinctrl-0 = <&adc12_pins_mecsbc>; 105 channel@0 { 106 reg = <0>; [all …]
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H A D | stm32mp15xx-dkx.dtsi | 19 reg = <0xc0000000 0x20000000>; 29 reg = <0x10000000 0x40000>; 35 reg = <0x10040000 0x1000>; 41 reg = <0x10041000 0x1000>; 47 reg = <0x1004200 [all...] |
/freebsd/sys/contrib/device-tree/src/arm/arm/ |
H A D | arm-realview-eb.dts | 31 arm,hbi = <0x140>; 56 reg = <0x10041000 0x1000>, 57 <0x10040000 0x100>; 69 interrupts = <0 28 IRQ_TYPE_LEVEL_HIGH>; 74 interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>; 79 interrupts = <0 19 IRQ_TYPE_LEVEL_HIGH>; 84 interrupts = <0 17 IRQ_TYPE_LEVEL_HIGH>, 85 <0 18 IRQ_TYPE_LEVEL_HIGH>; 90 interrupts = <0 20 IRQ_TYPE_LEVEL_HIGH>; 95 interrupts = <0 21 IRQ_TYPE_LEVEL_HIGH>; [all …]
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H A D | arm-realview-eb-mp.dtsi | 46 reg = <0x1f001000 0x1000>, 47 <0x1f000100 0x100>; 56 reg = <0x10041000 0x1000>, 57 <0x10040000 0x100>; 59 interrupts = <0 10 IRQ_TYPE_LEVEL_HIGH>; 64 reg = <0x1f002000 0x1000>; 66 interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>, 67 <0 30 IRQ_TYPE_LEVEL_HIGH>, 68 <0 31 IRQ_TYPE_LEVEL_HIGH>; 88 reg = <0x1f000000 0x100>; [all …]
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H A D | arm-realview-pb1176.dts | 45 /* 128 MiB memory @ 0x0 */ 46 reg = <0x00000000 0x08000000>; 67 #clock-cells = <0>; 73 #clock-cells = <0>; 82 #clock-cells = <0>; 84 clock-frequency = <0>; 89 reg = <0x30000000 0x4000000>; 98 reg = <0x38000000 0x800000>; 113 reg = <0x3c000000 0x4000000>; 121 reg = <0x3a000000 0x10000>; [all …]
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/freebsd/sys/contrib/device-tree/Bindings/soc/samsung/ |
H A D | exynos-pmu.yaml | 85 pattern: '^clkout([0-9]|[12][0-9]|3[0-1])$' 193 reg = <0x10040000 0x5000>; 203 #phy-cells = <0>;
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/freebsd/sys/contrib/device-tree/src/riscv/sifive/ |
H A D | fu540-c000.dtsi | 24 #size-cells = <0>; 25 cpu0: cpu@0 { 31 reg = <0>; 182 compatible = "sifive,fu540-c000-plic", "sifive,plic-1.0.0"; 183 reg = <0x0 0xc000000 0x0 0x4000000>; 184 #address-cells = <0>; 188 <&cpu0_intc 0xfffffff [all...] |
H A D | fu740-c000.dtsi | 24 #size-cells = <0>; 25 cpu0: cpu@0 { 32 reg = <0x0>; 59 reg = <0x1>; 86 reg = <0x2>; 113 reg = <0x3>; 140 reg = <0x4>; 184 #address-cells = <0>; 185 compatible = "sifive,fu540-c000-plic", "sifive,plic-1.0.0"; 186 reg = <0x [all...] |
/freebsd/sys/contrib/device-tree/src/arm/samsung/ |
H A D | exynos5410.dtsi | 31 #size-cells = <0>; 33 cpu0: cpu@0 { 36 reg = <0x0>; 43 reg = <0x1>; 50 reg = <0x2>; 57 reg = <0x3>; 70 reg = <0x10040000 0x5000>; 78 reg = <0x10010000 0x30000>; 84 reg = <0x03810000 0x0c>; 92 reg = <0x10060000 0x100>; [all …]
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/freebsd/sys/contrib/device-tree/Bindings/clock/ |
H A D | exynos5433-clock.txt | 49 which generates clocks for MIPI_CSIS{0|1}/FIMC_LITE_{A|B|D}/FIMC_3AA{0|1} 196 #clock-cells = <0>; 203 reg = <0x10030000 0x0c04>; 218 reg = <0x10fc0000 0x0c04>; 227 reg = <0x105b0000 0x100c>; 238 reg = <0x14c80000 0x0b08>; 244 reg = <0x10040000 0x0b20>; 250 reg = <0x156e0000 0x0b04>; 277 reg = <0x12460000 0x0b08>; 291 reg = <0x13b90000 0x0c04>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/ |
H A D | imx27.dtsi | 47 reg = <0x10040000 0x1000>; 53 #clock-cells = <0>; 59 #size-cells = <0>; 62 cpu: cpu@0 { 64 reg = <0>; 88 reg = <0x10000000 0x20000>; 93 reg = <0x10001000 0x1000>; 104 reg = <0x10002000 0x1000>; 111 reg = <0x10003000 0x1000>; 120 reg = <0x10004000 0x1000>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/exynos/ |
H A D | exynos7.dtsi | 44 #clock-cells = <0>; 49 #size-cells = <0>; 51 cpu_atlas0: cpu@0 { 54 reg = <0x0>; 56 i-cache-size = <0xc000>; 59 d-cache-size = <0x8000>; 68 reg = <0x1>; 70 i-cache-size = <0xc000>; 73 d-cache-size = <0x8000>; 82 reg = <0x [all...] |
H A D | exynos850.dtsi | 52 #clock-cells = <0>; 57 #size-cells = <0>; 91 cpu0: cpu@0 { 94 reg = <0x0>; 102 reg = <0x1>; 108 reg = <0x2>; 114 reg = <0x3>; 120 reg = <0x100>; 128 reg = <0x101>; 134 reg = <0x102>; [all …]
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