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/freebsd/contrib/llvm-project/lldb/source/Plugins/Process/Utility/
H A DNativeRegisterContextDBReg_arm64.h3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
55 enum DREGType { eDREGTypeWATCH = 0, eDREGTypeBREAK };
59 /// Watchpoints: For a user requested size 4 at addr 0x1004, where BAS
61 /// \a real_addr is 0x1004
62 /// \a address is 0x1000
64 /// If a one-byte write to 0x1006 is the most recent watchpoint trap,
65 /// \a hit_addr is 0x1006
80 virtual llvm::Error ReadHardwareDebugInfo() = 0;
81 virtual llvm::Error WriteHardwareDebugRegs(DREGType hwbType) = 0;
/freebsd/sys/dev/qat/qat_hw/qat_4xxxvf/
H A Dadf_4xxxvf_hw_data.h7 #define ADF_4XXXIOV_ACCELERATORS_MASK 0x1
8 #define ADF_4XXXIOV_ACCELENGINES_MASK 0x1
13 #define ADF_4XXXIOV_TX_RINGS_MASK 0x1
14 #define ADF_4XXXIOV_ETR_BAR 0
17 #define ADF_4XXXIOV_VINTSOU_OFFSET 0x0
18 #define ADF_4XXXIOV_VINTMSK_OFFSET 0x4
19 #define ADF_4XXXIOV_VINTSOUPF2VM_OFFSET 0x1000
20 #define ADF_4XXXIOV_VINTMSKPF2VM_OFFSET 0x1004
21 #define ADF_4XXX_DEF_ASYM_MASK 0x1
24 #define ADF_4XXXIOV_VFFUSECTL0_OFFSET (0x40)
[all …]
/freebsd/sys/powerpc/include/
H A Dmetadata.h32 #define MODINFOMD_ENVP 0x1001
33 #define MODINFOMD_HOWTO 0x1002
34 #define MODINFOMD_KERNEND 0x1003
35 #define MODINFOMD_BOOTINFO 0x1004
36 #define MODINFOMD_DTBP 0x1005
/freebsd/sys/contrib/device-tree/Bindings/timer/
H A Drenesas,cmt.yaml182 reg = <0xffca0000 0x1004>;
193 reg = <0xe6130000 0x1004>;
/freebsd/sys/riscv/include/
H A Dmetadata.h31 #define MODINFOMD_DTBP 0x1001
32 #define MODINFOMD_EFI_MAP 0x1002
33 #define MODINFOMD_EFI_FB 0x1003
34 #define MODINFOMD_BOOT_HARTID 0x1004
/freebsd/sys/x86/include/
H A Dmetadata.h30 #define MODINFOMD_SMAP 0x1001
31 #define MODINFOMD_SMAP_XATTR 0x1002
32 #define MODINFOMD_DTBP 0x1003
33 #define MODINFOMD_EFI_MAP 0x1004
34 #define MODINFOMD_EFI_FB 0x1005
35 #define MODINFOMD_MODULEP 0x1006
36 #define MODINFOMD_VBE_FB 0x1007
37 #define MODINFOMD_EFI_ARCH 0x1008
82 #define XENHEADER_HAS_MODULEP_OFFSET (1ull << 0)
/freebsd/sys/net80211/
H A Dieee80211_wps.h34 #define IEEE80211_WPS_ATTR_AP_CHANNEL 0x1001
35 #define IEEE80211_WPS_ATTR_ASSOC_STATE 0x1002
36 #define IEEE80211_WPS_ATTR_AUTH_TYPE 0x1003
37 #define IEEE80211_WPS_ATTR_AUTH_TYPE_FLAGS 0x1004
38 #define IEEE80211_WPS_ATTR_AUTHENTICATOR 0x1005
39 #define IEEE80211_WPS_ATTR_CONFIG_METHODS 0x1008
40 #define IEEE80211_WPS_ATTR_CONFIG_ERROR 0x1009
41 #define IEEE80211_WPS_ATTR_CONFIRM_URL4 0x100a
42 #define IEEE80211_WPS_ATTR_CONFIRM_URL6 0x100b
43 #define IEEE80211_WPS_ATTR_CONN_TYPE 0x100c
[all …]
/freebsd/sys/contrib/dev/mediatek/mt76/mt76x0/
H A Dusb_mcu.c13 #define MCU_FW_URB_MAX_PAYLOAD 0x38f8
49 0x12, 0, ivb, MT_MCU_IVB_SIZE); in mt76x0u_upload_firmware()
50 if (err < 0) in mt76x0u_upload_firmware()
82 return 0; in mt76x0_get_firmware()
96 return 0; in mt76x0u_load_firmware()
120 (val >> 12) & 0xf, (val >> 8) & 0xf, val & 0xf, in mt76x0u_load_firmware()
125 mt76_wr(dev, 0x1004, 0x2c); in mt76x0u_load_firmware()
129 FIELD_PREP(MT_USB_DMA_CFG_RX_BULK_AGG_TOUT, 0x20)); in mt76x0u_load_firmware()
136 mt76_wr(dev, MT_TX_CPU_FROM_FCE_BASE_PTR, 0x400230); in mt76x0u_load_firmware()
140 mt76_wr(dev, MT_FCE_PDMA_GLOBAL_CONF, 0x44); in mt76x0u_load_firmware()
[all …]
/freebsd/sys/dev/tws/
H A Dtws_user.h37 #define TWS_AEN_NOT_RETRIEVED 0x1
38 #define TWS_AEN_RETRIEVED 0x2
40 #define TWS_AEN_NO_EVENTS 0x1003 /* No more events */
41 #define TWS_AEN_OVERFLOW 0x1004 /* AEN overflow occurred */
43 #define TWS_IOCTL_LOCK_NOT_HELD 0x1001 /* Not locked */
44 #define TWS_IOCTL_LOCK_ALREADY_HELD 0x1002 /* Already locked */
46 #define TWS_IOCTL_LOCK_HELD 0x1
47 #define TWS_IOCTL_LOCK_FREE 0x0
/freebsd/sys/dev/mlx5/
H A Ddiagnostics.h41 m(+1, pxd_ready_bp, 0x0401) \
42 m(+1, pci_write_bp, 0x0402) \
43 m(+1, pci_read_bp, 0x0403) \
44 m(+1, pci_read_stuck_no_completion_buffer, 0x0404) \
45 m(+1, max_pci_bw, 0x0405) \
46 m(+1, used_pci_bw, 0x0406) \
47 m(+1, rx_pci_errors, 0) \
48 m(+1, tx_pci_errors, 0) \
49 m(+1, tx_pci_correctable_errors, 0) \
50 m(+1, tx_pci_non_fatal_errors, 0) \
[all …]
/freebsd/sys/arm64/rockchip/
H A Drk_otp.c46 #define OTPC_SBPI_CTRL 0x0020
47 #define SBPI_ENABLE_MASK 0x00010000
49 #define SBPI_DAP_ADDR_MASK 0xff000000
50 #define SBPI_DAP_ADDR 0x02
52 #define OTPC_SBPI_CMD_VALID_PRE 0x0024
53 #define SBPI_CMD_VALID_MASK 0xffff0000
54 #define OTPC_SBPI_INT_STATUS 0x0304
57 #define OTPC_USER_CTRL 0x0100
58 #define OTPC_USER_MASK 0xffff0000
60 #define OTPC_USER_ADDR 0x0104
[all …]
/freebsd/sys/amd64/linux/
H A Dlinux.h107 #define LINUX_RLIMIT_CPU 0
154 #define LINUX_SA_NOCLDSTOP 0x00000001
155 #define LINUX_SA_NOCLDWAIT 0x00000002
156 #define LINUX_SA_SIGINFO 0x00000004
157 #define LINUX_SA_RESTORER 0x04000000
158 #define LINUX_SA_ONSTACK 0x08000000
159 #define LINUX_SA_RESTART 0x10000000
160 #define LINUX_SA_INTERRUPT 0x20000000
161 #define LINUX_SA_NOMASK 0x40000000
162 #define LINUX_SA_ONESHOT 0x80000000
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/renesas/
H A Dr8a77970.dtsi22 #clock-cells = <0>;
23 clock-frequency = <0>;
28 #size-cells = <0>;
30 a53_0: cpu@0 {
33 reg = <0>;
60 #clock-cells = <0>;
62 clock-frequency = <0>;
67 #clock-cells = <0>;
69 clock-frequency = <0>;
87 #clock-cells = <0>;
[all …]
H A Dr8a779f0.dtsi17 cluster01_opp: opp-table-0 {
73 #size-cells = <0>;
113 a55_0: cpu@0 {
115 reg = <0>;
127 reg = <0x100>;
139 reg = <0x10000>;
151 reg = <0x10100>;
163 reg = <0x20000>;
175 reg = <0x20100>;
187 reg = <0x30000>;
[all …]
H A Dr8a77980.dtsi22 #clock-cells = <0>;
23 clock-frequency = <0>;
28 #size-cells = <0>;
30 a53_0: cpu@0 {
33 reg = <0>;
80 #clock-cells = <0>;
82 clock-frequency = <0>;
87 #clock-cells = <0>;
89 clock-frequency = <0>;
95 #clock-cells = <0>;
[all …]
H A Dr8a77995.dtsi19 * The external audio clocks are configured as 0 Hz fixed frequency
25 #clock-cells = <0>;
26 clock-frequency = <0>;
31 #clock-cells = <0>;
32 clock-frequency = <0>;
38 #clock-cells = <0>;
39 clock-frequency = <0>;
44 #size-cells = <0>;
46 a53_0: cpu@0 {
48 reg = <0x0>;
[all …]
H A Dr8a779h0.dtsi20 #clock-cells = <0>;
21 clock-frequency = <0>;
27 #clock-cells = <0>;
28 clock-frequency = <0>;
31 cluster0_opp: opp-table-0 {
48 #size-cells = <0>;
67 a76_0: cpu@0 {
69 reg = <0>;
81 reg = <0x100>;
93 reg = <0x200>;
[all …]
/freebsd/contrib/llvm-project/lldb/source/Breakpoint/
H A DWatchpointAlgorithms.cpp3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
47 LLDB_LOGV(log, "AtomizeWatchpointRequest user request addr {0:x} size {1}", in AtomizeWatchpointRequest()
51 LLDB_LOGV(log, "AtomizeWatchpointRequest creating resource {0:x} size {1}", in AtomizeWatchpointRequest()
76 /// If a user asks to watch 4 bytes at address 0x1002 (0x1002-0x1005
78 /// (0x1002 and 0x1004) or with an 8-byte watchpoint at 0x1000.
79 /// A 4-byte watchpoint at 0x1002 would not be properly 4 byte aligned.
81 /// If a user asks to watch 16 bytes at 0x1000, and this target supports
83 /// at 0x1000 and 0x1008.
92 "AtomizeWatchpointRequest user request addr {0:x} size {1} " in PowerOf2Watchpoints()
98 if (user_size == 0) in PowerOf2Watchpoints()
[all …]
/freebsd/contrib/wpa/src/wps/
H A Dwps_defs.h25 #define WPS_VERSION 0x20
56 ATTR_AP_CHANNEL = 0x1001,
57 ATTR_ASSOC_STATE = 0x1002,
58 ATTR_AUTH_TYPE = 0x1003,
59 ATTR_AUTH_TYPE_FLAGS = 0x1004,
60 ATTR_AUTHENTICATOR = 0x1005,
61 ATTR_CONFIG_METHODS = 0x1008,
62 ATTR_CONFIG_ERROR = 0x1009,
63 ATTR_CONFIRM_URL4 = 0x100a,
64 ATTR_CONFIRM_URL6 = 0x100b,
[all …]
/freebsd/sys/dev/sound/pci/
H A Dallegro_code.h55 0x7980, 0x0030, 0x7980, 0x03B4, 0x7980, 0x03B4, 0x7980, 0x00FB, 0x7980,
56 0x00DD, 0x7980, 0x03B4, 0x7980, 0x0332, 0x7980, 0x0287, 0x7980, 0x03B4,
57 0x7980, 0x03B4, 0x7980, 0x03B4, 0x7980, 0x03B4, 0x7980, 0x031A, 0x7980,
58 0x03B4, 0x7980, 0x022F, 0x7980, 0x03B4, 0x7980, 0x03B4, 0x7980, 0x03B4,
59 0x7980, 0x03B4, 0x7980, 0x03B4, 0x7980, 0x0063, 0x7980, 0x006B, 0x7980,
60 0x03B4, 0x7980, 0x03B4, 0xBF80, 0x2C7C, 0x8806, 0x8804, 0xBE40, 0xBC20,
61 0xAE09, 0x1000, 0xAE0A, 0x0001, 0x6938, 0xEB08, 0x0053, 0x695A, 0xEB08,
62 0x00D6, 0x0009, 0x8B88, 0x6980, 0xE388, 0x0036, 0xBE30, 0xBC20, 0x6909,
63 0xB801, 0x9009, 0xBE41, 0xBE41, 0x6928, 0xEB88, 0x0078, 0xBE41, 0xBE40,
64 0x7980, 0x0038, 0xBE41, 0xBE41, 0x903A, 0x6938, 0xE308, 0x0056, 0x903A,
[all …]
/freebsd/contrib/llvm-project/llvm/include/llvm/DebugInfo/CodeView/
H A DCodeViewTypes.def3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
38 TYPE_RECORD(LF_POINTER, 0x1002, Pointer)
39 TYPE_RECORD(LF_MODIFIER, 0x1001, Modifier)
40 TYPE_RECORD(LF_PROCEDURE, 0x1008, Procedure)
41 TYPE_RECORD(LF_MFUNCTION, 0x1009, MemberFunction)
42 TYPE_RECORD(LF_LABEL, 0x000e, Label)
43 TYPE_RECORD(LF_ARGLIST, 0x1201, ArgList)
45 TYPE_RECORD(LF_FIELDLIST, 0x1203, FieldList)
47 TYPE_RECORD(LF_ARRAY, 0x1503, Array)
48 TYPE_RECORD(LF_CLASS, 0x1504, Class)
[all …]
H A DCodeViewSymbols.def3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
27 CV_SYMBOL(S_COMPILE , 0x0001)
28 CV_SYMBOL(S_REGISTER_16t , 0x0002)
29 CV_SYMBOL(S_CONSTANT_16t , 0x0003)
30 CV_SYMBOL(S_UDT_16t , 0x0004)
31 CV_SYMBOL(S_SSEARCH , 0x0005)
32 CV_SYMBOL(S_SKIP , 0x0007)
33 CV_SYMBOL(S_CVRESERVE , 0x0008)
34 CV_SYMBOL(S_OBJNAME_ST , 0x0009)
35 CV_SYMBOL(S_ENDARG , 0x000
[all...]
/freebsd/sys/dev/et/
H A Dif_etreg.h57 #define ET_PCIR_DEVICE_CAPS 0x4C
58 #define ET_PCIM_DEVICE_CAPS_MAX_PLSZ 0x7 /* Max playload size */
59 #define ET_PCIV_DEVICE_CAPS_PLSZ_128 0x0
60 #define ET_PCIV_DEVICE_CAPS_PLSZ_256 0x1
62 #define ET_PCIR_DEVICE_CTRL 0x50
63 #define ET_PCIM_DEVICE_CTRL_MAX_RRSZ 0x7000 /* Max read request size */
64 #define ET_PCIV_DEVICE_CTRL_RRSZ_2K 0x4000
66 #define ET_PCIR_MAC_ADDR0 0xA4
67 #define ET_PCIR_MAC_ADDR1 0xA8
69 #define ET_PCIR_EEPROM_STATUS 0xB2 /* XXX undocumented */
[all …]
/freebsd/sys/dev/dwc/
H A Ddwc1000_reg.h37 #define MAC_CONFIGURATION 0x0
47 #define MAC_FRAME_FILTER 0x4
53 #define FRAME_FILTER_PR (1 << 0) /* All Incoming Frames */
54 #define GMAC_MAC_HTHIGH 0x08
55 #define GMAC_MAC_HTLOW 0x0c
56 #define GMII_ADDRESS 0x10
57 #define GMII_ADDRESS_PA_MASK 0x1f /* Phy device */
59 #define GMII_ADDRESS_GR_MASK 0x1f /* Phy register */
61 #define GMII_ADDRESS_CR_MASK 0xf
64 #define GMII_ADDRESS_GB (1 << 0) /* Busy */
[all …]
/freebsd/sys/dev/eqos/
H A Dif_eqos_reg.h38 #define GMAC_MAC_CONFIGURATION 0x0000
49 #define GMAC_MAC_CONFIGURATION_RE (1U << 0)
50 #define GMAC_MAC_EXT_CONFIGURATION 0x0004
51 #define GMAC_MAC_PACKET_FILTER 0x0008
59 #define GMAC_MAC_PACKET_FILTER_PR (1U << 0)
60 #define GMAC_MAC_WATCHDOG_TIMEOUT 0x000C
61 #define GMAC_MAC_HASH_TABLE_REG0 0x0010
62 #define GMAC_MAC_HASH_TABLE_REG1 0x0014
63 #define GMAC_MAC_VLAN_TAG 0x0050
64 #define GMAC_MAC_Q0_TX_FLOW_CTRL 0x0070
[all …]

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