Searched +full:0 +full:x10017000 (Results 1 – 12 of 12) sorted by relevance
55 reg = <0x10017000 0x1000>;
43 /* 128 MiB memory @ 0x0 */44 reg = <0x00000000 0x08000000>;57 #clock-cells = <0>;63 #clock-cells = <0>;72 #clock-cells = <0>;74 clock-frequency = <0>;80 reg = <0x40000000 0x04000000>;90 reg = <0x44000000 0x04000000>;100 reg = <0x4e000000 0x10000>;110 reg = <0x4f000000 0x20000>;[all …]
44 /* 128 MiB memory @ 0x0 */45 reg = <0x00000000 0x08000000>;66 #clock-cells = <0>;72 #clock-cells = <0>;78 #clock-cells = <0>;87 #clock-cells = <0>;89 clock-frequency = <0>;95 reg = <0x40000000 0x04000000>;105 reg = <0x44000000 0x04000000>;115 reg = <0x4e000000 0x10000>;[all …]
45 /* 128 MiB memory @ 0x0 */46 reg = <0x00000000 0x08000000>;67 #clock-cells = <0>;73 #clock-cells = <0>;82 #clock-cells = <0>;84 clock-frequency = <0>;89 reg = <0x30000000 0x4000000>;98 reg = <0x38000000 0x800000>;113 reg = <0x3c000000 0x4000000>;121 reg = <0x3a000000 0x10000>;[all …]
45 * The PB11MPCore has 512 MiB memory @ 0x7000000046 * and the first 256 are also remapped @ 0x0000000048 reg = <0x70000000 0x20000000>;53 #size-cells = <0>;56 MP11_0: cpu@0 {59 reg = <0>;91 reg = <0x1f001000 0x1000>,92 <0x1f000100 0x100>;97 reg = <0x1f002000 0x1000>;99 interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>,[all …]
47 reg = <0x10040000 0x1000>;53 #clock-cells = <0>;59 #size-cells = <0>;62 cpu: cpu@0 {64 reg = <0>;88 reg = <0x10000000 0x20000>;93 reg = <0x10001000 0x1000>;104 reg = <0x10002000 0x1000>;111 reg = <0x10003000 0x1000>;120 reg = <0x10004000 0x1000>;[all …]
24 #size-cells = <0>;26 cluster0_opp: opp-table-0 {128 cpu0: cpu@0 {131 reg = <0x0>;135 i-cache-size = <0x8000>;138 d-cache-size = <0x8000>;151 reg = <0x1>;155 i-cache-size = <0x8000>;158 d-cache-size = <0x8000>;171 reg = <0x2>;[all …]
36 #clock-cells = <0>;45 #clock-cells = <0>;52 #clock-cells = <0>;59 #size-cells = <0>;61 cpu0: cpu@0 {64 reg = <0x000>;75 performance-domains = <&performance 0>;83 reg = <0x100>;94 performance-domains = <&performance 0>;102 reg = <0x200>;[all …]
293 #size-cells = <0>;327 cpu0: cpu@0 {330 reg = <0x000>;353 reg = <0x001>;376 reg = <0x002>;399 reg = <0x003>;422 reg = <0x100>;445 reg = <0x101>;468 reg = <0x102>;491 reg = <0x103>;[all …]
35 reg = <0 0x1000ce00 0 0x200>;336 #size-cells = <0>;374 cpu0: cpu@0 {377 reg = <0x000>;401 reg = <0x100>;425 reg = <0x200>;449 reg = <0x300>;473 reg = <0x400>;497 reg = <0x500>;521 reg = <0x600>;[all …]
59 #size-cells = <0>;61 cpu0: cpu@0 {64 reg = <0x000>;76 performance-domains = <&performance 0>;83 reg = <0x100>;95 performance-domains = <&performance 0>;102 reg = <0x200>;114 performance-domains = <&performance 0>;121 reg = <0x300>;133 performance-domains = <&performance 0>;[all …]
51 #size-cells = <0>;53 cpu0: cpu@0 {56 reg = <0x000>;58 performance-domains = <&performance 0>;75 reg = <0x100>;77 performance-domains = <&performance 0>;94 reg = <0x200>;96 performance-domains = <&performance 0>;113 reg = <0x300>;115 performance-domains = <&performance 0>;[all …]