/freebsd/sys/contrib/device-tree/Bindings/mfd/ |
H A D | mediatek,mt8195-scpsys.yaml | 51 reg = <0x10006000 0x100>; 56 #size-cells = <0>; 62 #power-domain-cells = <0>; 67 #power-domain-cells = <0>;
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/freebsd/sys/dts/arm/ |
H A D | versatilepb.dts | 19 reg = <0x10140000 0x1000>; 27 reg = <0x10003000 0x28>; 35 reg = <0x101f1000 0x1000>; 44 reg = <0x101f2000 0x1000>; 53 reg = <0x101f3000 0x1000>; 62 reg = <0x101e2000 0x40>; 70 reg = <0x10000044 0x4 71 0x10001000 0x1000 72 0x41000000 0x01000000 73 0x42000000 0x02000000>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm/hisilicon/ |
H A D | hip01.dtsi | 19 #address-cells = <0>; 21 reg = <0x1a001000 0x1000>, <0x1a000100 0x1000>; 26 #clock-cells = <0>; 36 ranges = <0 0x10000000 0x20000000>; 46 reg = <0x10001000 0x1000>; 50 interrupts = <0 32 4>; 56 reg = <0x10002000 0x1000>; 60 interrupts = <0 33 4>; 66 reg = <0x10003000 0x1000>; 70 interrupts = <0 34 4>; [all …]
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/freebsd/sys/contrib/device-tree/Bindings/soc/mediatek/ |
H A D | scpsys.txt | 39 CG: "mm-0", "mm-1", "mm-2", "mm-3", "isp-0", 40 "isp-1", "cam-0", "cam-1", "cam-2", 64 reg = <0 0x10006000 0 0x1000>;
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/freebsd/sys/contrib/device-tree/src/arm64/sprd/ |
H A D | sc9836.dtsi | 16 #size-cells = <0>; 18 cpu0: cpu@0 { 21 reg = <0x0 0x0>; 28 reg = <0x0 0x1>; 35 reg = <0x0 0x2>; 42 reg = <0x0 0x3>; 49 reg = <0 0x10003000 0 0x1000>; 63 reg = <0 0x10001000 0 0x1000>; 77 #size-cells = <0>; 79 port@0 { [all …]
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H A D | sc9860.dtsi | 16 #size-cells = <0>; 53 reg = <0x0 0x530000>; 61 reg = <0x0 0x530001>; 69 reg = <0x0 0x530002>; 77 reg = <0x0 0x530003>; 85 reg = <0x0 0x530100>; 93 reg = <0x0 0x530101>; 101 reg = <0x0 0x530102>; 109 reg = <0x0 0x530103>; 124 arm,psci-suspend-param = <0x00010002>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm64/mediatek/ |
H A D | mt8167.dtsi | 22 reg = <0 0x10000000 0 0x1000>; 28 reg = <0 0x10001000 0 0x1000>; 34 reg = <0 0x10018000 0 0x710>; 40 reg = <0 0x10006000 0 0x1000>; 45 #size-cells = <0>; 53 #power-domain-cells = <0>; 62 #power-domain-cells = <0>; 69 #power-domain-cells = <0>; 78 #size-cells = <0>; 85 #size-cells = <0>; [all …]
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H A D | mt6797.dtsi | 25 #size-cells = <0>; 27 cpu0: cpu@0 { 31 reg = <0x000>; 38 reg = <0x001>; 45 reg = <0x002>; 52 reg = <0x003>; 59 reg = <0x100>; 66 reg = <0x101>; 73 reg = <0x102>; 80 reg = <0x103>; [all …]
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H A D | mt6795.dtsi | 48 #size-cells = <0>; 50 cpu0: cpu@0 { 54 reg = <0x000>; 63 reg = <0x001>; 78 reg = <0x002>; 93 reg = <0x003>; 108 reg = <0x100>; 123 reg = <0x101>; 138 reg = <0x102>; 153 reg = <0x10 [all...] |
H A D | mt8365.dtsi | 24 #size-cells = <0>; 26 cluster0_opp: opp-table-0 { 128 cpu0: cpu@0 { 131 reg = <0x0>; 135 i-cache-size = <0x8000>; 138 d-cache-size = <0x8000>; 151 reg = <0x1>; 155 i-cache-size = <0x8000>; 158 d-cache-size = <0x8000>; 171 reg = <0x2>; [all …]
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H A D | mt7622.dtsi | 69 #size-cells = <0>; 71 cpu0: cpu@0 { 74 reg = <0x0 0x0>; 89 reg = <0x0 0x1>; 111 #clock-cells = <0>; 116 #clock-cells = <0>; 140 reg = <0 0x43000000 0 0x30000>; 150 thermal-sensors = <&thermal 0>; 216 reg = <0 0x10000000 0 0x1000>; 223 reg = <0 0x10001000 0 0x250>; [all …]
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H A D | mt2712e.dtsi | 22 cluster0_opp: opp-table-0 { 66 #size-cells = <0>; 85 cpu0: cpu@0 { 88 reg = <0x000>; 100 reg = <0x001>; 113 reg = <0x200>; 126 CPU_SLEEP_0: cpu-sleep-0 { 132 arm,psci-suspend-param = <0x0010000>; 135 CLUSTER_SLEEP_0: cluster-sleep-0 { 141 arm,psci-suspend-param = <0x1010000>; [all …]
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H A D | mt8173.dtsi | 53 cluster0_opp: opp-table-0 { 129 #size-cells = <0>; 151 cpu0: cpu@0 { 154 reg = <0x000>; 169 reg = <0x001>; 184 reg = <0x100>; 199 reg = <0x101>; 214 CPU_SLEEP_0: cpu-sleep-0 { 220 arm,psci-suspend-param = <0x0010000>; 242 cpu_suspend = <0x84000001>; [all …]
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H A D | mt8188.dtsi | 27 #size-cells = <0>; 29 cpu0: cpu@0 { 32 reg = <0x000>; 50 reg = <0x100>; 68 reg = <0x200>; 86 reg = <0x300>; 104 reg = <0x400>; 122 reg = <0x500>; 140 reg = <0x600>; 158 reg = <0x700>; [all …]
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H A D | mt8192.dtsi | 36 #clock-cells = <0>; 45 #clock-cells = <0>; 52 #clock-cells = <0>; 59 #size-cells = <0>; 61 cpu0: cpu@0 { 64 reg = <0x000>; 75 performance-domains = <&performance 0>; 83 reg = <0x100>; 94 performance-domains = <&performance 0>; 102 reg = <0x200>; [all …]
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H A D | mt8183.dtsi | 293 #size-cells = <0>; 327 cpu0: cpu@0 { 330 reg = <0x000>; 353 reg = <0x001>; 376 reg = <0x002>; 399 reg = <0x003>; 422 reg = <0x100>; 445 reg = <0x101>; 468 reg = <0x102>; 491 reg = <0x103>; [all …]
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/freebsd/sys/contrib/device-tree/Bindings/power/ |
H A D | mediatek,power-controller.yaml | 22 pattern: '^power-controller(@[0-9a-f]+)?$' 43 const: 0 46 "^power-domain@[0-9a-f]+$": 49 "^power-domain@[0-9a-f]+$": 52 "^power-domain@[0-9a-f]+$": 55 "^power-domain@[0-9a-f]+$": 73 Must be 0 for nodes representing a single PM domain and 1 for nodes 80 const: 0 107 and should contain a '-' in their name (i.e mm-0, isp-0, ca [all...] |
/freebsd/sys/contrib/device-tree/src/arm/arm/ |
H A D | arm-realview-eb.dtsi | 43 /* 128 MiB memory @ 0x0 */ 44 reg = <0x00000000 0x08000000>; 57 #clock-cells = <0>; 63 #clock-cells = <0>; 72 #clock-cells = <0>; 74 clock-frequency = <0>; 80 reg = <0x40000000 0x04000000>; 90 reg = <0x44000000 0x04000000>; 100 reg = <0x4e000000 0x10000>; 110 reg = <0x4f000000 0x20000>; [all …]
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H A D | arm-realview-pbx.dtsi | 44 /* 128 MiB memory @ 0x0 */ 45 reg = <0x00000000 0x08000000>; 66 #clock-cells = <0>; 72 #clock-cells = <0>; 78 #clock-cells = <0>; 87 #clock-cells = <0>; 89 clock-frequency = <0>; 95 reg = <0x40000000 0x04000000>; 105 reg = <0x44000000 0x04000000>; 115 reg = <0x4e000000 0x10000>; [all …]
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H A D | arm-realview-pb1176.dts | 45 /* 128 MiB memory @ 0x0 */ 46 reg = <0x00000000 0x08000000>; 67 #clock-cells = <0>; 73 #clock-cells = <0>; 82 #clock-cells = <0>; 84 clock-frequency = <0>; 89 reg = <0x30000000 0x4000000>; 98 reg = <0x38000000 0x800000>; 113 reg = <0x3c000000 0x4000000>; 121 reg = <0x3a000000 0x10000>; [all …]
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H A D | arm-realview-pb11mp.dts | 45 * The PB11MPCore has 512 MiB memory @ 0x70000000 46 * and the first 256 are also remapped @ 0x00000000 48 reg = <0x70000000 0x20000000>; 53 #size-cells = <0>; 56 MP11_0: cpu@0 { 59 reg = <0>; 91 reg = <0x1f001000 0x1000>, 92 <0x1f000100 0x100>; 97 reg = <0x1f002000 0x1000>; 99 interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>, [all …]
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/freebsd/sys/contrib/device-tree/src/arm/mediatek/ |
H A D | mt7629.dtsi | 24 #size-cells = <0>; 27 cpu0: cpu@0 { 30 reg = <0x0>; 38 reg = <0x1>; 51 clk20m: oscillator-0 { 53 #clock-cells = <0>; 60 #clock-cells = <0>; 83 reg = <0x10000000 0x1000>; 89 reg = <0x10002000 0x1000>; 97 reg = <0x10006000 0x1000>; [all …]
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H A D | mt2701.dtsi | 25 #size-cells = <0>; 28 cpu@0 { 31 reg = <0x0>; 36 reg = <0x1>; 41 reg = <0x2>; 46 reg = <0x3>; 57 reg = <0 0x80002000 0 0x1000>; 64 #clock-cells = <0>; 70 #clock-cells = <0>; 73 clk26m: oscillator@0 { [all …]
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H A D | mt7623.dtsi | 73 #size-cells = <0>; 76 cpu0: cpu@0 { 79 reg = <0x0>; 91 reg = <0x1>; 103 reg = <0x2>; 115 reg = <0x3>; 137 #clock-cells = <0>; 142 #clock-cells = <0>; 147 clk26m: oscillator-0 { 149 #clock-cells = <0>; [all …]
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/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/ |
H A D | imx27.dtsi | 47 reg = <0x10040000 0x1000>; 53 #clock-cells = <0>; 59 #size-cells = <0>; 62 cpu: cpu@0 { 64 reg = <0>; 88 reg = <0x10000000 0x20000>; 93 reg = <0x10001000 0x1000>; 104 reg = <0x10002000 0x1000>; 111 reg = <0x10003000 0x1000>; 120 reg = <0x10004000 0x1000>; [all …]
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