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/linux/Documentation/devicetree/bindings/spi/
H A Dst,stm32-qspi.yaml69 reg = <0x58003000 0x1000>, <0x70000000 0x10000000>;
72 dmas = <&mdma1 22 0x10 0x100002 0x0 0x0>,
73 <&mdma1 22 0x10 0x100008 0x0 0x0>;
79 #size-cells = <0>;
81 flash@0 {
83 reg = <0>;
/linux/arch/m68k/include/asm/
H A Dm523xsim.h24 #define MCFICM_INTC0 (MCF_IPSBAR + 0x0c00) /* Base for Interrupt Ctrl 0 */
25 #define MCFICM_INTC1 (MCF_IPSBAR + 0x0d00) /* Base for Interrupt Ctrl 0 */
27 #define MCFINTC_IPRH 0x00 /* Interrupt pending 32-63 */
28 #define MCFINTC_IPRL 0x04 /* Interrupt pending 1-31 */
29 #define MCFINTC_IMRH 0x08 /* Interrupt mask 32-63 */
30 #define MCFINTC_IMRL 0x0c /* Interrupt mask 1-31 */
31 #define MCFINTC_INTFRCH 0x10 /* Interrupt force 32-63 */
32 #define MCFINTC_INTFRCL 0x14 /* Interrupt force 1-31 */
33 #define MCFINTC_IRLR 0x18 /* */
34 #define MCFINTC_IACKL 0x19 /* */
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H A Dm527xsim.h24 #define MCFICM_INTC0 (MCF_IPSBAR + 0x0c00) /* Base for Interrupt Ctrl 0 */
25 #define MCFICM_INTC1 (MCF_IPSBAR + 0x0d00) /* Base for Interrupt Ctrl 1 */
27 #define MCFINTC_IPRH 0x00 /* Interrupt pending 32-63 */
28 #define MCFINTC_IPRL 0x04 /* Interrupt pending 1-31 */
29 #define MCFINTC_IMRH 0x08 /* Interrupt mask 32-63 */
30 #define MCFINTC_IMRL 0x0c /* Interrupt mask 1-31 */
31 #define MCFINTC_INTFRCH 0x10 /* Interrupt force 32-63 */
32 #define MCFINTC_INTFRCL 0x14 /* Interrupt force 1-31 */
33 #define MCFINTC_IRLR 0x18 /* */
34 #define MCFINTC_IACKL 0x19 /* */
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/linux/sound/pci/hda/
H A Dpatch_realtek.c166 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_COEF_INDEX, coef_idx); in __alc_read_coefex_idx()
167 val = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_PROC_COEF, 0); in __alc_read_coefex_idx()
183 alc_read_coefex_idx(codec, 0x20, coef_idx)
188 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_COEF_INDEX, coef_idx); in __alc_write_coefex_idx()
189 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_PROC_COEF, coef_val); in __alc_write_coefex_idx()
201 alc_write_coefex_idx(codec, 0x20, coef_idx, coef_val)
224 alc_update_coefex_idx(codec, 0x20, coef_idx, mask, bits_set)
226 /* a special bypass for COEF 0; read the cached value at the second time */
232 spec->coef0 = alc_read_coef_idx(codec, 0); in alc_get_coef0()
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