Searched +full:0 +full:x0c900000 (Results 1 – 6 of 6) sorted by relevance
62 "^display-controller@[0-9a-f]+$":121 port@0:130 - port@0164 reg = <0x0c900000 0x1000>;178 iommus = <&mmss_smmu 0>;185 reg = <0x0c901000 0x8f000>,186 <0x0c9a8e00 0xf0>,187 <0x0c9b0000 0x2008>,188 <0x0c9b8000 0x1040>;199 interrupts = <0>;[all …]
39 "^display-controller@[0-9a-f]+$":47 "^dsi@[0-9a-f]+$":57 "^phy@[0-9a-f]+$":79 reg = <0x0c900000 0x1000>;93 iommus = <&mmss_smmu 0>;100 reg = <0x0c901000 0x8f000>,101 <0x0c9a8e0[all...]
35 #clock-cells = <0>;42 #clock-cells = <0>;50 #size-cells = <0>;55 reg = <0x0 0x100>;75 reg = <0x0 0x101>;90 reg = <0x0 0x102>;105 reg = <0x0 0x103>;117 CPU4: cpu@0 {120 reg = <0x0 0x0>;140 reg = <0x0 0x1>;[all …]
16 qcom,msm-id = <292 0x0>;26 reg = <0x0 0x80000000 0x0 0x0>;35 reg = <0x0 0x85800000 0x0 0x600000>;40 reg = <0x0 0x85e00000 0x0 0x100000>;45 reg = <0x0 0x86000000 0x0 0x200000>;50 reg = <0x0 0x86200000 0x0 0x2d00000>;56 reg = <0x0 0x88f00000 0x0 0x200000>;64 reg = <0x0 0x8ab00000 0x0 0x700000>;69 reg = <0x0 0x8b200000 0x0 0x1a00000>;74 reg = <0x0 0x8cc00000 0x0 0x7000000>;[all …]
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.206 let hasSideEffects = 0, Predicates = [HasExtLASX] in {208 let mayLoad = 0, mayStore = 0 in {209 def XVADD_B : LASX3R_XXX<0x740a0000>;210 def XVADD_H : LASX3R_XXX<0x740a8000>;211 def XVADD_W : LASX3R_XXX<0x740b0000>;212 def XVADD_D : LASX3R_XXX<0x740b8000>;213 def XVADD_Q : LASX3R_XXX<0x752d0000>;215 def XVSUB_B : LASX3R_XXX<0x740c0000>;216 def XVSUB_H : LASX3R_XXX<0x740c8000>;[all …]
1 0x00 = 0x000000002 0x01 = 0x010000003 0x02 = 0x020000004 0x03 = 0x030000005 0x04 = 0x040000006 0x05 = 0x050000007 0x06 = 0x060000008 0x07 = 0x070000009 0x08 = 0x0800000010 0x09 = 0x09000000[all …]