Searched +full:0 +full:x0c40a000 (Results 1 – 8 of 8) sorted by relevance
/linux/Documentation/devicetree/bindings/mfd/ |
H A D | qcom,spmi-pmic.yaml | 30 - pattern: '^pm(a|s)?[0-9]*@.*$' 110 const: 0 125 "^adc@[0-9a-f]+$": 132 "^adc-tm@[0-9a-f]+$": 136 "^audio-codec@[0-9a-f]+$": 140 "^battery@[0-9a-f]+$": 145 "^charger@[0-9a-f]+$": 153 "gpio@[0-9a-f]+$": 157 "^led-controller@[0-9a-f]+$": 161 "^nvram@[0-9a-f]+$": [all …]
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/linux/arch/arm/boot/dts/qcom/ |
H A D | qcom-sdx55.dtsi | 20 qcom,msm-id = <357 0x10000>, <368 0x10000>, <418 0x10000>; 25 reg = <0 0>; 31 #clock-cells = <0>; 38 #clock-cells = <0>; 44 #clock-cells = <0>; 51 #size-cells = <0>; 53 cpu0: cpu@0 { 56 reg = <0x0>; 108 reg = <0x8fc00000 0x80000>; 113 reg = <0x8fc80000 0x40000>; [all …]
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/linux/arch/arm64/boot/dts/qcom/ |
H A D | sdm670.dtsi | 33 #size-cells = <0>; 35 CPU0: cpu@0 { 38 reg = <0x0 0x0>; 42 qcom,freq-domain = <&cpufreq_hw 0>; 65 reg = <0x0 0x100>; 69 qcom,freq-domain = <&cpufreq_hw 0>; 87 reg = <0x0 0x200>; 91 qcom,freq-domain = <&cpufreq_hw 0>; 109 reg = <0x0 0x300>; 113 qcom,freq-domain = <&cpufreq_hw 0>; [all …]
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H A D | sm6350.dtsi | 32 #clock-cells = <0>; 40 #clock-cells = <0>; 46 #size-cells = <0>; 48 CPU0: cpu@0 { 51 reg = <0x0 0x0>; 52 clocks = <&cpufreq_hw 0>; 57 qcom,freq-domain = <&cpufreq_hw 0>; 81 reg = <0x0 0x100>; 82 clocks = <&cpufreq_hw 0>; 87 qcom,freq-domain = <&cpufreq_hw 0>; [all …]
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H A D | sc7180.dtsi | 66 #clock-cells = <0>; 72 #clock-cells = <0>; 78 #size-cells = <0>; 80 CPU0: cpu@0 { 83 reg = <0x0 0x0>; 84 clocks = <&cpufreq_hw 0>; 95 qcom,freq-domain = <&cpufreq_hw 0>; 112 reg = <0x0 0x100>; 113 clocks = <&cpufreq_hw 0>; 124 qcom,freq-domain = <&cpufreq_hw 0>; [all …]
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H A D | sdm845.dtsi | 78 #clock-cells = <0>; 85 #clock-cells = <0>; 92 #size-cells = <0>; 94 CPU0: cpu@0 { 97 reg = <0x0 0x0>; 98 clocks = <&cpufreq_hw 0>; 102 qcom,freq-domain = <&cpufreq_hw 0>; 126 reg = <0x0 0x100>; 127 clocks = <&cpufreq_hw 0>; 131 qcom,freq-domain = <&cpufreq_hw 0>; [all …]
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H A D | sc8280xp.dtsi | 33 #clock-cells = <0>; 38 #clock-cells = <0>; 45 #size-cells = <0>; 47 CPU0: cpu@0 { 50 reg = <0x0 0x0>; 51 clocks = <&cpufreq_hw 0>; 58 qcom,freq-domain = <&cpufreq_hw 0>; 78 reg = <0x0 0x100>; 79 clocks = <&cpufreq_hw 0>; 86 qcom,freq-domain = <&cpufreq_hw 0>; [all …]
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H A D | sc7280.dtsi | 81 #clock-cells = <0>; 87 #clock-cells = <0>; 98 reg = <0x0 0x004cd000 0x0 0x1000>; 102 reg = <0x0 0x80000000 0x0 0x600000>; 107 reg = <0x0 0x80600000 0x0 0x200000>; 112 reg = <0x0 0x80800000 0x0 0x60000>; 117 reg = <0x0 0x80860000 0x0 0x20000>; 123 reg = <0x0 0x80884000 0x0 0x10000>; 128 reg = <0x0 0x808ff000 0x0 0x1000>; 133 reg = <0x0 0x80900000 0x0 0x200000>; [all …]
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