Searched +full:0 +full:x0accb000 (Results 1 – 7 of 7) sorted by relevance
| /freebsd/sys/contrib/device-tree/Bindings/media/ |
| H A D | qcom,x1e80100-camss.yaml | 121 vdd-csiphy-0p8-supply:
136 "^port@[0-3]$":
174 - vdd-csiphy-0p8-supply
196 reg = <0 0x0acb7000 0 0x2000>,
197 <0 0x0acb9000 0 0x2000>,
198 <0 0x0acbb000 0 0x2000>,
199 <0 0x0acc6000 0 0x1000>,
200 <0 0x0acca000 0 0x1000>,
201 <0 0x0acb6000 0 0x1000>,
202 <0 0x0ace4000 0 0x1000>,
[all …]
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| H A D | qcom,sc7280-camss.yaml | 141 port@0:
145 Input port for receiving CSI data on CSIPHY 0.
270 reg = <0x0 0x0acb3000 0x0 0x1000>,
271 <0x0 0x0acba000 0x0 0x1000>,
272 <0x0 0x0acc1000 0x0 0x1000>,
273 <0x0 0x0acc8000 0x0 0x1000>,
274 <0x0 0x0accf000 0x0 0x1000>,
275 <0x0 0x0ace0000 0x0 0x2000>,
276 <0x0 0x0ace2000 0x0 0x2000>,
277 <0x0 0x0ace4000 0x0 0x2000>,
[all …]
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| H A D | qcom,sc8280xp-camss.yaml | 127 port@0:
306 reg = <0 0x0ac5a000 0 0x2000>,
307 <0 0x0ac5c000 0 0x2000>,
308 <0 0x0ac65000 0 0x2000>,
309 <0 0x0ac67000 0 0x2000>,
310 <0 0x0acaf000 0 0x4000>,
311 <0 0x0acb3000 0 0x1000>,
312 <0 0x0acb6000 0 0x4000>,
313 <0 0x0acba000 0 0x1000>,
314 <0 0x0acbd000 0 0x4000>,
[all …]
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| H A D | qcom,sm8550-camss.yaml | 150 port@0:
409 reg = <0 0x0acb7000 0 0xd00>,
410 <0 0x0acb9000 0 0xd00>,
411 <0 0x0acbb000 0 0xd00>,
412 <0 0x0acca000 0 0xa00>,
413 <0 0x0acce000 0 0xa00>,
414 <0 0x0acb6000 0 0x1000>,
415 <0 0x0ace4000 0 0x2000>,
416 <0 0x0ace6000 0 0x2000>,
417 <0 0x0ace8000 0 0x2000>,
[all …]
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| /freebsd/sys/contrib/device-tree/src/arm64/qcom/ |
| H A D | sc8280xp.dtsi | 33 #clock-cells = <0>;
38 #clock-cells = <0>;
45 #size-cells = <0>;
47 cpu0: cpu@0 {
50 reg = <0x0 0x0>;
51 clocks = <&cpufreq_hw 0>;
58 qcom,freq-domain = <&cpufreq_hw 0>;
78 reg = <0x0 0x100>;
79 clocks = <&cpufreq_hw 0>;
86 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]
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| H A D | sm8550.dtsi | 40 #clock-cells = <0>;
45 #clock-cells = <0>;
49 #clock-cells = <0>;
57 #clock-cells = <0>;
67 #size-cells = <0>;
69 cpu0: cpu@0 {
72 reg = <0 0>;
73 clocks = <&cpufreq_hw 0>;
78 qcom,freq-domain = <&cpufreq_hw 0>;
98 reg = <0 0x100>;
[all …]
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| H A D | sc7280.dtsi | 83 #clock-cells = <0>;
89 #clock-cells = <0>;
100 reg = <0x0 0x004cd000 0x0 0x1000>;
104 reg = <0x0 0x80000000 0x0 0x600000>;
109 reg = <0x0 0x80600000 0x0 0x200000>;
114 reg = <0x0 0x80800000 0x0 0x60000>;
119 reg = <0x0 0x80860000 0x0 0x20000>;
125 reg = <0x0 0x80884000 0x0 0x10000>;
130 reg = <0x0 0x808ff000 0x0 0x1000>;
135 reg = <0x0 0x80900000 0x0 0x200000>;
[all …]
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