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/linux/Documentation/devicetree/bindings/clock/
H A Dqcom,sa8775p-videocc.yaml53 reg = <0x0abf0000 0x10000>;
H A Dqcom,sm8350-videocc.yaml60 reg = <0x0abf0000 0x10000>;
/linux/arch/arm64/boot/dts/qcom/
H A Dmonaco.dtsi33 #clock-cells = <0>;
39 #clock-cells = <0>;
46 #size-cells = <0>;
48 cpu0: cpu@0 {
51 reg = <0x0 0x0>;
58 qcom,freq-domain = <&cpufreq_hw 0>;
76 reg = <0x0 0x100>;
83 qcom,freq-domain = <&cpufreq_hw 0>;
101 reg = <0x0 0x200>;
126 reg = <0x0 0x300>;
[all …]
H A Dsm8250.dtsi81 #clock-cells = <0>;
89 #clock-cells = <0>;
95 #size-cells = <0>;
97 cpu0: cpu@0 {
100 reg = <0x0 0x0>;
101 clocks = <&cpufreq_hw 0>;
108 qcom,freq-domain = <&cpufreq_hw 0>;
110 interconnects = <&gem_noc MASTER_AMPSS_M0 0 &mc_virt SLAVE_EBI_CH0 0>,
116 cache-size = <0x20000>;
122 cache-size = <0x400000>;
[all …]
H A Dlemans.dtsi34 #clock-cells = <0>;
39 #clock-cells = <0>;
45 #size-cells = <0>;
47 cpu0: cpu@0 {
50 reg = <0x0 0x0>;
54 qcom,freq-domain = <&cpufreq_hw 0>;
79 reg = <0x0 0x100>;
83 qcom,freq-domain = <&cpufreq_hw 0>;
103 reg = <0x0 0x200>;
107 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]