Home
last modified time | relevance | path

Searched +full:0 +full:x0480 (Results 1 – 25 of 41) sorted by relevance

12

/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx6ul-pinfunc.h13 #define MX6UL_PAD_BOOT_MODE0__GPIO5_IO10 0x0014 0x02a0 0x0000 5 0
14 #define MX6UL_PAD_BOOT_MODE1__GPIO5_IO11 0x0018 0x02a4 0x0000 5 0
16 #define MX6UL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x001c 0x02a8 0x0000 5 0
17 #define MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x0020 0x02ac 0x0000 5 0
18 #define MX6UL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x0024 0x02b0 0x0000 5 0
19 #define MX6UL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x0028 0x02b4 0x0000 5 0
20 #define MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x002c 0x02b8 0x0000 5 0
21 #define MX6UL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x0030 0x02bc 0x0000 5 0
22 #define MX6UL_PAD_SNVS_TAMPER6__GPIO5_IO06 0x0034 0x02c0 0x0000 5 0
23 #define MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x0038 0x02c4 0x0000 5 0
[all …]
H A Dimx6sll-pinfunc.h15 #define MX6SLL_PAD_WDOG_B__WDOG1_B 0x0014 0x02DC 0x0000 0x0 0x0
16 #define MX6SLL_PAD_WDOG_B__WDOG1_RESET_B_DEB 0x0014 0x02DC 0x0000 0x1 0x0
17 #define MX6SLL_PAD_WDOG_B__UART5_RI_B 0x0014 0x02DC 0x0000 0x2 0x0
18 #define MX6SLL_PAD_WDOG_B__GPIO3_IO18 0x0014 0x02DC 0x0000 0x5 0x0
19 #define MX6SLL_PAD_REF_CLK_24M__XTALOSC_REF_CLK_24M 0x0018 0x02E0 0x0000 0x0 0x0
20 #define MX6SLL_PAD_REF_CLK_24M__I2C3_SCL 0x0018 0x02E0 0x068C 0x1 0x0
21 #define MX6SLL_PAD_REF_CLK_24M__PWM3_OUT 0x0018 0x02E0 0x0000 0x2 0x0
22 #define MX6SLL_PAD_REF_CLK_24M__USB_OTG2_ID 0x0018 0x02E0 0x0560 0x3 0x0
23 #define MX6SLL_PAD_REF_CLK_24M__CCM_PMIC_READY 0x0018 0x02E0 0x05AC 0x4 0x0
24 #define MX6SLL_PAD_REF_CLK_24M__GPIO3_IO21 0x0018 0x02E0 0x0000 0x5 0x0
[all …]
H A Dimx7d-pinfunc.h14 #define MX7D_PAD_LPSR_GPIO1_IO00__GPIO1_IO0 0x0000 0x0030 0x0000 0x0 0x0
15 #define MX7D_PAD_LPSR_GPIO1_IO00__PWM4_OUT 0x0000 0x0030 0x0000 0x1 0x0
16 #define MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_ANY 0x0000 0x0030 0x0000 0x2 0x0
17 #define MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B 0x0000 0x0030 0x0000 0x3 0x0
18 #define MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG__RST_B_DEB 0x0000 0x0030 0x0000 0x4 0x0
19 #define MX7D_PAD_LPSR_GPIO1_IO01__GPIO1_IO1 0x0004 0x0034 0x0000 0x0 0x0
20 #define MX7D_PAD_LPSR_GPIO1_IO01__PWM1_OUT 0x0004 0x0034 0x0000 0x1 0x0
21 #define MX7D_PAD_LPSR_GPIO1_IO01__CCM_ENET_REF_CLK3 0x0004 0x0034 0x0000 0x2 0x0
22 #define MX7D_PAD_LPSR_GPIO1_IO01__SAI1_MCLK 0x0004 0x0034 0x0000 0x3 0x0
23 #define MX7D_PAD_LPSR_GPIO1_IO01__ANATOP_24M_OUT 0x0004 0x0034 0x0000 0x4 0x0
[all …]
H A Dimx6ull-pinfunc.h16 #define MX6UL_PAD_UART5_TX_DATA__UART5_DTE_RX 0x00BC 0x0348 0x0644 0x0 0x6
18 #define MX6UL_PAD_UART5_RX_DATA__UART5_DCE_RX 0x00C0 0x034C 0x0644 0x0 0x7
20 #define MX6UL_PAD_ENET1_RX_EN__UART5_DCE_RTS 0x00CC 0x0358 0x0640 0x1 0x5
22 #define MX6UL_PAD_ENET1_TX_DATA0__UART5_DTE_RTS 0x00D0 0x035C 0x0640 0x1 0x6
24 #define MX6UL_PAD_CSI_DATA02__UART5_DCE_RTS 0x01EC 0x0478 0x0640 0x8 0x7
27 #define MX6ULL_PAD_UART1_TX_DATA__UART5_DCE_TX 0x0084 0x0310 0x0000 0x9 0x0
28 #define MX6ULL_PAD_UART1_TX_DATA__UART5_DTE_RX 0x0084 0x0310 0x0644 0x9 0x4
29 #define MX6ULL_PAD_UART1_RX_DATA__UART5_DCE_RX 0x0088 0x0314 0x0644 0x9 0x5
30 #define MX6ULL_PAD_UART1_RX_DATA__UART5_DTE_TX 0x0088 0x0314 0x0000 0x9 0x0
31 #define MX6ULL_PAD_UART1_CTS_B__UART5_DCE_CTS 0x008C 0x0318 0x0000 0x9 0x0
[all …]
H A Dimx6sx-pinfunc.h13 #define MX6SX_PAD_GPIO1_IO00__I2C1_SCL 0x0014 0x035C 0x07A8 0x0 0x1
14 #define MX6SX_PAD_GPIO1_IO00__USDHC1_VSELECT 0x0014 0x035C 0x0000 0x1 0x0
15 #define MX6SX_PAD_GPIO1_IO00__SPDIF_LOCK 0x0014 0x035C 0x0000 0x2 0x0
16 #define MX6SX_PAD_GPIO1_IO00__CCM_WAIT 0x0014 0x035C 0x0000 0x3 0x0
17 #define MX6SX_PAD_GPIO1_IO00__WDOG1_WDOG_ANY 0x0014 0x035C 0x0000 0x4 0x0
18 #define MX6SX_PAD_GPIO1_IO00__GPIO1_IO_0 0x0014 0x035C 0x0000 0x5 0x0
19 #define MX6SX_PAD_GPIO1_IO00__SNVS_HP_WRAPPER_VIO_5 0x0014 0x035C 0x0000 0x6 0x0
20 #define MX6SX_PAD_GPIO1_IO00__PHY_DTB_1 0x0014 0x035C 0x0000 0x7 0x0
21 #define MX6SX_PAD_GPIO1_IO01__I2C1_SDA 0x0018 0x0360 0x07AC 0x0 0x1
22 #define MX6SX_PAD_GPIO1_IO01__USDHC1_RESET_B 0x0018 0x0360 0x0000 0x1 0x0
[all …]
/freebsd/sys/contrib/device-tree/Bindings/pinctrl/
H A Damlogic,meson-pinctrl-a1.yaml27 "^bank@[0-9a-f]+$":
58 reg = <0x0400 0x003c>,
59 <0x0480 0x0118>;
63 gpio-ranges = <&periphs_pinctrl 0 0 62>;
/freebsd/sys/dev/syscons/
H A Dscvgarndr.c54 #define SC_RENDER_DEBUG 0
108 RENDERER(mda, 0, txtrndrsw, vga_set);
109 RENDERER(cga, 0, txtrndrsw, vga_set);
110 RENDERER(ega, 0, txtrndrsw, vga_set);
111 RENDERER(vga, 0, txtrndrsw, vga_set);
161 0xC000, 0xA000, 0x9000, 0x8800, 0x8400, 0x8200, 0x8100, 0x8200,
162 0x8400, 0x8400, 0x8400, 0x9200, 0xB200, 0xA900, 0xC900, 0x8600, }, {
163 0x0000, 0x4000, 0x6000, 0x7000, 0x7800, 0x7C00, 0x7E00, 0x7C00,
164 0x7800, 0x7800, 0x7800, 0x6C00, 0x4C00, 0x4600, 0x0600, 0x0000, },
169 0xC000, 0xA000, 0x9000, 0x8800, 0x8400, 0x8200, 0x8100, 0x8700,
[all …]
/freebsd/contrib/llvm-project/lld/MachO/Arch/
H A DARM64Common.h3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
40 // 25 0
49 // significant bits are 0. They are right shifted off the end. in encodeBranch26()
50 llvm::support::endian::write32le(loc, base | bitField(va, 2, 26, 0)); in encodeBranch26()
56 llvm::support::endian::write32le(loc, base | bitField(va, 2, 26, 0)); in encodeBranch26()
89 int scale = 0; in encodePageOff12()
90 if ((base & 0x3b00'0000) == 0x3900'0000) { // load/store in encodePageOff12()
92 if (scale == 0 && (base & 0x0480'0000) == 0x0480'0000) // 128-bit variant in encodePageOff12()
96 if ((va & (size - 1)) != 0) in encodePageOff12()
99 // TODO(gkm): extract embedded addend and warn if != 0 in encodePageOff12()
[all …]
/freebsd/sys/dev/usb/wlan/
H A Dif_uralreg.h24 #define RAL_FRAME_SIZE 0x780 /* NOTE: using 0x980 does not work */
27 #define RAL_IFACE_INDEX 0
29 #define RAL_VENDOR_REQUEST 0x01
30 #define RAL_WRITE_MAC 0x02
31 #define RAL_READ_MAC 0x03
32 #define RAL_WRITE_MULTI_MAC 0x06
33 #define RAL_READ_MULTI_MAC 0x07
34 #define RAL_READ_EEPROM 0x09
39 #define RAL_MAC_CSR0 0x0400 /* ASIC Version */
40 #define RAL_MAC_CSR1 0x0402 /* System control */
[all …]
H A Dif_urtw.c67 static SYSCTL_NODE(_hw_usb, OID_AUTO, urtw, CTLFLAG_RW | CTLFLAG_MPSAFE, 0,
70 int urtw_debug = 0;
71 SYSCTL_INT(_hw_usb_urtw, OID_AUTO, debug, CTLFLAG_RWTUN, &urtw_debug, 0,
74 URTW_DEBUG_XMIT = 0x00000001, /* basic xmit operation */
75 URTW_DEBUG_RECV = 0x00000002, /* basic recv operation */
76 URTW_DEBUG_RESET = 0x00000004, /* reset processing */
77 URTW_DEBUG_TX_PROC = 0x00000008, /* tx ISR proc */
78 URTW_DEBUG_RX_PROC = 0x00000010, /* rx ISR proc */
79 URTW_DEBUG_STATE = 0x00000020, /* 802.11 state transitions */
80 URTW_DEBUG_STAT = 0x00000040, /* statistic */
[all …]
/freebsd/sys/powerpc/include/
H A Dtrap.h39 #define EXC_RSVD 0x0000 /* Reserved */
40 #define EXC_RST 0x0100 /* Reset; all but IBM4xx */
41 #define EXC_MCHK 0x0200 /* Machine Check */
42 #define EXC_DSI 0x0300 /* Data Storage Interrupt */
43 #define EXC_DSE 0x0380 /* Data Segment Interrupt */
44 #define EXC_ISI 0x0400 /* Instruction Storage Interrupt */
45 #define EXC_ISE 0x0480 /* Instruction Segment Interrupt */
46 #define EXC_EXI 0x0500 /* External Interrupt */
47 #define EXC_ALI 0x0600 /* Alignment Interrupt */
48 #define EXC_PGM 0x0700 /* Program Interrupt */
[all …]
/freebsd/contrib/wpa/src/wps/
H A Dwps_defs.h25 #define WPS_VERSION 0x20
56 ATTR_AP_CHANNEL = 0x1001,
57 ATTR_ASSOC_STATE = 0x1002,
58 ATTR_AUTH_TYPE = 0x1003,
59 ATTR_AUTH_TYPE_FLAGS = 0x1004,
60 ATTR_AUTHENTICATOR = 0x1005,
61 ATTR_CONFIG_METHODS = 0x1008,
62 ATTR_CONFIG_ERROR = 0x1009,
63 ATTR_CONFIRM_URL4 = 0x100a,
64 ATTR_CONFIRM_URL6 = 0x100b,
[all …]
/freebsd/sys/contrib/dev/rtw88/
H A Drtw8821c.h13 u8 res4[4]; /* 0xd0 */
15 u8 res5[0x1e];
17 u8 serial[0x0b]; /* 0xf5 */
18 u8 vid; /* 0x100 */
22 u8 mac_addr[ETH_ALEN]; /* 0x107 */
24 u8 vendor_name[0x07];
26 u8 device_name[0x14];
27 u8 res11[0xcf];
28 u8 package_type; /* 0x1f
[all...]
/freebsd/sys/contrib/device-tree/src/arm64/amlogic/
H A Dmeson-a1.dtsi23 #size-cells = <0>;
25 cpu0: cpu@0 {
28 reg = <0x0 0x0>;
37 reg = <0x0 0x1>;
72 size = <0x0 0x800000>;
73 alignment = <0x0 0x400000>;
95 reg = <0x0 0xfd000400 0x0 0x290>;
98 #size-cells = <0>;
105 reg = <0x0 0xfe000000 0x0 0x1000000>;
108 ranges = <0x0 0x0 0x0 0xfe000000 0x0 0x1000000>;
[all …]
/freebsd/sys/dev/uart/
H A Duart_bus_pci.c82 #define PCI_NO_MSI 0x40000000
83 #define PCI_RID_MASK 0x0000ffff
86 { 0x1028, 0x0008, 0xffff, 0, "Dell Remote Access Card III", 0x14,
88 { 0x1028, 0x0012, 0xffff, 0, "Dell RAC 4 Daughter Card Virtual UART", 0x14,
90 { 0x1033, 0x0074, 0x1033, 0x8014, "NEC RCV56ACF 56k Voice Modem", 0x10 },
91 { 0x1033, 0x007d, 0x1033, 0x8012, "NEC RS232C", 0x10 },
92 { 0x103c, 0x1048, 0x103c, 0x1227, "HP Diva Serial [GSP] UART - Powerbar SP2",
93 0x10 },
94 { 0x103c, 0x1048, 0x103c, 0x1301, "HP Diva RMP3", 0x14 },
95 { 0x103c, 0x1290, 0xffff, 0, "HP Auxiliary Diva Serial Port", 0x18 },
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dimx95-pinfunc.h13 #define IMX95_PAD_DAP_TDI__JTAG_MUX_TDI 0x0000 0x0204 0x0610 0x00 0x00
14 #define IMX95_PAD_DAP_TDI__NETCMIX_TOP_MQS2_LEFT 0x0000 0x0204 0x0000 0x01 0x00
15 #define IMX95_PAD_DAP_TDI__NETCMIX_TOP_NETC_TMR_1588_ALARM1 0x0000 0x0204 0x0000 0x02 0x00
16 #define IMX95_PAD_DAP_TDI__CAN2_TX 0x0000 0x0204 0x0000 0x03 0x00
17 #define IMX95_PAD_DAP_TDI__FLEXIO2_FLEXIO_BIT30 0x0000 0x0204 0x0000 0x04 0x00
18 #define IMX95_PAD_DAP_TDI__GPIO3_IO_BIT28 0x0000 0x0204 0x0000 0x05 0x00
19 #define IMX95_PAD_DAP_TDI__LPUART5_RX 0x0000 0x0204 0x0570 0x06 0x00
21 #define IMX95_PAD_DAP_TMS_SWDIO__JTAG_MUX_TMS 0x0004 0x0208 0x0614 0x00 0x00
22 #define IMX95_PAD_DAP_TMS_SWDIO__CAN4_TX 0x0004 0x0208 0x0000 0x02 0x00
23 #define IMX95_PAD_DAP_TMS_SWDIO__FLEXIO2_FLEXIO_BIT31 0x0004 0x0208 0x0000 0x04 0x00
[all …]
/freebsd/contrib/llvm-project/llvm/lib/Support/
H A DUnicodeCaseFold.cpp5 // http://www.unicode.org/Public/15.1.0/ucd/CaseFolding.txt
9 // "http://www.unicode.org/Public/15.1.0/ucd/CaseFolding.txt" \
17 if (C < 0x0041) in foldCharSimple()
20 if (C <= 0x005a) in foldCharSimple()
23 if (C == 0x00b5) in foldCharSimple()
24 return 0x03bc; in foldCharSimple()
25 if (C < 0x00c0) in foldCharSimple()
28 if (C <= 0x00d6) in foldCharSimple()
30 if (C < 0x00d8) in foldCharSimple()
33 if (C <= 0x00d in foldCharSimple()
[all...]
/freebsd/sys/contrib/device-tree/src/arm/ti/omap/
H A Dam33xx-clocks.dtsi9 #clock-cells = <0>;
14 reg = <0x0040>;
18 #clock-cells = <0>;
27 #clock-cells = <0>;
36 #clock-cells = <0>;
45 #clock-cells = <0>;
54 #clock-cells = <0>;
63 #clock-cells = <0>;
72 #clock-cells = <0>;
81 #clock-cells = <0>;
[all …]
/freebsd/sys/dev/bwn/
H A Dif_bwn_phy_g.c143 if (mac->mac_phy.hwpctl == 0 || mac->mac_phy.use_hwpctl == NULL) in bwn_has_hwpctl()
144 return (0); in bwn_has_hwpctl()
169 } while(0) in bwn_phy_g_attach()
180 pg->pg_flags = 0; in bwn_phy_g_attach()
181 if (pab0 == 0 || pab1 == 0 || pab2 == 0 || pab0 == -1 || pab1 == -1 || in bwn_phy_g_attach()
185 return (0); in bwn_phy_g_attach()
188 pg->pg_idletssi = (bg == 0 || bg == -1) ? 62 : bg; in bwn_phy_g_attach()
194 for (i = 0; i < 64; i++) { in bwn_phy_g_attach()
196 int8_t j = 0; in bwn_phy_g_attach()
221 return (0); in bwn_phy_g_attach()
[all …]
/freebsd/sys/dev/sk/
H A Dif_skreg.h54 #define SK_GENESIS 0x0A
55 #define SK_YUKON 0xB0
56 #define SK_YUKON_LITE 0xB1
57 #define SK_YUKON_LP 0xB2
58 #define SK_YUKON_FAMILY(x) ((x) & 0xB0)
61 #define SK_YUKON_LITE_REV_A0 0x0 /* invented, see test in skc_attach. */
62 #define SK_YUKON_LITE_REV_A1 0x3
63 #define SK_YUKON_LITE_REV_A3 0x7
68 #define VENDORID_SK 0x1148
73 #define VENDORID_MARVELL 0x11AB
[all …]
/freebsd/sys/dev/bge/
H A Dif_bgereg.h54 * device register space at offset 0x8000 to read any 32K chunk
60 * accessed directly. NIC memory addresses are offset by 0x01000000.
64 #define BGE_PAGE_ZERO 0x00000000
65 #define BGE_PAGE_ZERO_END 0x000000FF
66 #define BGE_SEND_RING_RCB 0x00000100
67 #define BGE_SEND_RING_RCB_END 0x000001FF
68 #define BGE_RX_RETURN_RING_RCB 0x00000200
69 #define BGE_RX_RETURN_RING_RCB_END 0x000002FF
70 #define BGE_STATS_BLOCK 0x00000300
71 #define BGE_STATS_BLOCK_END 0x00000AFF
[all …]
/freebsd/share/i18n/csmapper/CNS/
H A DCNS11643-5%UCS@SIP.src5 SRC_ZONE 0x21-0x7E / 0x21-0x7E / 8
7 DST_ILSEQ 0xFFFE
13 # Unicode version: 5.0.0
47 0x2121 = 0x00D1
48 0x2122 = 0x00CB
49 0x2123 = 0x00C9
50 0x2124 = 0x010C
51 0x2125 = 0x0000
52 0x2126 = 0x0087
53 0x2127 = 0x010D
[all …]
H A DUCS@SIP%CNS11643-5.src5 SRC_ZONE 0x0000 - 0xFA1A
7 DST_INVALID 0xFFFF
13 # Unicode version: 5.0.0
47 0x0000 = 0x2125
48 0x0009 = 0x2133
49 0x0014 = 0x214D
50 0x0022 = 0x232F
51 0x0041 = 0x3072
52 0x0043 = 0x3323
53 0x006B = 0x2521
[all …]
/freebsd/sys/contrib/dev/rtw89/
H A Dreg.h8 #define R_AX_SYS_WL_EFUSE_CTRL 0x000A
11 #define R_AX_SYS_ISO_CTRL 0x0000
17 #define R_AX_SYS_FUNC_EN 0x0002
19 #define B_AX_FEN_BBRSTB BIT(0)
21 #define R_AX_SYS_PW_CTRL 0x0004
37 #define R_AX_SYS_CLK_CTRL 0x0008
40 #define R_AX_SYS_SWR_CTRL1 0x0010
43 #define R_AX_SYS_ADIE_PAD_PWR_CTRL 0x0018
47 #define R_AX_RSV_CTRL 0x001C
51 #define R_AX_AFE_LDO_CTRL 0x0020
[all …]
/freebsd/sys/dev/arcmsr/
H A Darcmsr.h64 #define FALSE 0
67 # define INTR_ENTROPY 0
71 #define offsetof(type, member) ((size_t)(&((type *)0)->member))
87 #define PCI_VENDOR_ID_ARECA 0x17D3 /* Vendor ID */
88 #define PCI_DEVICE_ID_ARECA_1110 0x1110 /* Device ID */
89 #define PCI_DEVICE_ID_ARECA_1120 0x1120 /* Device ID */
90 #define PCI_DEVICE_ID_ARECA_1130 0x1130 /* Device ID */
91 #define PCI_DEVICE_ID_ARECA_1160 0x1160 /* Device ID */
92 #define PCI_DEVICE_ID_ARECA_1170 0x1170 /* Device ID */
93 #define PCI_DEVICE_ID_ARECA_1200 0x1200 /* Device ID */
[all …]

12