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/linux/sound/soc/codecs/
H A Drt1019.h11 #define RT1019_DEVICE_ID_VAL 0x1019
12 #define RT1019_DEVICE_ID_VAL2 0x6731
14 #define RT1019_RESET 0x0000
15 #define RT1019_IDS_CTRL 0x0011
16 #define RT1019_ASEL_CTRL 0x0013
17 #define RT1019_PWR_STRP_2 0x0019
18 #define RT1019_BEEP_TONE 0x001b
19 #define RT1019_VER_ID 0x005c
20 #define RT1019_VEND_ID_1 0x005e
21 #define RT1019_VEND_ID_2 0x005f
[all …]
H A Drt1308-sdw.h12 { 0x0000, 0x00 },
13 { 0x0001, 0x00 },
14 { 0x0002, 0x00 },
15 { 0x0003, 0x00 },
16 { 0x0004, 0x00 },
17 { 0x0005, 0x01 },
18 { 0x0020, 0x00 },
19 { 0x0022, 0x00 },
20 { 0x0023, 0x00 },
21 { 0x0024, 0x00 },
[all …]
H A Drt711-sdw.h12 { 0x0000, 0x00 },
13 { 0x0001, 0x00 },
14 { 0x0002, 0x00 },
15 { 0x0003, 0x00 },
16 { 0x0004, 0x00 },
17 { 0x0005, 0x01 },
18 { 0x0020, 0x00 },
19 { 0x0022, 0x00 },
20 { 0x0023, 0x00 },
21 { 0x0024, 0x00 },
[all …]
/linux/drivers/gpu/drm/amd/include/asic_reg/nbio/
H A Dnbio_7_4_offset.h27 // base address: 0x0
28 …PSWUSCFG0_VENDOR_ID 0x0000
29 …PSWUSCFG0_DEVICE_ID 0x0002
30 …PSWUSCFG0_COMMAND 0x0004
31 …PSWUSCFG0_STATUS 0x0006
32 …PSWUSCFG0_REVISION_ID 0x0008
33 …PSWUSCFG0_PROG_INTERFACE 0x0009
34 …PSWUSCFG0_SUB_CLASS 0x000a
35 …PSWUSCFG0_BASE_CLASS 0x000b
36 …PSWUSCFG0_CACHE_LINE 0x000c
[all …]
H A Dnbio_2_3_offset.h27 // base address: 0x0
28 …BIF_BX_PF_MM_INDEX 0x0000
29 …ne mmBIF_BX_PF_MM_INDEX_BASE_IDX 0
30 …BIF_BX_PF_MM_DATA 0x0001
31 …ne mmBIF_BX_PF_MM_DATA_BASE_IDX 0
32 …BIF_BX_PF_MM_INDEX_HI 0x0006
33 …ne mmBIF_BX_PF_MM_INDEX_HI_BASE_IDX 0
37 // base address: 0x0
38 …SYSHUB_INDEX_OVLP 0x0008
39 …ne mmSYSHUB_INDEX_OVLP_BASE_IDX 0
[all …]
/linux/drivers/hid/
H A Dhid-evision.c22 return 0; in evision_input_mapping()
25 if ((usage->hid & HID_USAGE) >> 8 == 0x05) in evision_input_mapping()
28 if ((usage->hid & HID_USAGE) >> 8 == 0x06) in evision_input_mapping()
33 case 0x0401: return -1; in evision_input_mapping()
35 case 0x0402: return -1; in evision_input_mapping()
37 return 0; in evision_input_mapping()
H A Dhid-roccat-koneplus.h15 KONEPLUS_SIZE_ACTUAL_PROFILE = 0x03,
16 KONEPLUS_SIZE_CONTROL = 0x03,
17 KONEPLUS_SIZE_FIRMWARE_WRITE = 0x0402,
18 KONEPLUS_SIZE_INFO = 0x06,
19 KONEPLUS_SIZE_MACRO = 0x0822,
20 KONEPLUS_SIZE_PROFILE_SETTINGS = 0x2b,
21 KONEPLUS_SIZE_PROFILE_BUTTONS = 0x4d,
22 KONEPLUS_SIZE_SENSOR = 0x06,
23 KONEPLUS_SIZE_TALK = 0x10,
24 KONEPLUS_SIZE_TCU = 0x04,
[all …]
/linux/drivers/media/rc/keymaps/
H A Drc-avermedia-m733a-rm-k6.c17 { 0x0401, KEY_POWER2 },
18 { 0x0406, KEY_MUTE },
19 { 0x0408, KEY_MODE }, /* TV/FM */
21 { 0x0409, KEY_NUMERIC_1 },
22 { 0x040a, KEY_NUMERIC_2 },
23 { 0x040b, KEY_NUMERIC_3 },
24 { 0x040c, KEY_NUMERIC_4 },
25 { 0x040d, KEY_NUMERIC_5 },
26 { 0x040e, KEY_NUMERIC_6 },
27 { 0x040f, KEY_NUMERIC_7 },
[all …]
H A Drc-avermedia-m135a.c23 { 0x0200, KEY_POWER2 },
24 { 0x022e, KEY_DOT }, /* '.' */
25 { 0x0201, KEY_MODE }, /* TV/FM or SOURCE */
27 { 0x0205, KEY_NUMERIC_1 },
28 { 0x0206, KEY_NUMERIC_2 },
29 { 0x0207, KEY_NUMERIC_3 },
30 { 0x0209, KEY_NUMERIC_4 },
31 { 0x020a, KEY_NUMERIC_5 },
32 { 0x020b, KEY_NUMERIC_6 },
33 { 0x020d, KEY_NUMERIC_7 },
[all …]
/linux/arch/m68k/include/asm/
H A Dhash.h14 * by GOLDEN_RATIO_32 = 0x61C88647.
16 * The best way to do that appears to be to multiply by 0x8647 with
17 * shifts and adds, and use mulu.w to multiply the high half by 0x61C8.
45 asm( "move.l %2,%0" /* a = x * 0x0001 */ in __hash_32()
46 "\n lsl.l #2,%0" /* a = x * 0x0004 */ in __hash_32()
47 "\n move.l %0,%1" in __hash_32()
48 "\n lsl.l #7,%0" /* a = x * 0x0200 */ in __hash_32()
49 "\n add.l %2,%0" /* a = x * 0x0201 */ in __hash_32()
50 "\n add.l %0,%1" /* b = x * 0x0205 */ in __hash_32()
51 "\n add.l %0,%0" /* a = x * 0x0402 */ in __hash_32()
[all …]
/linux/drivers/gpu/drm/amd/include/asic_reg/nbif/
H A Dnbif_6_3_1_offset.h28 // base address: 0x0
29 …IRQ_BRIDGE_CNTL 0x003e
33 // base address: 0x0
34 …BIF_CFG_DEV0_EPF0_VENDOR_ID 0x0000
35 …BIF_CFG_DEV0_EPF0_DEVICE_ID 0x0002
36 …BIF_CFG_DEV0_EPF0_COMMAND 0x0004
37 …BIF_CFG_DEV0_EPF0_STATUS 0x0006
38 …BIF_CFG_DEV0_EPF0_REVISION_ID 0x0008
39 …BIF_CFG_DEV0_EPF0_PROG_INTERFACE 0x0009
40 …BIF_CFG_DEV0_EPF0_SUB_CLASS 0x000a
[all …]
/linux/drivers/net/wireless/intersil/p54/
H A Deeprom.h131 /* common and choice range (0x0000 - 0x0fff) */
132 #define PDR_END 0x0000
133 #define PDR_MANUFACTURING_PART_NUMBER 0x0001
134 #define PDR_PDA_VERSION 0x0002
135 #define PDR_NIC_SERIAL_NUMBER 0x0003
136 #define PDR_NIC_RAM_SIZE 0x0005
137 #define PDR_RFMODEM_SUP_RANGE 0x0006
138 #define PDR_PRISM_MAC_SUP_RANGE 0x0007
139 #define PDR_NIC_ID 0x0008
141 #define PDR_MAC_ADDRESS 0x0101
[all …]
/linux/Documentation/devicetree/bindings/perf/
H A Driscv,pmu.yaml78 value of variant must be 0xffffffff_ffffffff.
104 riscv,event-to-mhpmevent = <0x0000B 0x0000 0x0001>;
105 riscv,event-to-mhpmcounters = <0x00001 0x00001 0x00000001>,
106 <0x00002 0x00002 0x00000004>,
107 <0x00003 0x0000A 0x00000ff8>,
108 <0x10000 0x10033 0x000ff000>;
110 /* For event ID 0x0002 */
111 <0x0000 0x0002 0xffffffff 0xffffffff 0x00000f8>,
112 /* For event ID 0-4 */
113 <0x0 0x0 0xffffffff 0xfffffff0 0x00000ff0>,
[all …]
/linux/arch/s390/kernel/diag/
H A Ddiag310.c21 DIAG310_SUBC_0 = 0,
28 DIAG310_RET_SUCCESS = 0x0001,
29 DIAG310_RET_BUSY = 0x0101,
30 DIAG310_RET_OPNOTSUPP = 0x0102,
31 DIAG310_RET_SC4_INVAL = 0x0401,
32 DIAG310_RET_SC4_NODATA = 0x0402,
33 DIAG310_RET_SC5_INVAL = 0x0501,
34 DIAG310_RET_SC5_NODATA = 0x0502,
35 DIAG310_RET_SC5_ESIZE = 0x0503
69 asm volatile("diag %[rp],%[subcode],0x310" in diag310()
[all …]
/linux/drivers/ufs/host/
H A Dufs-exynos.h16 #define COMP_CLK_PERIOD 0x44
21 #define UNIPRO_DBG_FORCE_DME_CTRL_STATE 0x150
26 #define PA_DBG_CLK_PERIOD 0x9514
27 #define PA_DBG_TXPHY_CFGUPDT 0x9518
28 #define PA_DBG_RXPHY_CFGUPDT 0x9519
29 #define PA_DBG_MODE 0x9529
30 #define PA_DBG_SKIP_RESET_PHY 0x9539
31 #define PA_DBG_AUTOMODE_THLD 0x9536
32 #define PA_DBG_OV_TM 0x9540
33 #define PA_DBG_SKIP_LINE_RESET 0x9541
[all …]
/linux/arch/mips/kernel/
H A Docteon_switch.S31 #if CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE > 0
38 andi t0, 0x3f
46 LONG_L t8, 0(t1) /* Load from CVMSEG */
50 LONG_S t8, 0(t2) /* Store CVMSEG to thread storage */
58 xori t0, t0, 0x40 /* Bit 6 is CVMSEG user enable */
66 LONG_S t9, 0(t8)
80 li a3, 0xff01
83 nor a3, $0, a3
102 dmfc2 t0, 0x0201
103 dmfc2 t1, 0x0202
[all …]
/linux/include/sound/
H A Dwss.h18 #define WSS_MODE_NONE 0x0000
19 #define WSS_MODE_PLAY 0x0001
20 #define WSS_MODE_RECORD 0x0002
21 #define WSS_MODE_TIMER 0x0004
26 #define WSS_HW_DETECT 0x0000 /* let CS4231 driver detect chip */
27 #define WSS_HW_DETECT3 0x0001 /* allow mode 3 */
28 #define WSS_HW_TYPE_MASK 0xff00 /* type mask */
29 #define WSS_HW_CS4231_MASK 0x0100 /* CS4231 serie */
30 #define WSS_HW_CS4231 0x0100 /* CS4231 chip */
31 #define WSS_HW_CS4231A 0x0101 /* CS4231A chip */
[all …]
/linux/include/linux/mfd/mt6397/
H A Dregisters.h11 #define MT6397_CID 0x0100
12 #define MT6397_TOP_CKPDN 0x0102
13 #define MT6397_TOP_CKPDN_SET 0x0104
14 #define MT6397_TOP_CKPDN_CLR 0x0106
15 #define MT6397_TOP_CKPDN2 0x0108
16 #define MT6397_TOP_CKPDN2_SET 0x010A
17 #define MT6397_TOP_CKPDN2_CLR 0x010C
18 #define MT6397_TOP_GPIO_CKPDN 0x010E
19 #define MT6397_TOP_RST_CON 0x0114
20 #define MT6397_WRP_CKPDN 0x011A
[all …]
/linux/drivers/staging/media/meson/vdec/
H A Dcodec_hevc_common.c13 #define MMU_COMPRESS_HEADER_SIZE 0x48000
14 #define MMU_MAP_SIZE 0x4800
17 0x0401, 0x8401, 0x0800, 0x0402,
18 0x9002, 0x1423, 0x8CC3, 0x1423,
19 0x8804, 0x9825, 0x0800, 0x04FE,
20 0x8406, 0x8411, 0x1800, 0x8408,
21 0x8409, 0x8C2A, 0x9C2B, 0x1C00,
22 0x840F, 0x8407, 0x8000, 0x8408,
23 0x2000, 0xA800, 0x8410, 0x04DE,
24 0x840C, 0x840D, 0xAC00, 0xA000,
[all …]
/linux/drivers/media/pci/saa7164/
H A Dsaa7164-types.h57 NONE = 0,
91 SET_CUR = 0x01,
92 GET_CUR = 0x81,
93 GET_MIN = 0x82,
94 GET_MAX = 0x83,
95 GET_RES = 0x84,
96 GET_LEN = 0x85,
97 GET_INFO = 0x86,
98 GET_DEF = 0x87
149 ITT_ANTENNA = 0x0203,
[all …]
/linux/include/linux/mfd/mt6323/
H A Dregisters.h10 #define MT6323_CHR_CON0 0x0000
11 #define MT6323_CHR_CON1 0x0002
12 #define MT6323_CHR_CON2 0x0004
13 #define MT6323_CHR_CON3 0x0006
14 #define MT6323_CHR_CON4 0x0008
15 #define MT6323_CHR_CON5 0x000A
16 #define MT6323_CHR_CON6 0x000C
17 #define MT6323_CHR_CON7 0x000E
18 #define MT6323_CHR_CON8 0x0010
19 #define MT6323_CHR_CON9 0x0012
[all …]
/linux/arch/powerpc/platforms/44x/
H A Dpci.h18 #define PCIX0_VENDID 0x000
19 #define PCIX0_DEVID 0x002
20 #define PCIX0_COMMAND 0x004
21 #define PCIX0_STATUS 0x006
22 #define PCIX0_REVID 0x008
23 #define PCIX0_CLS 0x009
24 #define PCIX0_CACHELS 0x00c
25 #define PCIX0_LATTIM 0x00d
26 #define PCIX0_HDTYPE 0x00e
27 #define PCIX0_BIST 0x00f
[all …]
/linux/arch/sh/include/mach-common/mach/
H A Dhighlander.h6 #define PA_NORFLASH_ADDR 0x00000000
7 #define PA_NORFLASH_SIZE 0x04000000
10 #define PA_BCR 0xa4000000 /* FPGA */
13 #define PA_IRLMSK (PA_BCR+0x0000) /* Interrupt Mask control */
14 #define PA_IRLMON (PA_BCR+0x0002) /* Interrupt Status control */
15 #define PA_IRLPRI1 (PA_BCR+0x0004) /* Interrupt Priorty 1 */
16 #define PA_IRLPRI2 (PA_BCR+0x0006) /* Interrupt Priorty 2 */
17 #define PA_IRLPRI3 (PA_BCR+0x0008) /* Interrupt Priorty 3 */
18 #define PA_IRLPRI4 (PA_BCR+0x000a) /* Interrupt Priorty 4 */
19 #define PA_RSTCTL (PA_BCR+0x000c) /* Reset Control */
[all …]
/linux/arch/mips/include/asm/
H A Dprocessor.h39 #define TASK_SIZE 0x80000000UL
55 #define TASK_SIZE32 0x7fff8000UL
57 #define TASK_SIZE64 (0x1UL << ((cpu_data[0].vmbits>48)?48:cpu_data[0].vmbits))
59 #define TASK_SIZE64 0x10000000000UL
139 {0,} \
158 /* DMFC2 rt, 0x0201 */
160 /* DMFC2 rt, 0x0202 (Set with DMTC2 rt, 0x1202) */
162 /* DMFC2 rt, 0x0200 (set with DMTC2 rt, 0x4200) */
164 /* DMFC2 rt, 0x0402; DMFC2 rt, 0x040A */
166 /* DMFC2 rt, 0x0084 */
[all …]
/linux/drivers/scsi/
H A D3w-sas.h55 #define TWL_STATUS 0x0 /* Status */
56 #define TWL_HIBDB 0x20 /* Inbound doorbell */
57 #define TWL_HISTAT 0x30 /* Host interrupt status */
58 #define TWL_HIMASK 0x34 /* Host interrupt mask */
59 #define TWL_HOBDB 0x9C /* Outbound doorbell */
60 #define TWL_HOBDBC 0xA0 /* Outbound doorbell clear */
61 #define TWL_SCRPD3 0xBC /* Scratchpad */
62 #define TWL_HIBQPL 0xC0 /* Host inbound Q low */
63 #define TWL_HIBQPH 0xC4 /* Host inbound Q high */
64 #define TWL_HOBQPL 0xC8 /* Host outbound Q low */
[all …]

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