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Searched +full:0 +full:x03c00000 (Results 1 – 25 of 25) sorted by relevance

/linux/include/net/
H A Dieee80211_radiotap.h29 * @it_version: radiotap version, always 0
58 /* version is always 0 */
59 #define PKTHDR_RADIOTAP_VERSION 0
63 IEEE80211_RADIOTAP_TSFT = 0,
102 IEEE80211_RADIOTAP_F_CFP = 0x01,
103 IEEE80211_RADIOTAP_F_SHORTPRE = 0x02,
104 IEEE80211_RADIOTAP_F_WEP = 0x04,
105 IEEE80211_RADIOTAP_F_FRAG = 0x08,
106 IEEE80211_RADIOTAP_F_FCS = 0x10,
107 IEEE80211_RADIOTAP_F_DATAPAD = 0x20,
[all …]
/linux/Documentation/devicetree/bindings/pinctrl/
H A Dqcom,qcs615-tlmm.yaml67 - pattern: "^gpio([0-9]|[1-9][0-9]|1[0-1][0-9]|12[0-2])$"
108 reg = <0x03100000 0x300000>,
109 <0x03500000 0x300000>,
110 <0x03c00000 0x300000>;
113 gpio-ranges = <&tlmm 0 0 124>;
/linux/drivers/net/wireless/ath/ath9k/
H A Dar956x_initvals.h41 {0x00009800, 0xafe68e30},
42 {0x00009804, 0xfd14e000},
43 {0x00009808, 0x9c0a9f6b},
44 {0x0000980c, 0x04900000},
45 {0x00009814, 0x0280c00a},
46 {0x00009818, 0x00000000},
47 {0x0000981c, 0x00020028},
48 {0x00009834, 0x6400a190},
49 {0x00009838, 0x0108ecff},
50 {0x0000983c, 0x14000600},
[all …]
/linux/arch/powerpc/boot/dts/
H A Dmpc5121ads.dts21 nand@0 {
23 reg = <0x00000000 0x40000000>; /* 512MB + 512MB */
28 ranges = <0x0 0x0 0xfc000000 0x04000000
29 0x2 0x0 0x82000000 0x00008000>;
31 flash@0,0 {
33 reg = <0 0x0 0x4000000>;
39 protected@0 {
41 reg = <0x00000000 0x00040000>; // first sector is protected
46 reg = <0x00040000 0x03c00000>; // 60M for filesystem
50 reg = <0x03c40000 0x00280000>; // 2.5M for kernel
[all …]
/linux/Documentation/devicetree/bindings/mailbox/
H A Dnvidia,tegra186-hsp.yaml34 - bits 7..0:
51 - bits 23..0:
87 - pattern: "^shared([0-9]|1[0-5])$"
88 - pattern: "^shared([0-9]|1[0-5])$"
89 - pattern: "^shared([0-9]|1[0-5])$"
90 - pattern: "^shared([0-9]|1[0-5])$"
91 - pattern: "^shared([0-9]|1[0-5])$"
92 - pattern: "^shared([0-9]|1[0-5])$"
93 - pattern: "^shared([0-9]|1[0-5])$"
94 - pattern: "^shared([0-9]|1[0-5])$"
[all …]
/linux/arch/m68k/sun3x/
H A Ddvma.c29 #define IOMMU_ADDR_MASK 0x03ffe000
30 #define IOMMU_CACHE_INHIBIT 0x00000040
31 #define IOMMU_FULL_BLOCK 0x00000020
32 #define IOMMU_MODIFIED 0x00000010
33 #define IOMMU_USED 0x00000008
34 #define IOMMU_WRITE_PROTECT 0x00000004
35 #define IOMMU_DT_MASK 0x00000003
36 #define IOMMU_DT_INVALID 0x00000000
37 #define IOMMU_DT_VALID 0x00000001
38 #define IOMMU_DT_BAD 0x00000002
[all …]
/linux/Documentation/devicetree/bindings/firmware/
H A Dnvidia,tegra186-bpmp.yaml148 reg = <0x03c00000 0xa0000>;
156 reg = <0x30000000 0x50000>;
159 ranges = <0x0 0x30000000 0x50000>;
162 reg = <0x4e000 0x1000>;
168 reg = <0x4f000 0x1000>;
192 #size-cells = <0>;
/linux/drivers/net/wireless/realtek/rtw88/
H A Drtw88xxa.c42 (efuse->pa_type_5g & BIT(0)); in rtw8812a_read_amplifier_type()
63 BIT(1) | BIT(0)); in rtw8812a_read_amplifier_type()
72 BIT(1) | BIT(0)); in rtw8812a_read_amplifier_type()
85 if (map->rfe_option == 0xff) { in rtw8812a_read_rfe_type()
87 efuse->rfe_option = 0; in rtw8812a_read_rfe_type()
98 efuse->rfe_option = 0; in rtw8812a_read_rfe_type()
106 efuse->rfe_option = map->rfe_option & 0x3f; in rtw8812a_read_rfe_type()
110 * modify spec and notify all customer to revise the IC 0xca in rtw8812a_read_rfe_type()
117 efuse->rfe_option = 0; in rtw8812a_read_rfe_type()
128 u8 antenna = 0; in rtw88xxa_read_usb_type()
[all …]
/linux/arch/arm/net/
H A Dbpf_jit_32.h12 #define ARM_R0 0
29 #define ARM_COND_EQ 0x0 /* == */
30 #define ARM_COND_NE 0x1 /* != */
31 #define ARM_COND_CS 0x2 /* unsigned >= */
33 #define ARM_COND_CC 0x3 /* unsigned < */
35 #define ARM_COND_MI 0x4 /* < 0 */
36 #define ARM_COND_PL 0x5 /* >= 0 */
37 #define ARM_COND_VS 0x6 /* Signed Overflow */
38 #define ARM_COND_VC 0x7 /* No Signed Overflow */
39 #define ARM_COND_HI 0x8 /* unsigned > */
[all …]
/linux/Documentation/devicetree/bindings/display/
H A Dallwinner,sun4i-a10-tcon.yaml19 const: 0
122 port@0:
134 "^endpoint(@[0-9])$":
154 - port@0
382 reg = <0x01c0c000 0x1000>;
393 #clock-cells = <0>;
398 #size-cells = <0>;
400 port@0 {
402 #size-cells = <0>;
403 reg = <0>;
[all …]
/linux/drivers/net/wireless/ath/ath10k/
H A Dtargaddrs.h25 #define QCA988X_HOST_INTEREST_ADDRESS 0x00400800
26 #define HOST_INTEREST_MAX_SIZE 0x200
39 u32 hi_app_host_interest; /* 0x00 */
42 u32 hi_failure_state; /* 0x04 */
45 u32 hi_dbglog_hdr; /* 0x08 */
47 u32 hi_unused0c; /* 0x0c */
53 u32 hi_option_flag; /* 0x10 */
59 u32 hi_serial_enable; /* 0x14 */
62 u32 hi_dset_list_head; /* 0x18 */
65 u32 hi_app_start; /* 0x1c */
[all …]
/linux/drivers/video/fbdev/
H A Dcg14.c51 #define CG14_MCR_INTENABLE_MASK 0x80
53 #define CG14_MCR_VIDENABLE_MASK 0x40
55 #define CG14_MCR_PIXMODE_MASK 0x30
57 #define CG14_MCR_TMR_MASK 0x0c
59 #define CG14_MCR_TMENABLE_MASK 0x02
60 #define CG14_MCR_RESET_SHIFT 0
61 #define CG14_MCR_RESET_MASK 0x01
63 #define CG14_REV_REVISION_MASK 0xf0
64 #define CG14_REV_IMPL_SHIFT 0
65 #define CG14_REV_IMPL_MASK 0x0f
[all …]
/linux/arch/powerpc/kernel/
H A Dkvm.c29 #define KVM_INST_LWZ 0x80000000
30 #define KVM_INST_STW 0x90000000
31 #define KVM_INST_LD 0xe8000000
32 #define KVM_INST_STD 0xf8000000
33 #define KVM_INST_NOP 0x60000000
34 #define KVM_INST_B 0x48000000
35 #define KVM_INST_B_MASK 0x03ffffff
36 #define KVM_INST_B_MAX 0x01ffffff
37 #define KVM_INST_LI 0x38000000
39 #define KVM_MASK_RT 0x03e00000
[all …]
/linux/include/soc/fsl/qe/
H A Dqe.h34 QE_CLK_NONE = 0,
150 return 0; in cpm_muram_dma()
245 return 0; in qe_alive_during_sleep()
291 u8 split; /* 0 = shared I-RAM, 1 = split I-RAM */
304 __be32 traps[16]; /* Trap addresses, 0 == ignore */
348 #define BD_STATUS_MASK 0xffff0000
349 #define BD_LENGTH_MASK 0x0000ffff
357 #define QE_RISC_ALLOCATION_RISC1 0x1 /* RISC 1 */
358 #define QE_RISC_ALLOCATION_RISC2 0x2 /* RISC 2 */
359 #define QE_RISC_ALLOCATION_RISC3 0x4 /* RISC 3 */
[all …]
/linux/arch/hexagon/kernel/
H A Dvm_init_segtable.S16 * Start with mapping PA=0 to both VA=0x0 and VA=0xc000000 as 16MB large pages.
46 /* VA 0x00000000 */
59 /* VA 0x40000000 */
68 /* VA 0x80000000 */
74 /*0xa8*/.word X,X,X,X
77 /*0xa9*/.word BKPG_IO(0xa9000000),BKPG_IO(0xa9000000),BKPG_IO(0xa9000000),BKPG_IO(0xa9000000)
79 /*0xa9*/.word X,X,X,X
81 /*0xaa*/.word X,X,X,X
82 /*0xab*/.word X,X,X,X
83 /*0xac*/.word X,X,X,X
[all …]
/linux/drivers/comedi/drivers/
H A Ds626.h36 #define S626_RANGE_5V 0x10 /* +/-5V range */
37 #define S626_RANGE_10V 0x00 /* +/-10V range */
39 #define S626_EOPL 0x80 /* End of ADC poll list marker. */
40 #define S626_GSEL_BIPOLAR5V 0x00F0 /* S626_LP_GSEL setting 5V bipolar. */
41 #define S626_GSEL_BIPOLAR10V 0x00A0 /* S626_LP_GSEL setting 10V bipolar. */
44 #define S626_ERR_ILLEGAL_PARM 0x00010000 /*
48 #define S626_ERR_I2C 0x00020000 /* I2C error. */
49 #define S626_ERR_COUNTERSETUP 0x00200000 /*
53 #define S626_ERR_DEBI_TIMEOUT 0x00400000 /* DEBI transfer timed out. */
74 #define S626_IRQ_GPIO3 0x00000040 /* IRQ enable for GPIO3. */
[all …]
/linux/arch/arm/boot/dts/allwinner/
H A Dsun9i-a80.dtsi65 #size-cells = <0>;
67 cpu0: cpu@0 {
73 reg = <0x0>;
82 reg = <0x1>;
91 reg = <0x2>;
100 reg = <0x3>;
109 reg = <0x100>;
118 reg = <0x101>;
127 reg = <0x102>;
136 reg = <0x103>;
[all …]
/linux/arch/arm64/boot/dts/nvidia/
H A Dtegra186.dtsi20 reg = <0x0 0x00100000 0x0 0xf000>,
21 <0x0 0x0010f000 0x0 0x1000>;
27 reg = <0x0 0x2200000 0x0 0x10000>,
28 <0x0 0x2210000 0x0 0x10000>;
44 reg = <0x0 0x02490000 0x0 0x10000>;
71 snps,burst-map = <0x7>;
78 reg = <0x0 0x2600000 0x0 0x210000>;
116 dma-channel-mask = <0xfffffffe>;
129 ranges = <0x0 0x02900000 0x0 0x02900000 0x0 0x200000>;
134 reg = <0x0 0x02900800 0x0 0x800>;
[all …]
H A Dtegra194.dtsi20 bus@0 {
25 ranges = <0x0 0x0 0x0 0x0 0x100 0x0>;
29 reg = <0x0 0x00100000 0x0 0xf000>,
30 <0x0 0x0010f000 0x0 0x1000>;
36 reg = <0x0 0x2200000 0x0 0x10000>,
37 <0x0 0x2210000 0x0 0x10000>;
90 gpio-ranges = <&pinmux 0 0 169>;
95 reg = <0x0 0x02300000 0x0 0x1000>;
105 reg = <0x0 0x2390000 0x0 0x1000>,
106 <0x0 0x23a0000 0x0 0x1000>,
[all …]
H A Dtegra234.dtsi31 bus@0 {
36 ranges = <0x0 0x0 0x0 0x0 0x100 0x0>;
40 reg = <0x0 0x00100000 0x0 0xf000>,
41 <0x0 0x0010f000 0x0 0x1000>;
47 reg = <0x0 0x02080000 0x0 0x00121000>;
48 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
70 reg = <0x0 0x02200000 0x0 0x10000>,
71 <0x0 0x02210000 0x0 0x10000>;
124 gpio-ranges = <&pinmux 0 0 164>;
129 reg = <0x0 0x2430000 0x0 0x19100>;
[all …]
/linux/drivers/soc/tegra/cbb/
H A Dtegra194-cbb.c27 #define ERRLOGGER_0_ID_COREID_0 0x00000000
28 #define ERRLOGGER_0_ID_REVISIONID_0 0x00000004
29 #define ERRLOGGER_0_FAULTEN_0 0x00000008
30 #define ERRLOGGER_0_ERRVLD_0 0x0000000c
31 #define ERRLOGGER_0_ERRCLR_0 0x00000010
32 #define ERRLOGGER_0_ERRLOG0_0 0x00000014
33 #define ERRLOGGER_0_ERRLOG1_0 0x00000018
34 #define ERRLOGGER_0_RSVD_00_0 0x0000001c
35 #define ERRLOGGER_0_ERRLOG3_0 0x00000020
36 #define ERRLOGGER_0_ERRLOG4_0 0x00000024
[all …]
/linux/drivers/net/ethernet/broadcom/
H A Dtg3.h17 #define TG3_64BIT_REG_HIGH 0x00UL
18 #define TG3_64BIT_REG_LOW 0x04UL
21 #define TG3_BDINFO_HOST_ADDR 0x0UL /* 64-bit */
22 #define TG3_BDINFO_MAXLEN_FLAGS 0x8UL /* 32-bit */
23 #define BDINFO_FLAGS_USE_EXT_RECV 0x00000001 /* ext rx_buffer_desc */
24 #define BDINFO_FLAGS_DISABLED 0x00000002
25 #define BDINFO_FLAGS_MAXLEN_MASK 0xffff0000
27 #define TG3_BDINFO_NIC_ADDR 0xcUL /* 32-bit */
28 #define TG3_BDINFO_SIZE 0x10UL
41 #define TG3PCI_VENDOR 0x00000000
[all …]
/linux/drivers/net/ethernet/sun/
H A Dcassini.h8 * vendor id: 0x108E (Sun Microsystems, Inc.)
9 * device id: 0xabba (Cassini)
10 * revision ids: 0x01 = Cassini
11 * 0x02 = Cassini rev 2
12 * 0x10 = Cassini+
13 * 0x11 = Cassini+ 0.2u
15 * vendor id: 0x100b (National Semiconductor)
16 * device id: 0x0035 (DP83065/Saturn)
17 * revision ids: 0x30 = Saturn B2
19 * rings are all offset from 0.
[all …]
/linux/drivers/net/ethernet/micrel/
H A Dksz884x.c33 #define KS_DMA_TX_CTRL 0x0000
34 #define DMA_TX_ENABLE 0x00000001
35 #define DMA_TX_CRC_ENABLE 0x00000002
36 #define DMA_TX_PAD_ENABLE 0x00000004
37 #define DMA_TX_LOOPBACK 0x00000100
38 #define DMA_TX_FLOW_ENABLE 0x00000200
39 #define DMA_TX_CSUM_IP 0x00010000
40 #define DMA_TX_CSUM_TCP 0x00020000
41 #define DMA_TX_CSUM_UDP 0x00040000
42 #define DMA_TX_BURST_SIZE 0x3F000000
[all …]
/linux/drivers/net/wireless/realtek/rtw89/
H A Drtw8852c_table.c10 {0xF0FF0000, 0x00000000},
11 {0xF03300FF, 0x00000001},
12 {0xF03400FF, 0x00000002},
13 {0xF03500FF, 0x00000003},
14 {0xF03600FF, 0x00000004},
15 {0x70C, 0x00000020},
16 {0x704, 0x601E0100},
17 {0x4000, 0x00000000},
18 {0x4004, 0xCA014000},
19 {0x4008, 0xC751D4F0},
[all …]