Home
last modified time | relevance | path

Searched +full:0 +full:x0310 (Results 1 – 25 of 36) sorted by relevance

12

/freebsd/sys/contrib/device-tree/src/arm/nxp/imx/
H A Dimx6ull-pinfunc.h16 #define MX6UL_PAD_UART5_TX_DATA__UART5_DTE_RX 0x00BC 0x0348 0x0644 0x0 0x6
18 #define MX6UL_PAD_UART5_RX_DATA__UART5_DCE_RX 0x00C0 0x034C 0x0644 0x0 0x7
20 #define MX6UL_PAD_ENET1_RX_EN__UART5_DCE_RTS 0x00CC 0x0358 0x0640 0x1 0x5
22 #define MX6UL_PAD_ENET1_TX_DATA0__UART5_DTE_RTS 0x00D0 0x035C 0x0640 0x1 0x6
24 #define MX6UL_PAD_CSI_DATA02__UART5_DCE_RTS 0x01EC 0x0478 0x0640 0x8 0x7
27 #define MX6ULL_PAD_UART1_TX_DATA__UART5_DCE_TX 0x0084 0x0310 0x0000 0x9 0x0
28 #define MX6ULL_PAD_UART1_TX_DATA__UART5_DTE_RX 0x0084 0x0310 0x0644 0x9 0x4
29 #define MX6ULL_PAD_UART1_RX_DATA__UART5_DCE_RX 0x0088 0x0314 0x0644 0x9 0x5
30 #define MX6ULL_PAD_UART1_RX_DATA__UART5_DTE_TX 0x0088 0x0314 0x0000 0x9 0x0
31 #define MX6ULL_PAD_UART1_CTS_B__UART5_DCE_CTS 0x008C 0x0318 0x0000 0x9 0x0
[all …]
H A Dimx6ul-pinfunc.h13 #define MX6UL_PAD_BOOT_MODE0__GPIO5_IO10 0x0014 0x02a0 0x0000 5 0
14 #define MX6UL_PAD_BOOT_MODE1__GPIO5_IO11 0x0018 0x02a4 0x0000 5 0
16 #define MX6UL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x001c 0x02a8 0x0000 5 0
17 #define MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x0020 0x02ac 0x0000 5 0
18 #define MX6UL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x0024 0x02b0 0x0000 5 0
19 #define MX6UL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x0028 0x02b4 0x0000 5 0
20 #define MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x002c 0x02b8 0x0000 5 0
21 #define MX6UL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x0030 0x02bc 0x0000 5 0
22 #define MX6UL_PAD_SNVS_TAMPER6__GPIO5_IO06 0x0034 0x02c0 0x0000 5 0
23 #define MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x0038 0x02c4 0x0000 5 0
[all …]
H A Dimx7d-pinfunc.h14 #define MX7D_PAD_LPSR_GPIO1_IO00__GPIO1_IO0 0x0000 0x0030 0x0000 0x0 0x0
15 #define MX7D_PAD_LPSR_GPIO1_IO00__PWM4_OUT 0x0000 0x0030 0x0000 0x1 0x0
16 #define MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_ANY 0x0000 0x0030 0x0000 0x2 0x0
17 #define MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B 0x0000 0x0030 0x0000 0x3 0x0
18 #define MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG__RST_B_DEB 0x0000 0x0030 0x0000 0x4 0x0
19 #define MX7D_PAD_LPSR_GPIO1_IO01__GPIO1_IO1 0x0004 0x0034 0x0000 0x0 0x0
20 #define MX7D_PAD_LPSR_GPIO1_IO01__PWM1_OUT 0x0004 0x0034 0x0000 0x1 0x0
21 #define MX7D_PAD_LPSR_GPIO1_IO01__CCM_ENET_REF_CLK3 0x0004 0x0034 0x0000 0x2 0x0
22 #define MX7D_PAD_LPSR_GPIO1_IO01__SAI1_MCLK 0x0004 0x0034 0x0000 0x3 0x0
23 #define MX7D_PAD_LPSR_GPIO1_IO01__ANATOP_24M_OUT 0x0004 0x0034 0x0000 0x4 0x0
[all …]
H A Dimx6sll-pinfunc.h15 #define MX6SLL_PAD_WDOG_B__WDOG1_B 0x0014 0x02DC 0x0000 0x0 0x0
16 #define MX6SLL_PAD_WDOG_B__WDOG1_RESET_B_DEB 0x0014 0x02DC 0x0000 0x1 0x0
17 #define MX6SLL_PAD_WDOG_B__UART5_RI_B 0x0014 0x02DC 0x0000 0x2 0x0
18 #define MX6SLL_PAD_WDOG_B__GPIO3_IO18 0x0014 0x02DC 0x0000 0x5 0x0
19 #define MX6SLL_PAD_REF_CLK_24M__XTALOSC_REF_CLK_24M 0x0018 0x02E0 0x0000 0x0 0x0
20 #define MX6SLL_PAD_REF_CLK_24M__I2C3_SCL 0x0018 0x02E0 0x068C 0x1 0x0
21 #define MX6SLL_PAD_REF_CLK_24M__PWM3_OUT 0x0018 0x02E0 0x0000 0x2 0x0
22 #define MX6SLL_PAD_REF_CLK_24M__USB_OTG2_ID 0x0018 0x02E0 0x0560 0x3 0x0
23 #define MX6SLL_PAD_REF_CLK_24M__CCM_PMIC_READY 0x0018 0x02E0 0x05AC 0x4 0x0
24 #define MX6SLL_PAD_REF_CLK_24M__GPIO3_IO21 0x0018 0x02E0 0x0000 0x5 0x0
[all …]
H A Dimx7ulp-pinfunc.h15 #define IMX7ULP_PAD_PTC0__PTC0 0x0000 0x0000 0x1 0x0
16 #define IMX7ULP_PAD_PTC0__TRACE_D15 0x0000 0x0000 0xa 0x0
17 #define IMX7ULP_PAD_PTC0__LPUART4_CTS_B 0x0000 0x0244 0x4 0x1
18 #define IMX7ULP_PAD_PTC0__LPI2C4_SCL 0x0000 0x0278 0x5 0x1
19 #define IMX7ULP_PAD_PTC0__TPM4_CLKIN 0x0000 0x0298 0x6 0x1
20 #define IMX7ULP_PAD_PTC0__FB_AD0 0x0000 0x0000 0x9 0x0
21 #define IMX7ULP_PAD_PTC1__PTC1 0x0004 0x0000 0x1 0x0
22 #define IMX7ULP_PAD_PTC1__TRACE_D14 0x0004 0x0000 0xa 0x0
23 #define IMX7ULP_PAD_PTC1__LPUART4_RTS_B 0x0004 0x0000 0x4 0x0
24 #define IMX7ULP_PAD_PTC1__LPI2C4_SDA 0x0004 0x027c 0x5 0x1
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dimx93-pinfunc.h13 #define MX93_PAD_DAP_TDI__JTAG_MUX_TDI 0x0000 0x01B0 0x03D8 0x0 0x0
14 #define MX93_PAD_DAP_TDI__MQS2_LEFT 0x0000 0x01B0 0x0000 0x1 0x0
15 #define MX93_PAD_DAP_TDI__CAN2_TX 0x0000 0x01B0 0x0000 0x3 0x0
16 #define MX93_PAD_DAP_TDI__FLEXIO2_FLEXIO30 0x0000 0x01B0 0x0000 0x4 0x0
17 #define MX93_PAD_DAP_TDI__GPIO3_IO28 0x0000 0x01B0 0x0000 0x5 0x0
18 #define MX93_PAD_DAP_TDI__LPUART5_RX 0x0000 0x01B0 0x0430 0x6 0x0
19 #define MX93_PAD_DAP_TMS_SWDIO__JTAG_MUX_TMS 0x0004 0x01B4 0x03DC 0x0 0x0
20 #define MX93_PAD_DAP_TMS_SWDIO__FLEXIO2_FLEXIO31 0x0004 0x01B4 0x0000 0x4 0x0
21 #define MX93_PAD_DAP_TMS_SWDIO__GPIO3_IO29 0x0004 0x01B4 0x0000 0x5 0x0
22 #define MX93_PAD_DAP_TMS_SWDIO__LPUART5_RTS_B 0x0004 0x01B4 0x0000 0x6 0x0
[all …]
H A Dimx95-pinfunc.h13 #define IMX95_PAD_DAP_TDI__JTAG_MUX_TDI 0x0000 0x0204 0x0610 0x00 0x00
14 #define IMX95_PAD_DAP_TDI__NETCMIX_TOP_MQS2_LEFT 0x0000 0x0204 0x0000 0x01 0x00
15 #define IMX95_PAD_DAP_TDI__NETCMIX_TOP_NETC_TMR_1588_ALARM1 0x0000 0x0204 0x0000 0x02 0x00
16 #define IMX95_PAD_DAP_TDI__CAN2_TX 0x0000 0x0204 0x0000 0x03 0x00
17 #define IMX95_PAD_DAP_TDI__FLEXIO2_FLEXIO_BIT30 0x0000 0x0204 0x0000 0x04 0x00
18 #define IMX95_PAD_DAP_TDI__GPIO3_IO_BIT28 0x0000 0x0204 0x0000 0x05 0x00
19 #define IMX95_PAD_DAP_TDI__LPUART5_RX 0x0000 0x0204 0x0570 0x06 0x00
21 #define IMX95_PAD_DAP_TMS_SWDIO__JTAG_MUX_TMS 0x0004 0x0208 0x0614 0x00 0x00
22 #define IMX95_PAD_DAP_TMS_SWDIO__CAN4_TX 0x0004 0x0208 0x0000 0x02 0x00
23 #define IMX95_PAD_DAP_TMS_SWDIO__FLEXIO2_FLEXIO_BIT31 0x0004 0x0208 0x0000 0x04 0x00
[all …]
/freebsd/share/man/man4/
H A Diwlwififw.460 .It 0x8086 Ta 0x08b1 Ta any Ta 0x4070 Ta iwlwifi-7260
63 .It 0x8086 Ta 0x08b1 Ta any Ta 0x4072 Ta iwlwifi-7260
66 .It 0x8086 Ta 0x08b1 Ta any Ta 0x4170 Ta iwlwifi-7260
69 .It 0x808
[all...]
/freebsd/sys/contrib/device-tree/Bindings/pinctrl/
H A Dfsl,imx6ul-pinctrl.yaml61 PAD_CTL_PUS_100K_DOWN (0 << 14)
68 PAD_CTL_SPEED_LOW (0 << 6)
71 PAD_CTL_DSE_DISABLE (0 << 3)
79 PAD_CTL_SRE_FAST (1 << 0)
80 PAD_CTL_SRE_SLOW (0 << 0)
97 reg = <0x020e0000 0x4000>;
101 0x0084 0x0310 0x0000 0 0 0x1b0b1
102 0x0088 0x0314 0x0624 0 3 0x1b0b1
109 reg = <0x02290000 0x4000>;
113 0x0010 0x0054 0x0000 0x5 0x0 0x130b0
/freebsd/sys/contrib/dev/iwlwifi/pcie/
H A Ddrv.c23 #define TRANS_CFG_MARKER BIT(0)
30 __builtin_choose_expr(_IS_A(cfg, iwl_cfg), 0, _invalid_type)))
41 {IWL_PCI_DEVICE(0x4232, 0x1201, iwl5100_agn_cfg)}, /* Mini Card */
42 {IWL_PCI_DEVICE(0x4232, 0x1301, iwl5100_agn_cfg)}, /* Half Mini Card */
43 {IWL_PCI_DEVICE(0x4232, 0x1204, iwl5100_agn_cfg)}, /* Mini Card */
44 {IWL_PCI_DEVICE(0x4232, 0x130
[all...]
/freebsd/sys/contrib/device-tree/src/arm/ti/omap/
H A Ddm816x-clocks.dtsi7 reg = <0x400 0x40>;
23 reg = <0x440 0x30>;
35 reg = <0x470 0x30>;
46 reg = <0x4a0 0x30>;
59 #clock-cells = <0>;
65 #clock-cells = <0>;
71 #clock-cells = <0>;
77 #clock-cells = <0>;
83 /* 0x48180000 */
86 #clock-cells = <0>;
[all …]
H A Domap54xx-clocks.dtsi9 #clock-cells = <0>;
16 #clock-cells = <0>;
21 reg = <0x0108>;
25 #clock-cells = <0>;
32 #clock-cells = <0>;
39 #clock-cells = <0>;
44 reg = <0x0108>;
48 #clock-cells = <0>;
55 #clock-cells = <0>;
62 #clock-cells = <0>;
[all …]
H A Domap44xx-clocks.dtsi9 #clock-cells = <0>;
16 #clock-cells = <0>;
23 #clock-cells = <0>;
28 reg = <0x0108>;
32 #clock-cells = <0>;
39 #clock-cells = <0>;
46 #clock-cells = <0>;
53 #clock-cells = <0>;
58 reg = <0x0108>;
62 #clock-cells = <0>;
[all …]
H A Domap24xx-clocks.dtsi9 #clock-cells = <0>;
13 reg = <0x4>;
17 #clock-cells = <0>;
23 #clock-cells = <0>;
27 reg = <0x4>;
31 #clock-cells = <0>;
39 #clock-cells = <0>;
45 #clock-cells = <0>;
51 #clock-cells = <0>;
57 #clock-cells = <0>;
[all …]
/freebsd/sys/arm/ti/omap4/pandaboard/
H A Dpandaboard.c48 #define SCRM_ALTCLKSRC (0x110)
49 #define SCRM_AUXCLK0 (0x0310)
50 #define SCRM_AUXCLK1 (0x0314)
51 #define SCRM_AUXCLK2 (0x0318)
52 #define SCRM_AUXCLK3 (0x031C)
55 #define GPIO1_OE (0x0134)
56 #define GPIO1_CLEARDATAOUT (0x0190)
57 #define GPIO1_SETDATAOUT (0x0194)
58 #define GPIO2_OE (0x0134)
59 #define GPIO2_CLEARDATAOUT (0x0190)
[all …]
/freebsd/lib/libsdp/
H A Dsdp.h43 #define SDP_DATA_NIL 0x00
46 #define SDP_DATA_UINT8 0x08
47 #define SDP_DATA_UINT16 0x09
48 #define SDP_DATA_UINT32 0x0A
49 #define SDP_DATA_UINT64 0x0B
50 #define SDP_DATA_UINT128 0x0C
53 #define SDP_DATA_INT8 0x10
54 #define SDP_DATA_INT16 0x11
55 #define SDP_DATA_INT32 0x12
56 #define SDP_DATA_INT64 0x13
[all …]
/freebsd/contrib/bc/src/
H A Ddata.c173 { NULL, 0, 0 },
286 "divide by 0",
346 "POSIX requires 0 or 1 comparison operators per condition",
417 { 0x1100, 0x115F }, { 0x231A, 0x231B }, { 0x2329, 0x232A },
418 { 0x23E9, 0x23EC }, { 0x23F0, 0x23F0 }, { 0x23F3, 0x23F3 },
419 { 0x25FD, 0x25FE }, { 0x2614, 0x2615 }, { 0x2648, 0x2653 },
420 { 0x267F, 0x267F }, { 0x2693, 0x2693 }, { 0x26A1, 0x26A1 },
421 { 0x26AA, 0x26AB }, { 0x26BD, 0x26BE }, { 0x26C4, 0x26C5 },
422 { 0x26CE, 0x26CE }, { 0x26D4, 0x26D4 }, { 0x26EA, 0x26EA },
423 { 0x26F2, 0x26F3 }, { 0x26F5, 0x26F5 }, { 0x26FA, 0x26FA },
[all …]
/freebsd/sys/dev/isci/scil/
H A Dscu_registers.h91 #define SMU_POST_CONTEXT_PORT_CONTEXT_INDEX_SHIFT (0UL)
92 #define SMU_POST_CONTEXT_PORT_CONTEXT_INDEX_MASK (0x00000FFFUL)
94 #define SMU_POST_CONTEXT_PORT_LOGICAL_PORT_INDEX_MASK (0x0000F000UL)
96 #define SMU_POST_CONTEXT_PORT_PROTOCOL_ENGINE_MASK (0x00030000UL)
98 #define SMU_POST_CONTEXT_PORT_COMMAND_CONTEXT_MASK (0x00FC0000UL)
99 #define SMU_POST_CONTEXT_PORT_RESERVED_MASK (0xFF000000UL)
106 #define SMU_INTERRUPT_STATUS_COMPLETION_MASK (0x80000000UL)
108 #define SMU_INTERRUPT_STATUS_QUEUE_SUSPEND_MASK (0x00000002UL)
109 #define SMU_INTERRUPT_STATUS_QUEUE_ERROR_SHIFT (0UL)
110 #define SMU_INTERRUPT_STATUS_QUEUE_ERROR_MASK (0x00000001UL)
[all …]
/freebsd/sys/dev/bge/
H A Dif_bgereg.h54 * device register space at offset 0x8000 to read any 32K chunk
60 * accessed directly. NIC memory addresses are offset by 0x01000000.
64 #define BGE_PAGE_ZERO 0x00000000
65 #define BGE_PAGE_ZERO_END 0x000000FF
66 #define BGE_SEND_RING_RCB 0x00000100
67 #define BGE_SEND_RING_RCB_END 0x000001FF
68 #define BGE_RX_RETURN_RING_RCB 0x00000200
69 #define BGE_RX_RETURN_RING_RCB_END 0x000002FF
70 #define BGE_STATS_BLOCK 0x00000300
71 #define BGE_STATS_BLOCK_END 0x00000AFF
[all …]
/freebsd/lib/libpmc/pmu-events/arch/x86/sapphirerapids/
H A Duncore-other.json4 "Counter": "0,1,2,3",
6 "EventCode": "0x01",
9 "UMaskExt": "0x00000000",
14 "Counter": "0,1,2,3",
16 "EventCode": "0x02",
19 "UMask": "0x000000000f",
20 "UMaskExt": "0x00000000",
27 "EventCode": "0xff",
34 "Counter": "0,1",
36 "EventCode": "0x01",
[all …]
/freebsd/tools/test/iconv/ref/
H A DUTF-16BE-rev1 0x00 = 0x0000
2 0x01 = 0x0100
3 0x02 = 0x0200
4 0x03 = 0x0300
5 0x04 = 0x0400
6 0x05 = 0x0500
7 0x06 = 0x0600
8 0x07 = 0x0700
9 0x08 = 0x0800
10 0x09 = 0x0900
[all …]
H A DUTF-16LE-rev1 0x00 = 0x0000
2 0x01 = 0x0001
3 0x02 = 0x0002
4 0x03 = 0x0003
5 0x04 = 0x0004
6 0x05 = 0x0005
7 0x06 = 0x0006
8 0x07 = 0x0007
9 0x08 = 0x0008
10 0x09 = 0x0009
[all …]
/freebsd/share/i18n/csmapper/GB/
H A DGB18030%UCS@BMP.src30 SRC_ZONE 0x81-0x84 / 0x30-0x39 / 0x81-0xFE / 0x30-0x39 / 8
32 DST_ILSEQ 0xFFFE
71 # for (i = 0; i < ncharset; ++i) {
74 # charsets[i], charsets[i + off], 0, &norm);
75 # if (ret != 0)
86 # for (i = 0; i < ncharset; ++i)
96 # for (i = 0; i < ncharset; i += 2) {
98 # if (ret == 0) {
101 # if (ret == 0 && tmp == src)
105 # return 0;
[all …]
H A DUCS@BMP%GB18030.src30 SRC_ZONE 0x0080-0xFFFD
32 DST_INVALID 0xFFFFFFFF
36 0x0080 = 0x81308130
37 0x0081 = 0x81308131
38 0x0082 = 0x81308132
39 0x0083 = 0x81308133
40 0x0084 = 0x81308134
41 0x0085 = 0x81308135
42 0x0086 = 0x81308136
43 0x0087 = 0x81308137
[all …]
/freebsd/tools/tools/locale/etc/charmaps/
H A DGB18030.TXT5 0x03 0x0003
6 0x04 0x0004
7 0x05 0x0005
8 0x06 0x0006
9 0x07 0x0007
10 0x08 0x0008
11 0x09 0x0009
12 0x0A 0x000A
13 0x0B 0x000B
14 0x0C 0x000C
[all …]

12