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Searched +full:0 +full:x02907000 (Results 1 – 7 of 7) sorted by relevance

/freebsd/sys/contrib/device-tree/src/arm64/ti/
H A Dk3-j721e-evm-pcie0-ep.dtso34 reg = <0x00 0x02900000 0x00 0x1000>,
35 <0x00 0x02907000 0x00 0x400>,
36 <0x00 0x0d000000 0x00 0x00800000>,
37 <0x00 0x10000000 0x00 0x08000000>;
41 ti,syscon-pcie-ctrl = <&scm_conf 0x4070>;
48 max-virtual-functions = /bits/ 8 <4 4 4 4 0 0>;
H A Dk3-j784s4-evm-pcie0-pcie1-ep.dtso38 reg = <0x00 0x02900000 0x00 0x1000>,
39 <0x00 0x02907000 0x00 0x400>,
40 <0x00 0x0d000000 0x00 0x00800000>,
41 <0x00 0x10000000 0x00 0x08000000>;
45 ti,syscon-pcie-ctrl = <&pcie0_ctrl 0x0>;
49 clocks = <&k3_clks 332 0>;
52 max-virtual-functions = /bits/ 8 <4 4 4 4 0 0>;
60 reg = <0x00 0x02910000 0x00 0x1000>,
61 <0x00 0x02917000 0x00 0x400>,
62 <0x00 0x0d800000 0x00 0x00800000>,
[all …]
H A Dk3-j721e-main.dtsi15 #clock-cells = <0>;
17 clock-frequency = <0>;
21 #clock-cells = <0>;
23 clock-frequency = <0>;
30 reg = <0x0 0x70000000 0x0 0x800000>;
33 ranges = <0x0 0x0 0x70000000 0x800000>;
35 atf-sram@0 {
36 reg = <0x0 0x20000>;
42 reg = <0 0x00100000 0 0x1c000>; /* excludes pinctrl region */
45 ranges = <0x0 0x0 0x00100000 0x1c000>;
[all …]
H A Dk3-j784s4-main.dtsi16 #clock-cells = <0>;
26 reg = <0x00 0x70000000 0x00 0x800000>;
29 ranges = <0x00 0x00 0x70000000 0x800000>;
31 atf-sram@0 {
32 reg = <0x00 0x20000>;
36 reg = <0x1f0000 0x10000>;
40 reg = <0x200000 0x200000>;
46 reg = <0x00 0x00100000 0x00 0x1c000>;
49 ranges = <0x00 0x00 0x00100000 0x1c000>;
53 reg = <0x4034 0x4>;
[all …]
/freebsd/sys/contrib/device-tree/Bindings/pci/
H A Dti,j721e-pci-ep.yaml127 reg = <0x00 0x02900000 0x00 0x1000>,
128 <0x00 0x02907000 0x00 0x400>,
129 <0x0
[all...]
H A Dti,j721e-pci-host.yaml78 const: 0x104c
82 - 0xb00d
83 - 0xb00f
84 - 0xb010
85 - 0xb012
86 - 0xb013
177 reg = <0x00 0x02900000 0x00 0x1000>,
178 <0x00 0x02907000 0x00 0x400>,
179 <0x00 0x0d000000 0x00 0x00800000>,
180 <0x00 0x10000000 0x00 0x00001000>;
[all …]
/freebsd/sys/dev/qlnx/qlnxe/
H A Decore_init_values.h35 0x00030003, 0xffff0000, /* if phase != 'engine', skip 3 ops (no DMAE) */
36 0x00020002, 0x00020000, /* if mode != '!asic', skip 2 ops */
37 0x0280c201, 0x00000000, /* write 0x0 to address 0x50184 */
38 0x02810201, 0x00000000, /* write 0x0 to address 0x50204 */
40 0x00110003, 0xffff0000, /* if phase != 'engine', skip 17 ops (no DMAE) */
41 0x00030002, 0x00020000, /* if mode != '!asic', skip 3 ops */
42 0x0048c201, 0x00000000, /* write 0x0 to address 0x9184 */
43 0x0048d201, 0x00000000, /* write 0x0 to address 0x91a4 */
44 0x004ba601, 0x00000001, /* write 0x1 to address 0x974c */
45 0x00020002, 0x00be0000, /* if mode != '(!asic)&bb', skip 2 ops */
[all …]