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/linux/drivers/misc/
H A Dhi6421v600-irq.c31 OTMP = 0,
54 #define HISI_POWERKEY_IRQ_NUM 0
64 #define SOC_PMIC_IRQ_MASK_0_ADDR 0x0202
65 #define SOC_PMIC_IRQ0_ADDR 0x0212
73 * OTMP 0x0202 0x212 bit 0
74 * VBUS_CONNECT 0x0202 0x212 bit 1
75 * VBUS_DISCONNECT 0x0202 0x212 bit 2
76 * ALARMON_R 0x0202 0x212 bit 3
77 * HOLD_6S 0x0202 0x212 bit 4
78 * HOLD_1S 0x0202 0x212 bit 5
[all …]
/linux/arch/sh/boards/mach-migor/
H A Dlcd_qvga.c27 * Index 0: "Device Code Read" returns 0x1505.
32 gpio_set_value(GPIO_PTH2, 0); in reset_lcd_module()
44 tmp1 = (data<<1 | 0x00000001) & 0x000001FF; in adjust_reg18()
45 tmp2 = (data<<2 | 0x00000200) & 0x0003FE00; in adjust_reg18()
72 return ((data >> 1) & 0xff) | ((data >> 2) & 0xff00); in read_reg16()
81 for (i = 0; i < no_data; i += 2) in migor_lcd_qvga_seq()
86 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
90 0x0060, 0x2700, 0x0008, 0x0808, 0x0090, 0x001A, 0x0007, 0x0001,
91 0x0017, 0x0001, 0x0019, 0x0000, 0x0010, 0x17B0, 0x0011, 0x0116,
92 0x0012, 0x0198, 0x0013, 0x1400, 0x0029, 0x000C, 0x0012, 0x01B8,
[all …]
/linux/include/video/
H A Dtgafb.h20 #define TGA_TYPE_8PLANE 0
28 #define TGA_ROM_OFFSET 0x0000000
29 #define TGA_REGS_OFFSET 0x0100000
30 #define TGA_8PLANE_FB_OFFSET 0x0200000
31 #define TGA_24PLANE_FB_OFFSET 0x0804000
32 #define TGA_24PLUSZ_FB_OFFSET 0x1004000
34 #define TGA_FOREGROUND_REG 0x0020
35 #define TGA_BACKGROUND_REG 0x0024
36 #define TGA_PLANEMASK_REG 0x0028
37 #define TGA_PIXELMASK_ONESHOT_REG 0x002c
[all …]
/linux/drivers/mfd/
H A Djanz-cmodio.c24 #define CMODIO_MODULBUS_SIZE 0x200
110 res->start = 0; in cmodio_setup_subdevice()
111 res->end = 0; in cmodio_setup_subdevice()
114 return 0; in cmodio_setup_subdevice()
121 unsigned int num_probed = 0; in cmodio_probe_submodules()
125 for (i = 0; i < num_modules; i++) { in cmodio_probe_submodules()
136 if (num_probed == 0) { in cmodio_probe_submodules()
144 return mfd_add_devices(&pdev->dev, 0, priv->cells, in cmodio_probe_submodules()
224 iowrite8(0xf, &priv->ctrl->int_disable); in cmodio_pci_probe()
233 return 0; in cmodio_pci_probe()
[all …]
/linux/arch/xtensa/include/uapi/asm/
H A Dptrace.h19 #define REG_A_BASE 0x0000
20 #define REG_AR_BASE 0x0100
21 #define REG_PC 0x0020
22 #define REG_PS 0x02e6
23 #define REG_WB 0x0248
24 #define REG_WS 0x0249
25 #define REG_LBEG 0x0200
26 #define REG_LEND 0x0201
27 #define REG_LCOUNT 0x0202
28 #define REG_SAR 0x0203
[all …]
/linux/block/
H A Dopal_proto.h20 TCG_SECP_00 = 0,
30 OPAL_DTA_TOKENID_BYTESTRING = 0xe0,
31 OPAL_DTA_TOKENID_SINT = 0xe1,
32 OPAL_DTA_TOKENID_UINT = 0xe2,
33 OPAL_DTA_TOKENID_TOKEN = 0xe3, /* actual token is returned */
34 OPAL_DTA_TOKENID_INVALID = 0X0
37 #define DTAERROR_NO_METHOD_STATUS 0x89
38 #define GENERIC_HOST_SESSION_NUM 0x41
41 #define TPER_SYNC_SUPPORTED 0x01
43 #define LOCKING_SUPPORTED_MASK 0x01
[all …]
/linux/arch/sh/kernel/cpu/sh4a/
H A Dperf_event.c14 #define PPC_CCBR(idx) (0xff200800 + (sizeof(u32) * idx))
15 #define PPC_PMCTR(idx) (0xfc100000 + (sizeof(u32) * idx))
17 #define CCBR_CIT_MASK (0x7ff << 6)
20 #define CCBR_PPCE (1 << 0)
37 #define PPC_PMCAT 0xfc100240
39 #define PPC_PMCAT 0xfc100080
61 * 0x0000 number of elapsed cycles
62 * 0x0200 number of elapsed cycles in privileged mode
63 * 0x0280 number of elapsed cycles while SR.BL is asserted
64 * 0x0202 instruction execution
[all …]
/linux/arch/sh/include/mach-common/mach/
H A Dhighlander.h6 #define PA_NORFLASH_ADDR 0x00000000
7 #define PA_NORFLASH_SIZE 0x04000000
10 #define PA_BCR 0xa4000000 /* FPGA */
13 #define PA_IRLMSK (PA_BCR+0x0000) /* Interrupt Mask control */
14 #define PA_IRLMON (PA_BCR+0x0002) /* Interrupt Status control */
15 #define PA_IRLPRI1 (PA_BCR+0x0004) /* Interrupt Priorty 1 */
16 #define PA_IRLPRI2 (PA_BCR+0x0006) /* Interrupt Priorty 2 */
17 #define PA_IRLPRI3 (PA_BCR+0x0008) /* Interrupt Priorty 3 */
18 #define PA_IRLPRI4 (PA_BCR+0x000a) /* Interrupt Priorty 4 */
19 #define PA_RSTCTL (PA_BCR+0x000c) /* Reset Control */
[all …]
/linux/arch/sh/boot/compressed/
H A Dhead_32.S26 mov #0xffffffe0, r1
69 mov #0, r0
95 .long 0x500000F0 /* Privileged mode, Bank=0, Block=1, IMASK=0xF */
97 .long 0x400000F0 /* magic used by kexec to parse zImage format */
111 .word 0
113 .word 0x0202 ! header version number (>= 0x0105)
115 .word 0 ! default_switch
116 .word 0 ! SETUPSEG
117 .word 0x1000
118 .word 0 ! pointing to kernel version string
[all …]
/linux/tools/perf/pmu-events/arch/arm64/fujitsu/monaka/
H A Dl1d_cache.json35 "EventCode": "0x0200",
40 "EventCode": "0x0201",
45 "EventCode": "0x0202",
50 "EventCode": "0x0208",
55 "EventCode": "0x0209",
60 "EventCode": "0x020A",
65 "EventCode": "0x020D",
/linux/arch/nios2/boot/compressed/
H A Dhead.S33 1: initd 0(r1)
46 1: ldw r8, 0(r1) /* load a word from [r1] */
47 stw r8, 0(r2) /* stort a word to dest [r2] */
54 1: flushd 0(r1)
64 1: stb r0, 0(r2)
71 movia sp, 0x10000
75 stw r4, 0(sp)
82 ldw r4, 0(sp)
90 1: flushd 0(r1)
106 .short 0
[all …]
/linux/drivers/iio/chemical/
H A Dscd30_i2c.c7 * I2C slave address: 0x61
21 #define SCD30_I2C_CRC8_POLYNOMIAL 0x31
24 [CMD_START_MEAS] = 0x0010,
25 [CMD_STOP_MEAS] = 0x0104,
26 [CMD_MEAS_INTERVAL] = 0x4600,
27 [CMD_MEAS_READY] = 0x0202,
28 [CMD_READ_MEAS] = 0x0300,
29 [CMD_ASC] = 0x5306,
30 [CMD_FRC] = 0x5204,
31 [CMD_TEMP_OFFSET] = 0x5403,
[all …]
H A Dsps30_i2c.c7 * I2C slave address: 0x69
21 #define SPS30_I2C_CRC8_POLYNOMIAL 0x31
27 #define SPS30_I2C_START_MEAS 0x0010
28 #define SPS30_I2C_STOP_MEAS 0x0104
29 #define SPS30_I2C_READ_MEAS 0x0300
30 #define SPS30_I2C_MEAS_READY 0x0202
31 #define SPS30_I2C_RESET 0xd304
32 #define SPS30_I2C_CLEAN_FAN 0x5607
33 #define SPS30_I2C_PERIOD 0x8004
34 #define SPS30_I2C_READ_SERIAL 0xd033
[all …]
/linux/drivers/net/can/spi/mcp251xfd/
H A Dmcp251xfd-crc16.c24 0x0000, 0x8005, 0x800f, 0x000a, 0x801b, 0x001e, 0x0014, 0x8011,
25 0x8033, 0x0036, 0x003c, 0x8039, 0x0028, 0x802d, 0x8027, 0x0022,
26 0x8063, 0x0066, 0x006c, 0x8069, 0x0078, 0x807d, 0x8077, 0x0072,
27 0x0050, 0x8055, 0x805f, 0x005a, 0x804b, 0x004e, 0x0044, 0x8041,
28 0x80c3, 0x00c6, 0x00cc, 0x80c9, 0x00d8, 0x80dd, 0x80d7, 0x00d2,
29 0x00f0, 0x80f5, 0x80ff, 0x00fa, 0x80eb, 0x00ee, 0x00e4, 0x80e1,
30 0x00a0, 0x80a5, 0x80af, 0x00aa, 0x80bb, 0x00be, 0x00b4, 0x80b1,
31 0x8093, 0x0096, 0x009c, 0x8099, 0x0088, 0x808d, 0x8087, 0x0082,
32 0x8183, 0x0186, 0x018c, 0x8189, 0x0198, 0x819d, 0x8197, 0x0192,
33 0x01b0, 0x81b5, 0x81bf, 0x01ba, 0x81ab, 0x01ae, 0x01a4, 0x81a1,
[all …]
/linux/drivers/net/wireless/intersil/p54/
H A Deeprom.h131 /* common and choice range (0x0000 - 0x0fff) */
132 #define PDR_END 0x0000
133 #define PDR_MANUFACTURING_PART_NUMBER 0x0001
134 #define PDR_PDA_VERSION 0x0002
135 #define PDR_NIC_SERIAL_NUMBER 0x0003
136 #define PDR_NIC_RAM_SIZE 0x0005
137 #define PDR_RFMODEM_SUP_RANGE 0x0006
138 #define PDR_PRISM_MAC_SUP_RANGE 0x0007
139 #define PDR_NIC_ID 0x0008
141 #define PDR_MAC_ADDRESS 0x0101
[all …]
/linux/sound/soc/codecs/
H A Dsi476x.c24 SI476X_DIGITAL_IO_OUTPUT_FORMAT = 0x0203,
25 SI476X_DIGITAL_IO_OUTPUT_SAMPLE_RATE = 0x0202,
33 #define SI476X_DIGITAL_IO_OUTPUT_WIDTH_MASK ((0x7 << SI476X_DIGITAL_IO_SLOT_SIZE_SHIFT) | \
34 (0x7 << SI476X_DIGITAL_IO_SAMPLE_SIZE_SHIFT))
35 #define SI476X_DIGITAL_IO_OUTPUT_FORMAT_MASK (0x7e)
38 SI476X_DAUDIO_MODE_I2S = (0x0 << 1),
39 SI476X_DAUDIO_MODE_DSP_A = (0x6 << 1),
40 SI476X_DAUDIO_MODE_DSP_B = (0x7 << 1),
41 SI476X_DAUDIO_MODE_LEFT_J = (0x8 << 1),
42 SI476X_DAUDIO_MODE_RIGHT_J = (0x9 << 1),
[all …]
H A Drt1308-sdw.h12 { 0x0000, 0x00 },
13 { 0x0001, 0x00 },
14 { 0x0002, 0x00 },
15 { 0x0003, 0x00 },
16 { 0x0004, 0x00 },
17 { 0x0005, 0x01 },
18 { 0x0020, 0x00 },
19 { 0x0022, 0x00 },
20 { 0x0023, 0x00 },
21 { 0x0024, 0x00 },
[all …]
H A Drt715-sdca-sdw.h14 { 0x201a, 0x00 },
15 { 0x201e, 0x00 },
16 { 0x2020, 0x00 },
17 { 0x2021, 0x00 },
18 { 0x2022, 0x00 },
19 { 0x2023, 0x00 },
20 { 0x2024, 0x00 },
21 { 0x2025, 0x01 },
22 { 0x2026, 0x00 },
23 { 0x2027, 0x00 },
[all …]
/linux/drivers/net/wireless/broadcom/b43legacy/
H A Dphy.c33 0x4D, 0x4C, 0x4B, 0x4A,
34 0x4A, 0x49, 0x48, 0x47,
35 0x47, 0x46, 0x45, 0x45,
36 0x44, 0x43, 0x42, 0x42,
37 0x41, 0x40, 0x3F, 0x3E,
38 0x3D, 0x3C, 0x3B, 0x3A,
39 0x39, 0x38, 0x37, 0x36,
40 0x35, 0x34, 0x32, 0x31,
41 0x30, 0x2F, 0x2D, 0x2C,
42 0x2B, 0x29, 0x28, 0x26,
[all …]
/linux/drivers/media/radio/si4713/
H A Dsi4713.h25 #define SI4713_PRODUCT_NUMBER 0x0D
41 #define SI4713_PWUP_FUNC_TX 0x02
42 #define SI4713_PWUP_FUNC_PATCH 0x0F
43 #define SI4713_PWUP_OPMOD_ANALOG 0x50
44 #define SI4713_PWUP_OPMOD_DIGITAL 0x0F
47 #define SI4713_CMD_POWER_UP 0x01
50 #define SI4713_CMD_GET_REV 0x10
53 #define SI4713_CMD_POWER_DOWN 0x11
57 #define SI4713_CMD_SET_PROPERTY 0x12
61 #define SI4713_CMD_GET_PROPERTY 0x13
[all …]
/linux/drivers/ata/
H A Dpata_triflex.c46 { 0x80, 1, 0x01, 0x01 }, in triflex_prereset()
47 { 0x80, 1, 0x02, 0x02 } in triflex_prereset()
76 u32 timing = 0; in triflex_load_timing()
78 int channel_offset = ap->port_no ? 0x74: 0x70; in triflex_load_timing()
79 unsigned int is_slave = (adev->devno != 0); in triflex_load_timing()
88 timing = 0x0103;break; in triflex_load_timing()
90 timing = 0x0203;break; in triflex_load_timing()
92 timing = 0x0808;break; in triflex_load_timing()
96 timing = 0x0F0F;break; in triflex_load_timing()
98 timing = 0x0202;break; in triflex_load_timing()
[all …]
/linux/Documentation/devicetree/bindings/perf/
H A Driscv,pmu.yaml78 value of variant must be 0xffffffff_ffffffff.
104 riscv,event-to-mhpmevent = <0x0000B 0x0000 0x0001>;
105 riscv,event-to-mhpmcounters = <0x00001 0x00001 0x00000001>,
106 <0x00002 0x00002 0x00000004>,
107 <0x00003 0x0000A 0x00000ff8>,
108 <0x10000 0x10033 0x000ff000>;
110 /* For event ID 0x0002 */
111 <0x0000 0x0002 0xffffffff 0xffffffff 0x00000f8>,
112 /* For event ID 0-4 */
113 <0x0 0x0 0xffffffff 0xfffffff0 0x00000ff0>,
[all …]
/linux/include/media/drv-intf/
H A Dsaa7146_vv.h16 } while (0);
20 } while (0);
31 #define FORMAT_BYTE_SWAP 0x1
32 #define FORMAT_IS_PLANAR 0x2
112 #define SAA7146_USE_PORT_B_FOR_VBI 0x2 /* use input port b for vbi hardware bug workaround */
174 #define RESOURCE_DMA1_HPS 0x1
175 #define RESOURCE_DMA2_CLP 0x2
176 #define RESOURCE_DMA3_BRS 0x4
179 #define SAA7146_HPS_SOURCE_PORT_A 0x00
180 #define SAA7146_HPS_SOURCE_PORT_B 0x01
[all …]
/linux/include/uapi/linux/
H A Dif_pppox.h60 #define PX_PROTO_OE 0 /* Currently just PPPoE */
112 #define PPPOEIOCSFWD _IOW(0xB1 ,0, size_t)
113 #define PPPOEIOCDFWD _IO(0xB1 ,1)
114 /*#define PPPOEIOCGFWD _IOWR(0xB1,2, size_t)*/
117 #define PADI_CODE 0x09
118 #define PADO_CODE 0x07
119 #define PADR_CODE 0x19
120 #define PADS_CODE 0x65
121 #define PADT_CODE 0xa7
129 #define PTT_EOL __cpu_to_be16(0x0000)
[all …]
/linux/arch/m68k/include/asm/
H A Dmac_psc.h37 #define PSC_BASE (0x50F31000)
44 * To access a particular set of registers, add 0xn0 to the base
48 #define pIFRbase 0x100
49 #define pIERbase 0x104
55 #define PSC_MYSTERY 0x804
57 #define PSC_CTL_BASE 0xC00
59 #define PSC_SCSI_CTL 0xC00
60 #define PSC_ENETRD_CTL 0xC10
61 #define PSC_ENETWR_CTL 0xC20
62 #define PSC_FDC_CTL 0xC30
[all …]

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