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/linux/drivers/staging/fbtft/
H A Dfb_bd663474.c31 write_reg(par, 0x000, 0x0001); /*oscillator 0: stop, 1: operation */ in init_display()
35 write_reg(par, 0x100, 0x0000); /* power supply setup */ in init_display()
36 write_reg(par, 0x101, 0x0000); in init_display()
37 write_reg(par, 0x102, 0x3110); in init_display()
38 write_reg(par, 0x103, 0xe200); in init_display()
39 write_reg(par, 0x110, 0x009d); in init_display()
40 write_reg(par, 0x111, 0x0022); in init_display()
41 write_reg(par, 0x100, 0x0120); in init_display()
44 write_reg(par, 0x100, 0x3120); in init_display()
47 write_reg(par, 0x001, 0x0100); in init_display()
[all …]
/linux/include/media/
H A Ddvb-usb-ids.h23 #define USB_VID_774 0x7a69
24 #define USB_VID_ADSTECH 0x06e1
25 #define USB_VID_AFATECH 0x15a4
26 #define USB_VID_ALCOR_MICRO 0x058f
27 #define USB_VID_ALINK 0x05e3
28 #define USB_VID_AME 0x06be
29 #define USB_VID_AMT 0x1c73
30 #define USB_VID_ANCHOR 0x0547
31 #define USB_VID_ANSONIC 0x10b9
32 #define USB_VID_ANUBIS_ELECTRONIC 0x10fd
[all …]
/linux/include/video/
H A Dtgafb.h20 #define TGA_TYPE_8PLANE 0
28 #define TGA_ROM_OFFSET 0x0000000
29 #define TGA_REGS_OFFSET 0x0100000
30 #define TGA_8PLANE_FB_OFFSET 0x0200000
31 #define TGA_24PLANE_FB_OFFSET 0x0804000
32 #define TGA_24PLUSZ_FB_OFFSET 0x1004000
34 #define TGA_FOREGROUND_REG 0x0020
35 #define TGA_BACKGROUND_REG 0x0024
36 #define TGA_PLANEMASK_REG 0x0028
37 #define TGA_PIXELMASK_ONESHOT_REG 0x002c
[all …]
/linux/drivers/mfd/
H A Djanz-cmodio.c24 #define CMODIO_MODULBUS_SIZE 0x200
110 res->start = 0; in cmodio_setup_subdevice()
111 res->end = 0; in cmodio_setup_subdevice()
114 return 0; in cmodio_setup_subdevice()
121 unsigned int num_probed = 0; in cmodio_probe_submodules()
125 for (i = 0; i < num_modules; i++) { in cmodio_probe_submodules()
136 if (num_probed == 0) { in cmodio_probe_submodules()
144 return mfd_add_devices(&pdev->dev, 0, priv->cells, in cmodio_probe_submodules()
224 iowrite8(0xf, &priv->ctrl->int_disable); in cmodio_pci_probe()
233 return 0; in cmodio_pci_probe()
[all …]
/linux/arch/xtensa/include/uapi/asm/
H A Dptrace.h19 #define REG_A_BASE 0x0000
20 #define REG_AR_BASE 0x0100
21 #define REG_PC 0x0020
22 #define REG_PS 0x02e6
23 #define REG_WB 0x0248
24 #define REG_WS 0x0249
25 #define REG_LBEG 0x0200
26 #define REG_LEND 0x0201
27 #define REG_LCOUNT 0x0202
28 #define REG_SAR 0x0203
[all …]
/linux/block/
H A Dopal_proto.h20 TCG_SECP_00 = 0,
30 OPAL_DTA_TOKENID_BYTESTRING = 0xe0,
31 OPAL_DTA_TOKENID_SINT = 0xe1,
32 OPAL_DTA_TOKENID_UINT = 0xe2,
33 OPAL_DTA_TOKENID_TOKEN = 0xe3, /* actual token is returned */
34 OPAL_DTA_TOKENID_INVALID = 0X0
37 #define DTAERROR_NO_METHOD_STATUS 0x89
38 #define GENERIC_HOST_SESSION_NUM 0x41
41 #define TPER_SYNC_SUPPORTED 0x01
43 #define LOCKING_SUPPORTED_MASK 0x01
[all …]
/linux/arch/m68k/include/asm/
H A Dhash.h14 * by GOLDEN_RATIO_32 = 0x61C88647.
16 * The best way to do that appears to be to multiply by 0x8647 with
17 * shifts and adds, and use mulu.w to multiply the high half by 0x61C8.
45 asm( "move.l %2,%0" /* a = x * 0x0001 */ in __hash_32()
46 "\n lsl.l #2,%0" /* a = x * 0x0004 */ in __hash_32()
47 "\n move.l %0,%1" in __hash_32()
48 "\n lsl.l #7,%0" /* a = x * 0x0200 */ in __hash_32()
49 "\n add.l %2,%0" /* a = x * 0x0201 */ in __hash_32()
50 "\n add.l %0,%1" /* b = x * 0x0205 */ in __hash_32()
51 "\n add.l %0,%0" /* a = x * 0x0402 */ in __hash_32()
[all …]
H A Dmac_iop.h16 #define SCC_IOP_BASE_IIFX (0x50F04000)
17 #define ISM_IOP_BASE_IIFX (0x50F12000)
19 #define SCC_IOP_BASE_QUADRA (0x50F0C000)
20 #define ISM_IOP_BASE_QUADRA (0x50F1E000)
24 #define IOP_BYPASS 0x01 /* bypass-mode hardware access */
25 #define IOP_AUTOINC 0x02 /* allow autoincrement of ramhi/lo */
26 #define IOP_RUN 0x04 /* set to 0 to reset IOP chip */
27 #define IOP_IRQ 0x08 /* generate IRQ to IOP if 1 */
28 #define IOP_INT0 0x10 /* intr priority from IOP to host */
29 #define IOP_INT1 0x20 /* intr priority from IOP to host */
[all …]
/linux/drivers/soc/fsl/qbman/
H A Dbman_priv.h38 #define BM_PIRQ_RCRI 0x00000002 /* RCR Ring (below threshold) */
41 #define BMAN_REV10 0x0100
42 #define BMAN_REV20 0x0200
43 #define BMAN_REV21 0x0201
44 extern u16 bman_ip_rev; /* 0 if uninitialised, otherwise BMAN_REVx */
/linux/Documentation/arch/arm/
H A Dnetwinder.rst15 0x0000 0x000f DMA1
16 0x0020 0x0021 PIC1
17 0x0060 0x006f Keyboard
18 0x0070 0x007f RTC
19 0x0080 0x0087 DMA1
20 0x0088 0x008f DMA2
21 0x00a0 0x00a3 PIC2
22 0x00c0 0x00df DMA2
23 0x0180 0x0187 IRDA
24 0x01f0 0x01f6 ide0
[all …]
/linux/tools/perf/pmu-events/arch/arm64/fujitsu/monaka/
H A Dl1d_cache.json35 "EventCode": "0x0200",
40 "EventCode": "0x0201",
45 "EventCode": "0x0202",
50 "EventCode": "0x0208",
55 "EventCode": "0x0209",
60 "EventCode": "0x020A",
65 "EventCode": "0x020D",
/linux/drivers/ata/
H A Dpata_piccolo.c33 static const u16 pio[6] = { /* For reg 0x50 low word & E088 */ in tosh_set_piomode()
34 0x0566, 0x0433, 0x0311, 0x0201, 0x0200, 0x0100 in tosh_set_piomode()
38 pci_read_config_word(pdev, 0x50, &conf); in tosh_set_piomode()
39 conf &= 0xE088; in tosh_set_piomode()
41 pci_write_config_word(pdev, 0x50, conf); in tosh_set_piomode()
48 pci_read_config_dword(pdev, 0x5C, &conf); in tosh_set_dmamode()
49 conf &= 0x78FFE088; /* Keep the other bits */ in tosh_set_dmamode()
52 conf |= 0x80000000; in tosh_set_dmamode()
54 conf |= (2 - udma) * 0x111; /* spread into three nibbles */ in tosh_set_dmamode()
57 0x0655, 0x0200, 0x0200, 0x0100 in tosh_set_dmamode()
[all …]
/linux/sound/soc/codecs/
H A Drt722-sdca-sdw.h15 { 0x202d, 0x00 },
16 { 0x2f01, 0x00 },
17 { 0x2f02, 0x09 },
18 { 0x2f03, 0x00 },
19 { 0x2f04, 0x00 },
20 { 0x2f05, 0x0b },
21 { 0x2f06, 0x01 },
22 { 0x2f08, 0x00 },
23 { 0x2f09, 0x00 },
24 { 0x2f0a, 0x00 },
[all …]
H A Drt1308-sdw.h12 { 0x0000, 0x00 },
13 { 0x0001, 0x00 },
14 { 0x0002, 0x00 },
15 { 0x0003, 0x00 },
16 { 0x0004, 0x00 },
17 { 0x0005, 0x01 },
18 { 0x0020, 0x00 },
19 { 0x0022, 0x00 },
20 { 0x0023, 0x00 },
21 { 0x0024, 0x00 },
[all …]
/linux/drivers/media/rc/keymaps/
H A Drc-avermedia-m135a.c23 { 0x0200, KEY_POWER2 },
24 { 0x022e, KEY_DOT }, /* '.' */
25 { 0x0201, KEY_MODE }, /* TV/FM or SOURCE */
27 { 0x0205, KEY_NUMERIC_1 },
28 { 0x0206, KEY_NUMERIC_2 },
29 { 0x0207, KEY_NUMERIC_3 },
30 { 0x0209, KEY_NUMERIC_4 },
31 { 0x020a, KEY_NUMERIC_5 },
32 { 0x020b, KEY_NUMERIC_6 },
33 { 0x020d, KEY_NUMERIC_7 },
[all …]
/linux/include/scsi/fc/
H A Dfc_ms.h25 #define FC_FDMI_SUBTYPE 0x10 /* fs_ct_hdr.ct_fs_subtype */
37 FC_FDMI_GRHL = 0x0100, /* Get Registered HBA List */
38 FC_FDMI_GHAT = 0x0101, /* Get HBA Attributes */
39 FC_FDMI_GRPL = 0x0102, /* Get Registered Port List */
40 FC_FDMI_GPAT = 0x0110, /* Get Port Attributes */
41 FC_FDMI_RHBA = 0x0200, /* Register HBA */
42 FC_FDMI_RHAT = 0x0201, /* Register HBA Attributes */
43 FC_FDMI_RPRT = 0x0210, /* Register Port */
44 FC_FDMI_RPA = 0x0211, /* Register Port Attributes */
45 FC_FDMI_DHBA = 0x0300, /* Deregister HBA */
[all …]
/linux/drivers/net/can/softing/
H A Dsofting.h105 #define DPRAM_RX 0x0000
108 #define DPRAM_RX_RD 0x0201 /* uint8_t */
109 #define DPRAM_RX_WR 0x0205 /* uint8_t */
110 #define DPRAM_RX_LOST 0x0207 /* uint8_t */
112 #define DPRAM_FCT_PARAM 0x0300 /* int16_t [20] */
113 #define DPRAM_FCT_RESULT 0x0328 /* int16_t */
114 #define DPRAM_FCT_HOST 0x032b /* uint16_t */
116 #define DPRAM_INFO_BUSSTATE 0x0331 /* uint16_t */
117 #define DPRAM_INFO_BUSSTATE2 0x0335 /* uint16_t */
118 #define DPRAM_INFO_ERRSTATE 0x0339 /* uint16_t */
[all …]
/linux/drivers/net/wireless/intersil/p54/
H A Deeprom.h131 /* common and choice range (0x0000 - 0x0fff) */
132 #define PDR_END 0x0000
133 #define PDR_MANUFACTURING_PART_NUMBER 0x0001
134 #define PDR_PDA_VERSION 0x0002
135 #define PDR_NIC_SERIAL_NUMBER 0x0003
136 #define PDR_NIC_RAM_SIZE 0x0005
137 #define PDR_RFMODEM_SUP_RANGE 0x0006
138 #define PDR_PRISM_MAC_SUP_RANGE 0x0007
139 #define PDR_NIC_ID 0x0008
141 #define PDR_MAC_ADDRESS 0x0101
[all …]
/linux/drivers/media/radio/si4713/
H A Dsi4713.h25 #define SI4713_PRODUCT_NUMBER 0x0D
41 #define SI4713_PWUP_FUNC_TX 0x02
42 #define SI4713_PWUP_FUNC_PATCH 0x0F
43 #define SI4713_PWUP_OPMOD_ANALOG 0x50
44 #define SI4713_PWUP_OPMOD_DIGITAL 0x0F
47 #define SI4713_CMD_POWER_UP 0x01
50 #define SI4713_CMD_GET_REV 0x10
53 #define SI4713_CMD_POWER_DOWN 0x11
57 #define SI4713_CMD_SET_PROPERTY 0x12
61 #define SI4713_CMD_GET_PROPERTY 0x13
[all …]
/linux/arch/x86/boot/
H A Dedd.c28 ireg.ax = 0x0201; /* Legacy Read, one sector */ in read_mbr()
29 ireg.cx = 0x0001; /* Sector 0-0-1 */ in read_mbr()
33 intcall(0x13, &ireg, &oreg); in read_mbr()
35 return -(oreg.eflags & X86_EFLAGS_CF); /* 0 or -1 */ in read_mbr()
62 memset(mbrbuf_ptr, 0, sector_size); in read_mbr_sig()
70 return mbr_magic == 0xAA55 ? 0 : -1; in read_mbr_sig()
77 memset(ei, 0, sizeof(*ei)); in get_edd_info()
82 ireg.ah = 0x41; in get_edd_info()
85 intcall(0x13, &ireg, &oreg); in get_edd_info()
100 ireg.ah = 0x48; in get_edd_info()
[all …]
/linux/drivers/gpu/drm/nouveau/nvkm/subdev/mxm/
H A Dmxms.c42 case 0x0200: in mxms_version()
43 case 0x0201: in mxms_version()
44 case 0x0300: in mxms_version()
51 return 0x0000; in mxms_version()
70 u8 *mxms = mxms_data(mxm), sum = 0; in mxms_checksum()
84 if (*(u32 *)mxms != 0x5f4d584d) { in mxms_valid()
104 u8 type = desc[0] & 0x0f; in mxms_foreach()
105 u8 headerlen = 0; in mxms_foreach()
106 u8 recordlen = 0; in mxms_foreach()
107 u8 entries = 0; in mxms_foreach()
[all …]
/linux/include/media/drv-intf/
H A Dsaa7146_vv.h16 } while (0);
20 } while (0);
31 #define FORMAT_BYTE_SWAP 0x1
32 #define FORMAT_IS_PLANAR 0x2
112 #define SAA7146_USE_PORT_B_FOR_VBI 0x2 /* use input port b for vbi hardware bug workaround */
175 #define RESOURCE_DMA1_HPS 0x1
176 #define RESOURCE_DMA2_CLP 0x2
177 #define RESOURCE_DMA3_BRS 0x4
180 #define SAA7146_HPS_SOURCE_PORT_A 0x00
181 #define SAA7146_HPS_SOURCE_PORT_B 0x0
[all...]
/linux/include/uapi/linux/
H A Dif_pppox.h60 #define PX_PROTO_OE 0 /* Currently just PPPoE */
112 #define PPPOEIOCSFWD _IOW(0xB1 ,0, size_t)
113 #define PPPOEIOCDFWD _IO(0xB1 ,1)
114 /*#define PPPOEIOCGFWD _IOWR(0xB1,2, size_t)*/
117 #define PADI_CODE 0x09
118 #define PADO_CODE 0x07
119 #define PADR_CODE 0x19
120 #define PADS_CODE 0x65
121 #define PADT_CODE 0xa7
129 #define PTT_EOL __cpu_to_be16(0x0000)
[all …]
/linux/arch/mips/kernel/
H A Docteon_switch.S31 #if CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE > 0
38 andi t0, 0x3f
46 LONG_L t8, 0(t1) /* Load from CVMSEG */
50 LONG_S t8, 0(t2) /* Store CVMSEG to thread storage */
58 xori t0, t0, 0x40 /* Bit 6 is CVMSEG user enable */
66 LONG_S t9, 0(t8)
80 li a3, 0xff01
83 nor a3, $0, a3
102 dmfc2 t0, 0x0201
103 dmfc2 t1, 0x0202
[all …]
/linux/include/sound/
H A Dwss.h18 #define WSS_MODE_NONE 0x0000
19 #define WSS_MODE_PLAY 0x0001
20 #define WSS_MODE_RECORD 0x0002
21 #define WSS_MODE_TIMER 0x0004
26 #define WSS_HW_DETECT 0x0000 /* let CS4231 driver detect chip */
27 #define WSS_HW_DETECT3 0x0001 /* allow mode 3 */
28 #define WSS_HW_TYPE_MASK 0xff00 /* type mask */
29 #define WSS_HW_CS4231_MASK 0x0100 /* CS4231 serie */
30 #define WSS_HW_CS4231 0x0100 /* CS4231 chip */
31 #define WSS_HW_CS4231A 0x0101 /* CS4231A chip */
[all …]

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