Searched +full:0 +full:x01c06000 (Results 1 – 7 of 7) sorted by relevance
47 "^.*@[0-9a-f]+":54 minimum: 076 reg = <0x01c06000 0x1000>;81 #size-cells = <0>;
47 const: 053 const: 076 reg = <0x01c06000 0x1000>;88 #clock-cells = <0>;90 #phy-cells = <0>;
20 qcom,msm-id = <458 0x10000>, <483 0x10000>, <509 0x10000>;25 reg = <0 0>;33 #clock-cells = <0>;40 #clock-cells = <0>;46 #clock-cells = <0>;52 #size-cells = <0>;54 cpu0: cpu@0 {57 reg = <0x0>;115 reg = <0x8fcad000 0x40000>;120 reg = <0x8fcfd000 0x1000>;[all …]
56 #size-cells = <0>;58 cpu0: cpu@0 {61 reg = <0x0>;97 #clock-cells = <0>;104 #clock-cells = <0>;119 size = <0x6000000>;120 alloc-ranges = <0x40000000 0x10000000>;135 reg = <0x01c00000 0x30>;140 sram_a: sram@0 {142 reg = <0x00000000 0xc000>;[all …]
111 #size-cells = <0>;112 cpu0: cpu@0 {115 reg = <0x0>;166 #clock-cells = <0>;173 #clock-cells = <0>;199 size = <0x6000000>;200 alloc-ranges = <0x40000000 0x10000000>;214 reg = <0x01c00000 0x30>;219 sram_a: sram@0 {221 reg = <0x00000000 0xc000>;[all …]
64 #clock-cells = <0>;72 #clock-cells = <0>;82 #size-cells = <0>;84 cpu0: cpu@0 {87 reg = <0>;130 polling-delay-passive = <0>;131 polling-delay = <0>;132 thermal-sensors = <&ths 0>;143 hysteresis = <0>;161 polling-delay-passive = <0>;[all …]
101 #size-cells = <0>;103 cpu0: cpu@0 {106 reg = <0>;181 size = <0x6000000>;182 alloc-ranges = <0x40000000 0x10000000>;208 #clock-cells = <0>;215 #clock-cells = <0>;231 #clock-cells = <0>;238 #clock-cells = <0>;245 #clock-cells = <0>;[all …]