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123

/linux/drivers/net/wireless/realtek/rtw89/
H A Drtw8852bt_rfk_table.c8 RTW89_DECL_RFK_WM(0x12a8, 0x0000000f, 0x4),
9 RTW89_DECL_RFK_WM(0x32a8, 0x0000000f, 0x4),
10 RTW89_DECL_RFK_WM(0x12bc, 0x000ffff0, 0x5555),
11 RTW89_DECL_RFK_WM(0x32bc, 0x000ffff0, 0x5555),
12 RTW89_DECL_RFK_WM(0x0300, 0xff000000, 0x16),
13 RTW89_DECL_RFK_WM(0x0304, 0x000000ff, 0x19),
14 RTW89_DECL_RFK_WM(0x0314, 0xffff0000, 0x2041),
15 RTW89_DECL_RFK_WM(0x0318, 0xffffffff, 0x2041),
16 RTW89_DECL_RFK_WM(0x0318, 0xffffffff, 0x20012041),
17 RTW89_DECL_RFK_WM(0x0020, 0x00006000, 0x3),
[all …]
H A Drtw8852b_rfk_table.c8 RTW89_DECL_RFK_WM(0xC0D4, 0xffffffff, 0x4486888c),
9 RTW89_DECL_RFK_WM(0xC0D8, 0xffffffff, 0xc6ba10e0),
10 RTW89_DECL_RFK_WM(0xc0dc, 0xffffffff, 0x30c52868),
11 RTW89_DECL_RFK_WM(0xc0e0, 0xffffffff, 0x05008128),
12 RTW89_DECL_RFK_WM(0xc0e4, 0xffffffff, 0x0000272b),
13 RTW89_DECL_RFK_WM(0xC1D4, 0xffffffff, 0x4486888c),
14 RTW89_DECL_RFK_WM(0xC1D8, 0xffffffff, 0xc6ba10e0),
15 RTW89_DECL_RFK_WM(0xc1dc, 0xffffffff, 0x30c52868),
16 RTW89_DECL_RFK_WM(0xc1e0, 0xffffffff, 0x05008128),
17 RTW89_DECL_RFK_WM(0xc1e4, 0xffffffff, 0x0000272b),
[all …]
H A Drtw8852c_rfk_table.c8 RTW89_DECL_RFK_WM(0xc004, BIT(17), 0x1),
9 RTW89_DECL_RFK_WM(0xc024, BIT(17), 0x1),
10 RTW89_DECL_RFK_WM(0xc104, BIT(17), 0x1),
11 RTW89_DECL_RFK_WM(0xc124, BIT(17), 0x1),
17 RTW89_DECL_RFK_WM(0xc000, BIT(17), 0x0),
18 RTW89_DECL_RFK_WM(0xc000, BIT(17), 0x1),
24 RTW89_DECL_RFK_WM(0xc100, BIT(17), 0x0),
25 RTW89_DECL_RFK_WM(0xc100, BIT(17), 0x1),
31 RTW89_DECL_RFK_WM(0x12b8, BIT(30), 0x1),
32 RTW89_DECL_RFK_WM(0x030c, BIT(28), 0x1),
[all …]
H A Drtw8851b_rfk_table.c8 RTW89_DECL_RFK_WM(0xc210, 0x003fc000, 0x80),
9 RTW89_DECL_RFK_WM(0xc224, 0x003fc000, 0x80),
10 RTW89_DECL_RFK_WM(0xc0f8, 0x30000000, 0x3),
11 RTW89_DECL_RFK_WM(0x12b8, BIT(30), 0x1),
12 RTW89_DECL_RFK_WM(0x030c, 0x1f000000, 0x1f),
13 RTW89_DECL_RFK_WM(0x032c, 0xc0000000, 0x0),
14 RTW89_DECL_RFK_WM(0x032c, BIT(22), 0x0),
15 RTW89_DECL_RFK_WM(0x032c, BIT(22), 0x1),
16 RTW89_DECL_RFK_WM(0x032c, BIT(16), 0x0),
17 RTW89_DECL_RFK_WM(0x032c, BIT(20), 0x1),
[all …]
/linux/arch/arm/boot/dts/microchip/
H A Dat91sam9g15.dtsi19 0xffffffff 0xffe0399f 0x00000000 /* pioA */
20 0x00040000 0x00047e3f 0x00000000 /* pioB */
21 0xfdffffff 0x00000000 0xb83fffff /* pioC */
22 0x003fffff 0x003f8000 0x00000000 /* pioD */
H A Dat91sam9g35.dtsi21 0xffffffff 0xffe0399f 0xc000000c /* pioA */
22 0x000406ff 0x00047e3f 0x00000000 /* pioB */
23 0xfdffffff 0x00000000 0xb83fffff /* pioC */
24 0x003fffff 0x003f8000 0x00000000 /* pioD */
H A Dat91sam9g25.dtsi22 0xffffffff 0xffe0399f 0xc000001c /* pioA */
23 0x0007ffff 0x00047e3f 0x00000000 /* pioB */
24 0x80000000 0x07c0ffff 0xb83fffff /* pioC */
25 0x003fffff 0x003f8000 0x00000000 /* pioD */
H A Dat91sam9x25.dtsi23 0xffffffff 0xffe03fff 0xc000001c /* pioA */
24 0x0007ffff 0x00047e3f 0x00000000 /* pioB */
25 0x80000000 0xfffd0000 0xb83fffff /* pioC */
26 0x003fffff 0x003f8000 0x00000000 /* pioD */
H A Dat91sam9x35.dtsi22 0xffffffff 0xffe03fff 0xc000000c /* pioA */
23 0x000406ff 0x00047e3f 0x00000000 /* pioB */
24 0xfdffffff 0x00000000 0xb83fffff /* pioC */
25 0x003fffff 0x003f8000 0x00000000 /* pioD */
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dtonga_sdma_pkt_open.h26 #define SDMA_OP_NOP 0
41 #define SDMA_SUBOP_TIMESTAMP_SET 0
44 #define SDMA_SUBOP_COPY_LINEAR 0
50 #define SDMA_SUBOP_WRITE_LINEAR 0
54 #define SDMA_PKT_HEADER_op_offset 0
55 #define SDMA_PKT_HEADER_op_mask 0x000000FF
56 #define SDMA_PKT_HEADER_op_shift 0
60 #define SDMA_PKT_HEADER_sub_op_offset 0
61 #define SDMA_PKT_HEADER_sub_op_mask 0x000000FF
71 #define SDMA_PKT_COPY_LINEAR_HEADER_op_offset 0
[all …]
H A Diceland_sdma_pkt_open.h26 #define SDMA_OP_NOP 0
41 #define SDMA_SUBOP_TIMESTAMP_SET 0
44 #define SDMA_SUBOP_COPY_LINEAR 0
50 #define SDMA_SUBOP_WRITE_LINEAR 0
54 #define SDMA_PKT_HEADER_op_offset 0
55 #define SDMA_PKT_HEADER_op_mask 0x000000FF
56 #define SDMA_PKT_HEADER_op_shift 0
60 #define SDMA_PKT_HEADER_sub_op_offset 0
61 #define SDMA_PKT_HEADER_sub_op_mask 0x000000FF
71 #define SDMA_PKT_COPY_LINEAR_HEADER_op_offset 0
[all …]
/linux/Documentation/devicetree/bindings/interrupt-controller/
H A Darm,versatile-fpga-irq.txt18 the interrupts are valid. Unconnected/unused lines are set to 0, and
30 reg = <0x14000000 0x100>;
31 clear-mask = <0xffffffff>;
32 valid-mask = <0x003fffff>;
/linux/Documentation/devicetree/bindings/watchdog/
H A Dsnps,dw-wdt.yaml70 default: [0x0001000 0x0002000 0x0004000 0x0008000
71 0x0010000 0x0020000 0x0040000 0x0080000
72 0x0100000 0x0200000 0x0400000 0x0800000
73 0x1000000 0x2000000 0x4000000 0x8000000]
88 reg = <0xffd02000 0x1000>;
89 interrupts = <0 171 4>;
97 reg = <0xffd02000 0x1000>;
98 interrupts = <0 171 4>;
101 snps,watchdog-tops = <0x000000FF 0x000001FF 0x000003FF
102 0x000007FF 0x0000FFFF 0x0001FFFF
[all …]
/linux/drivers/mtd/maps/
H A Dcfi_flagadm.c36 * 1: bootloader first 128k (0x00000000 - 0x0001FFFF) size 0x020000
37 * 2: kernel 640k (0x00020000 - 0x000BFFFF) size 0x0A0000
38 * 3: compressed 1536k root ramdisk (0x000C0000 - 0x0023FFFF) size 0x180000
39 * 4: writeable diskpartition (jffs)(0x00240000 - 0x003FFFFF) size 0x1C0000
42 #define FLASH_PHYS_ADDR 0x40000000
43 #define FLASH_SIZE 0x400000
45 #define FLASH_PARTITION0_ADDR 0x00000000
46 #define FLASH_PARTITION0_SIZE 0x00020000
48 #define FLASH_PARTITION1_ADDR 0x00020000
49 #define FLASH_PARTITION1_SIZE 0x000A0000
[all …]
/linux/drivers/gpu/drm/nouveau/nvkm/subdev/devinit/
H A Dgt215.c45 if (ret < 0) in gt215_devinit_pll_set()
51 nvkm_wr32(device, info.reg + 0, 0x50000610); in gt215_devinit_pll_set()
52 nvkm_mask(device, info.reg + 4, 0x003fffff, in gt215_devinit_pll_set()
69 u32 r001540 = nvkm_rd32(device, 0x001540); in gt215_devinit_disable()
70 u32 r00154c = nvkm_rd32(device, 0x00154c); in gt215_devinit_disable()
72 if (!(r001540 & 0x40000000)) { in gt215_devinit_disable()
73 nvkm_subdev_disable(device, NVKM_ENGINE_MSPDEC, 0); in gt215_devinit_disable()
74 nvkm_subdev_disable(device, NVKM_ENGINE_MSPPP, 0); in gt215_devinit_disable()
77 if (!(r00154c & 0x00000004)) in gt215_devinit_disable()
78 nvkm_subdev_disable(device, NVKM_ENGINE_DISP, 0); in gt215_devinit_disable()
[all …]
/linux/drivers/gpu/drm/nouveau/nvkm/engine/gr/
H A Dctxgf108.c34 { 0x001000, 1, 0x01, 0x00000004 },
35 { 0x0000a9, 1, 0x01, 0x0000ffff },
36 { 0x000038, 1, 0x01, 0x0fac6881 },
37 { 0x00003d, 1, 0x01, 0x00000001 },
38 { 0x0000e8, 8, 0x01, 0x00000400 },
39 { 0x000078, 8, 0x01, 0x00000300 },
40 { 0x000050, 1, 0x01, 0x00000011 },
41 { 0x000058, 8, 0x01, 0x00000008 },
42 { 0x000208, 8, 0x01, 0x00000001 },
43 { 0x000081, 1, 0x01, 0x00000001 },
[all …]
H A Dctxgf110.c32 { 0x001000, 1, 0x01, 0x00000004 },
33 { 0x0000a9, 1, 0x01, 0x0000ffff },
34 { 0x000038, 1, 0x01, 0x0fac6881 },
35 { 0x00003d, 1, 0x01, 0x00000001 },
36 { 0x0000e8, 8, 0x01, 0x00000400 },
37 { 0x000078, 8, 0x01, 0x00000300 },
38 { 0x000050, 1, 0x01, 0x00000011 },
39 { 0x000058, 8, 0x01, 0x00000008 },
40 { 0x000208, 8, 0x01, 0x00000001 },
41 { 0x000081, 1, 0x01, 0x00000001 },
[all …]
H A Dctxgf119.c32 { 0x001000, 1, 0x01, 0x00000004 },
33 { 0x0000a9, 1, 0x01, 0x0000ffff },
34 { 0x000038, 1, 0x01, 0x0fac6881 },
35 { 0x00003d, 1, 0x01, 0x00000001 },
36 { 0x0000e8, 8, 0x01, 0x00000400 },
37 { 0x000078, 8, 0x01, 0x00000300 },
38 { 0x000050, 1, 0x01, 0x00000011 },
39 { 0x000058, 8, 0x01, 0x00000008 },
40 { 0x000208, 8, 0x01, 0x00000001 },
41 { 0x000081, 1, 0x01, 0x00000001 },
[all …]
H A Dctxgk208.c32 { 0x001000, 1, 0x01, 0x00000004 },
33 { 0x000039, 3, 0x01, 0x00000000 },
34 { 0x0000a9, 1, 0x01, 0x0000ffff },
35 { 0x000038, 1, 0x01, 0x0fac6881 },
36 { 0x00003d, 1, 0x01, 0x00000001 },
37 { 0x0000e8, 8, 0x01, 0x00000400 },
38 { 0x000078, 8, 0x01, 0x00000300 },
39 { 0x000050, 1, 0x01, 0x00000011 },
40 { 0x000058, 8, 0x01, 0x00000008 },
41 { 0x000208, 8, 0x01, 0x00000001 },
[all …]
/linux/drivers/net/wireless/ath/ath9k/
H A Dreg_mci.h20 #define AR_MCI_COMMAND0 0x1800
21 #define AR_MCI_COMMAND0_HEADER 0xFF
22 #define AR_MCI_COMMAND0_HEADER_S 0
23 #define AR_MCI_COMMAND0_LEN 0x1f00
25 #define AR_MCI_COMMAND0_DISABLE_TIMESTAMP 0x2000
28 #define AR_MCI_COMMAND1 0x1804
30 #define AR_MCI_COMMAND2 0x1808
31 #define AR_MCI_COMMAND2_RESET_TX 0x01
32 #define AR_MCI_COMMAND2_RESET_TX_S 0
33 #define AR_MCI_COMMAND2_RESET_RX 0x02
[all …]
/linux/arch/parisc/kernel/
H A Dperf_images.h27 0x4c00c000, 0x00000000, 0x00060000, 0x00000000,
28 0xe0e0e0e0, 0x004e0004, 0x07ffffff, 0xffc01380,
29 0x0101ffff, 0xfffff104, 0xe000c07f, 0xfffffffc,
30 0x01380010, 0x1fffffff, 0xff000000, 0x00000000,
31 0x00000fff, 0xff00000f, 0xffff0000, 0x0fffff00,
32 0x000fffff, 0x00000000, 0x00000000, 0x00ffffff,
33 0xfffff000, 0x0000000f, 0xffffffff, 0xff000000,
34 0x0000ffff, 0xfffffff0, 0x00000000, 0x0fffffff,
35 0xffff0000, 0x00000000, 0x6fffffff, 0xffffffff,
36 0xfff55fff, 0xffffffff, 0xffffffff, 0xf0000000,
[all …]
/linux/drivers/staging/media/atomisp/pci/
H A Datomisp_compat_css20.c73 writeb(data, isp->base + (addr & 0x003FFFFF)); in atomisp_css2_hw_store_8()
83 writew(data, isp->base + (addr & 0x003FFFFF)); in atomisp_css2_hw_store_16()
93 writel(data, isp->base + (addr & 0x003FFFFF)); in atomisp_css2_hw_store_32()
104 ret = readb(isp->base + (addr & 0x003FFFFF)); in atomisp_css2_hw_load_8()
116 ret = readw(isp->base + (addr & 0x003FFFFF)); in atomisp_css2_hw_load_16()
128 ret = readl(isp->base + (addr & 0x003FFFFF)); in atomisp_css2_hw_load_32()
139 addr &= 0x003FFFFF; in atomisp_css2_hw_store()
141 for (i = 0; i < n; i++, from++) in atomisp_css2_hw_store()
153 addr &= 0x003FFFFF; in atomisp_css2_hw_load()
155 for (i = 0; i < n; i++, to++) in atomisp_css2_hw_load()
[all …]
/linux/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/
H A Dvmmnv44.c30 u32 pteo = (ptei << 2) & ~0x0000000f; in nv44_vmm_pgt_fill()
33 tmp[0] = nvkm_ro32(pt->memory, pteo + 0x0); in nv44_vmm_pgt_fill()
34 tmp[1] = nvkm_ro32(pt->memory, pteo + 0x4); in nv44_vmm_pgt_fill()
35 tmp[2] = nvkm_ro32(pt->memory, pteo + 0x8); in nv44_vmm_pgt_fill()
36 tmp[3] = nvkm_ro32(pt->memory, pteo + 0xc); in nv44_vmm_pgt_fill()
40 switch (ptei++ & 0x3) { in nv44_vmm_pgt_fill()
41 case 0: in nv44_vmm_pgt_fill()
42 tmp[0] &= ~0x07ffffff; in nv44_vmm_pgt_fill()
43 tmp[0] |= addr; in nv44_vmm_pgt_fill()
46 tmp[0] &= ~0xf8000000; in nv44_vmm_pgt_fill()
[all …]
/linux/arch/arm/boot/dts/arm/
H A Dintegratorap.dts17 #size-cells = <0>;
19 cpu@0 {
28 reg = <0>;
37 operating-points = <71000 0
38 66000 0
39 60000 0
40 48000 0
41 36000 0
42 24000 0
43 12000 0>;
[all …]
/linux/drivers/scsi/esas2r/
H A Datvda.h53 #define VDA_DEVADDRF_SATA 0x01
54 #define VDA_DEVADDRF_SSD 0x02
78 #define VDA_FUNC_SCSI 0x00
79 #define VDA_FUNC_FLASH 0x01
80 #define VDA_FUNC_DIAG 0x02
81 #define VDA_FUNC_AE 0x03
82 #define VDA_FUNC_CLI 0x04
83 #define VDA_FUNC_IOCTL 0x05
84 #define VDA_FUNC_CFG 0x06
85 #define VDA_FUNC_MGT 0x07
[all …]

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