/linux/drivers/media/usb/gspca/ |
H A D | benq.c | 39 if (gspca_dev->usb_err < 0) in reg_w() 41 ret = usb_control_msg(dev, usb_sndctrlpipe(dev, 0), in reg_w() 42 0x02, in reg_w() 47 0, in reg_w() 49 if (ret < 0) { in reg_w() 62 return 0; in sd_config() 68 return 0; in sd_init() 77 /* create 4 URBs - 2 on endpoint 0x83 and 2 on 0x082 */ in sd_start() 83 for (n = 0; n < 4; n++) { in sd_start() 101 n & 1 ? 0x82 : 0x83); in sd_start() [all …]
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/linux/include/linux/platform_data/ |
H A D | gpio-omap.h | 18 #define OMAP1_MPUIO_BASE 0xfffb5000 24 #define OMAP_MPUIO_INPUT_LATCH 0x00 25 #define OMAP_MPUIO_OUTPUT 0x04 26 #define OMAP_MPUIO_IO_CNTL 0x08 27 #define OMAP_MPUIO_KBR_LATCH 0x10 28 #define OMAP_MPUIO_KBC 0x14 29 #define OMAP_MPUIO_GPIO_EVENT_MODE 0x18 30 #define OMAP_MPUIO_GPIO_INT_EDGE 0x1c 31 #define OMAP_MPUIO_KBD_INT 0x20 32 #define OMAP_MPUIO_GPIO_INT 0x24 [all …]
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/linux/drivers/gpu/drm/amd/include/asic_reg/nbio/ |
H A D | nbio_6_1_offset.h | 27 // base address: 0x0 28 …PSWUSCFG0_VENDOR_ID 0x0000 29 …PSWUSCFG0_DEVICE_ID 0x0002 30 …PSWUSCFG0_COMMAND 0x0004 31 …PSWUSCFG0_STATUS 0x0006 32 …PSWUSCFG0_REVISION_ID 0x0008 33 …PSWUSCFG0_PROG_INTERFACE 0x0009 34 …PSWUSCFG0_SUB_CLASS 0x000a 35 …PSWUSCFG0_BASE_CLASS 0x000b 36 …PSWUSCFG0_CACHE_LINE 0x000c [all …]
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H A D | nbio_7_0_offset.h | 27 // base address: 0x0 28 …NB_NBCFG0_NB_VENDOR_ID 0x0000 29 …NB_NBCFG0_NB_DEVICE_ID 0x0002 30 …NB_NBCFG0_NB_COMMAND 0x0004 31 …NB_NBCFG0_NB_STATUS 0x0006 32 …NB_NBCFG0_NB_REVISION_ID 0x0008 33 …NB_NBCFG0_NB_REGPROG_INF 0x0009 34 …NB_NBCFG0_NB_SUB_CLASS 0x000a 35 …NB_NBCFG0_NB_BASE_CODE 0x000b 36 …NB_NBCFG0_NB_CACHE_LINE 0x000c [all …]
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H A D | nbio_7_4_offset.h | 27 // base address: 0x0 28 …PSWUSCFG0_VENDOR_ID 0x0000 29 …PSWUSCFG0_DEVICE_ID 0x0002 30 …PSWUSCFG0_COMMAND 0x0004 31 …PSWUSCFG0_STATUS 0x0006 32 …PSWUSCFG0_REVISION_ID 0x0008 33 …PSWUSCFG0_PROG_INTERFACE 0x0009 34 …PSWUSCFG0_SUB_CLASS 0x000a 35 …PSWUSCFG0_BASE_CLASS 0x000b 36 …PSWUSCFG0_CACHE_LINE 0x000c [all …]
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/linux/sound/soc/mediatek/mt2701/ |
H A D | mt2701-reg.h | 12 #define AUDIO_TOP_CON0 0x0000 13 #define AUDIO_TOP_CON4 0x0010 14 #define AUDIO_TOP_CON5 0x0014 15 #define AFE_DAIBT_CON0 0x001c 16 #define AFE_MRGIF_CON 0x003c 17 #define ASMI_TIMING_CON1 0x0100 18 #define ASMO_TIMING_CON1 0x0104 19 #define PWR1_ASM_CON1 0x0108 20 #define ASYS_TOP_CON 0x0600 21 #define ASYS_I2SIN1_CON 0x0604 [all …]
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/linux/arch/arm/mach-omap2/ |
H A D | prm3xxx.h | 33 #define OMAP3_PRM_REVISION_OFFSET 0x0004 34 #define OMAP3430_PRM_REVISION OMAP34XX_PRM_REGADDR(OCP_MOD, 0x0004) 35 #define OMAP3_PRM_SYSCONFIG_OFFSET 0x0014 36 #define OMAP3430_PRM_SYSCONFIG OMAP34XX_PRM_REGADDR(OCP_MOD, 0x0014) 38 #define OMAP3_PRM_IRQSTATUS_MPU_OFFSET 0x0018 39 #define OMAP3430_PRM_IRQSTATUS_MPU OMAP34XX_PRM_REGADDR(OCP_MOD, 0x0018) 40 #define OMAP3_PRM_IRQENABLE_MPU_OFFSET 0x001c 41 #define OMAP3430_PRM_IRQENABLE_MPU OMAP34XX_PRM_REGADDR(OCP_MOD, 0x001c) 44 #define OMAP3_PRM_VC_SMPS_SA_OFFSET 0x0020 45 #define OMAP3430_PRM_VC_SMPS_SA OMAP34XX_PRM_REGADDR(OMAP3430_GR_MOD, 0x0020) [all …]
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H A D | prm54xx.h | 24 #define OMAP54XX_PRM_BASE 0x4ae06000 31 #define OMAP54XX_PRM_OCP_SOCKET_INST 0x0000 32 #define OMAP54XX_PRM_CKGEN_INST 0x0100 33 #define OMAP54XX_PRM_MPU_INST 0x0300 34 #define OMAP54XX_PRM_DSP_INST 0x0400 35 #define OMAP54XX_PRM_ABE_INST 0x0500 36 #define OMAP54XX_PRM_COREAON_INST 0x0600 37 #define OMAP54XX_PRM_CORE_INST 0x0700 38 #define OMAP54XX_PRM_IVA_INST 0x1200 39 #define OMAP54XX_PRM_CAM_INST 0x1300 [all …]
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H A D | cm2xxx.h | 32 #define OMAP24XX_CM_FCLKEN2 0x0004 33 #define OMAP24XX_CM_ICLKEN4 0x001c 34 #define OMAP24XX_CM_AUTOIDLE4 0x003c 35 #define OMAP24XX_CM_IDLEST4 0x002c 39 #define OMAP24XX_CM_IDLEST_VAL 0
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/linux/arch/arm/boot/dts/nxp/imx/ |
H A D | imx7d-pinfunc.h | 14 #define MX7D_PAD_LPSR_GPIO1_IO00__GPIO1_IO0 0x0000 0x0030 0x0000 0x0 0x0 15 #define MX7D_PAD_LPSR_GPIO1_IO00__PWM4_OUT 0x0000 0x0030 0x0000 0x1 0x0 16 #define MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_ANY 0x0000 0x0030 0x0000 0x2 0x0 17 #define MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG_B 0x0000 0x0030 0x0000 0x3 0x0 18 #define MX7D_PAD_LPSR_GPIO1_IO00__WDOG1_WDOG__RST_B_DEB 0x0000 0x0030 0x0000 0x4 0x0 19 #define MX7D_PAD_LPSR_GPIO1_IO01__GPIO1_IO1 0x0004 0x0034 0x0000 0x0 0x0 20 #define MX7D_PAD_LPSR_GPIO1_IO01__PWM1_OUT 0x0004 0x0034 0x0000 0x1 0x0 21 #define MX7D_PAD_LPSR_GPIO1_IO01__CCM_ENET_REF_CLK3 0x0004 0x0034 0x0000 0x2 0x0 22 #define MX7D_PAD_LPSR_GPIO1_IO01__SAI1_MCLK 0x0004 0x0034 0x0000 0x3 0x0 23 #define MX7D_PAD_LPSR_GPIO1_IO01__ANATOP_24M_OUT 0x0004 0x0034 0x0000 0x4 0x0 [all …]
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H A D | imx7ulp-pinfunc.h | 15 #define IMX7ULP_PAD_PTC0__PTC0 0x0000 0x0000 0x1 0x0 16 #define IMX7ULP_PAD_PTC0__TRACE_D15 0x0000 0x0000 0xa 0x0 17 #define IMX7ULP_PAD_PTC0__LPUART4_CTS_B 0x0000 0x0244 0x4 0x1 18 #define IMX7ULP_PAD_PTC0__LPI2C4_SCL 0x0000 0x0278 0x5 0x1 19 #define IMX7ULP_PAD_PTC0__TPM4_CLKIN 0x0000 0x0298 0x6 0x1 20 #define IMX7ULP_PAD_PTC0__FB_AD0 0x0000 0x0000 0x9 0x0 21 #define IMX7ULP_PAD_PTC1__PTC1 0x0004 0x0000 0x1 0x0 22 #define IMX7ULP_PAD_PTC1__TRACE_D14 0x0004 0x0000 0xa 0x0 23 #define IMX7ULP_PAD_PTC1__LPUART4_RTS_B 0x0004 0x0000 0x4 0x0 24 #define IMX7ULP_PAD_PTC1__LPI2C4_SDA 0x0004 0x027c 0x5 0x1 [all …]
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/linux/arch/arm64/boot/dts/freescale/ |
H A D | imx8ulp-pinfunc.h | 13 #define MX8ULP_PAD_PTD0__PTD0 0x0000 0x0000 0x1 0x0 14 #define MX8ULP_PAD_PTD0__I2S6_RX_BCLK 0x0000 0x0B44 0x7 0x1 15 #define MX8ULP_PAD_PTD0__SDHC0_RESET_B 0x0000 0x0000 0x8 0x0 16 #define MX8ULP_PAD_PTD0__FLEXSPI2_B_DQS 0x0000 0x0974 0x9 0x1 17 #define MX8ULP_PAD_PTD0__CLKOUT2 0x0000 0x0000 0xa 0x0 18 #define MX8ULP_PAD_PTD0__EPDC0_SDCLK_B 0x0000 0x0000 0xb 0x0 19 #define MX8ULP_PAD_PTD0__LP_APD_DBG_MUX_0 0x0000 0x0000 0xc 0x0 20 #define MX8ULP_PAD_PTD0__CLKOUT1 0x0000 0x0000 0xd 0x0 21 #define MX8ULP_PAD_PTD0__DEBUG_MUX0_0 0x0000 0x0000 0xe 0x0 22 #define MX8ULP_PAD_PTD0__DEBUG_MUX1_0 0x0000 0x0000 0xf 0x0 [all …]
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H A D | imx93-pinfunc.h | 13 #define MX93_PAD_DAP_TDI__JTAG_MUX_TDI 0x0000 0x01B0 0x03D8 0x0 0x0 14 #define MX93_PAD_DAP_TDI__MQS2_LEFT 0x0000 0x01B0 0x0000 0x1 0x0 15 #define MX93_PAD_DAP_TDI__CAN2_TX 0x0000 0x01B0 0x0000 0x3 0x0 16 #define MX93_PAD_DAP_TDI__FLEXIO2_FLEXIO30 0x0000 0x01B0 0x0000 0x4 0x0 17 #define MX93_PAD_DAP_TDI__GPIO3_IO28 0x0000 0x01B0 0x0000 0x5 0x0 18 #define MX93_PAD_DAP_TDI__LPUART5_RX 0x0000 0x01B0 0x0430 0x6 0x0 19 #define MX93_PAD_DAP_TMS_SWDIO__JTAG_MUX_TMS 0x0004 0x01B4 0x03DC 0x0 0x0 20 #define MX93_PAD_DAP_TMS_SWDIO__FLEXIO2_FLEXIO31 0x0004 0x01B4 0x0000 0x4 0x0 21 #define MX93_PAD_DAP_TMS_SWDIO__GPIO3_IO29 0x0004 0x01B4 0x0000 0x5 0x0 22 #define MX93_PAD_DAP_TMS_SWDIO__LPUART5_RTS_B 0x0004 0x01B4 0x0000 0x6 0x0 [all …]
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/linux/drivers/gpu/drm/amd/display/dc/dce/ |
H A D | dce_scl_filters.c | 31 // <sharpness> = 0 37 0x1000, 0x0000, 38 0x0FF0, 0x0010, 39 0x0FB0, 0x0050, 40 0x0F34, 0x00CC, 41 0x0E68, 0x0198, 42 0x0D44, 0x02BC, 43 0x0BC4, 0x043C, 44 0x09FC, 0x0604, 45 0x0800, 0x0800 [all …]
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/linux/drivers/gpu/drm/amd/display/dc/spl/ |
H A D | dc_spl_scl_filters.c | 11 // <sharpness> = 0 17 0x1000, 0x0000, 18 0x0FF0, 0x0010, 19 0x0FB0, 0x0050, 20 0x0F34, 0x00CC, 21 0x0E68, 0x0198, 22 0x0D44, 0x02BC, 23 0x0BC4, 0x043C, 24 0x09FC, 0x0604, 25 0x0800, 0x0800 [all …]
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/linux/drivers/gpu/drm/ast/ |
H A D | ast_dram_tables.h | 12 { 0x0108, 0x00000000 }, 13 { 0x0120, 0x00004a21 }, 14 { 0xFF00, 0x00000043 }, 15 { 0x0000, 0xFFFFFFFF }, 16 { 0x0004, 0x00000089 }, 17 { 0x0008, 0x22331353 }, 18 { 0x000C, 0x0d07000b }, 19 { 0x0010, 0x11113333 }, 20 { 0x0020, 0x00110350 }, 21 { 0x0028, 0x1e0828f0 }, [all …]
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/linux/drivers/dma/dw-edma/ |
H A D | dw-edma-v0-regs.h | 15 #define EDMA_V0_VIEWPORT_MASK GENMASK(2, 0) 16 #define EDMA_V0_DONE_INT_MASK GENMASK(7, 0) 18 #define EDMA_V0_WRITE_CH_COUNT_MASK GENMASK(3, 0) 21 #define EDMA_V0_DOORBELL_CH_MASK GENMASK(2, 0) 22 #define EDMA_V0_LINKED_LIST_ERR_MASK GENMASK(7, 0) 25 #define EDMA_V0_CH_EVEN_MSI_DATA_MASK GENMASK(15, 0) 28 u32 ch_control1; /* 0x0000 */ 29 u32 ch_control2; /* 0x0004 */ 30 u32 transfer_size; /* 0x0008 */ 32 u64 reg; /* 0x000c..0x0010 */ [all …]
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/linux/drivers/net/wireless/ath/ath11k/ |
H A D | qmi.h | 16 #define ATH11K_QMI_CALDB_ADDRESS 0x4BA00000 18 #define ATH11K_QMI_WLFW_SERVICE_ID_V01 0x45 19 #define ATH11K_QMI_WLFW_SERVICE_VERS_V01 0x01 20 #define ATH11K_QMI_WLFW_SERVICE_INS_ID_V01 0x02 21 #define ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_QCA6390 0x01 22 #define ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_IPQ8074 0x02 23 #define ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_QCN9074 0x07 24 #define ATH11K_QMI_WLFW_SERVICE_INS_ID_V01_WCN6750 0x03 28 #define ATH11K_QMI_CALDB_SIZE 0x480000 29 #define ATH11K_QMI_BDF_EXT_STR_LENGTH 0x20 [all …]
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/linux/Documentation/devicetree/bindings/pinctrl/ |
H A D | amlogic,meson-pinctrl-a1.yaml | 27 "^bank@[0-9a-f]+$": 58 reg = <0x0400 0x003c>, 59 <0x0480 0x0118>; 63 gpio-ranges = <&periphs_pinctrl 0 0 62>;
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/linux/sound/pci/hda/ |
H A D | ideapad_s740_helper.c | 5 { 0x20, AC_VERB_SET_COEF_INDEX, 0x10 }, 6 { 0x20, AC_VERB_SET_PROC_COEF, 0x0320 }, 7 { 0x20, AC_VERB_SET_COEF_INDEX, 0x24 }, 8 { 0x20, AC_VERB_SET_PROC_COEF, 0x0041 }, 9 { 0x20, AC_VERB_SET_COEF_INDEX, 0x24 }, 10 { 0x20, AC_VERB_SET_PROC_COEF, 0x0041 }, 11 { 0x20, AC_VERB_SET_COEF_INDEX, 0x29 }, 12 { 0x20, AC_VERB_SET_COEF_INDEX, 0x29 }, 13 { 0x20, AC_VERB_SET_COEF_INDEX, 0x26 }, 14 { 0x20, AC_VERB_SET_PROC_COEF, 0x0000 }, [all …]
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/linux/include/linux/mfd/mt6397/ |
H A D | rtc.h | 17 #define RTC_BBPU 0x0000 19 #define RTC_BBPU_KEY (0x43 << 8) 21 #define RTC_WRTGR_MT6358 0x003a 22 #define RTC_WRTGR_MT6397 0x003c 25 #define RTC_IRQ_STA 0x0002 26 #define RTC_IRQ_STA_AL BIT(0) 29 #define RTC_IRQ_EN 0x0004 30 #define RTC_IRQ_EN_AL BIT(0) 35 #define RTC_AL_MASK 0x0008 38 #define RTC_TC_SEC 0x000a [all …]
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/linux/drivers/net/wireless/ath/ath12k/ |
H A D | qmi.h | 16 #define ATH12K_QMI_CALDB_ADDRESS 0x4BA00000 18 #define ATH12K_QMI_WLFW_SERVICE_ID_V01 0x45 19 #define ATH12K_QMI_WLFW_SERVICE_VERS_V01 0x01 20 #define ATH12K_QMI_WLFW_SERVICE_INS_ID_V01 0x02 21 #define ATH12K_QMI_WLFW_SERVICE_INS_ID_V01_WCN7850 0x1 23 #define ATH12K_QMI_WLFW_SERVICE_INS_ID_V01_QCN9274 0x07 27 #define ATH12K_QMI_CALDB_SIZE 0x480000 28 #define ATH12K_QMI_BDF_EXT_STR_LENGTH 0x20 31 #define ATH12K_QMI_DEVMEM_CMEM_INDEX 0 33 #define QMI_WLFW_REQUEST_MEM_IND_V01 0x0035 [all …]
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/linux/drivers/gpu/drm/amd/include/asic_reg/bif/ |
H A D | bif_3_0_d.h | 26 #define ixPB0_DFT_DEBUG_CTRL_REG0 0x1300C 27 #define ixPB0_DFT_JIT_INJ_REG0 0x13000 28 #define ixPB0_DFT_JIT_INJ_REG1 0x13004 29 #define ixPB0_DFT_JIT_INJ_REG2 0x13008 30 #define ixPB0_GLB_CTRL_REG0 0x10004 31 #define ixPB0_GLB_CTRL_REG1 0x10008 32 #define ixPB0_GLB_CTRL_REG2 0x1000C 33 #define ixPB0_GLB_CTRL_REG3 0x10010 34 #define ixPB0_GLB_CTRL_REG4 0x10014 35 #define ixPB0_GLB_CTRL_REG5 0x10018 [all …]
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/linux/drivers/gpu/drm/rockchip/ |
H A D | rockchip_vop_reg.h | 11 #define RK3288_REG_CFG_DONE 0x0000 12 #define RK3288_VERSION_INFO 0x0004 13 #define RK3288_SYS_CTRL 0x0008 14 #define RK3288_SYS_CTRL1 0x000c 15 #define RK3288_DSP_CTRL0 0x0010 16 #define RK3288_DSP_CTRL1 0x0014 17 #define RK3288_DSP_BG 0x0018 18 #define RK3288_MCU_CTRL 0x001c 19 #define RK3288_INTR_CTRL0 0x0020 20 #define RK3288_INTR_CTRL1 0x0024 [all …]
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/linux/sound/soc/bcm/ |
H A D | bcm63xx-i2s.h | 10 #define I2S_MISC_CFG (0x003C) 19 #define I2S_TX_CLOCK_ENABLE (1 << 0) 22 #define I2S_TX_DESC_OFF_LEVEL_MASK (0x0F << I2S_TX_DESC_OFF_LEVEL_SHIFT) 24 #define I2S_TX_DESC_IFF_LEVEL_MASK (0x0F << I2S_TX_DESC_IFF_LEVEL_SHIFT) 28 #define I2S_TX_CFG (0x0000) 29 #define I2S_TX_IRQ_CTL (0x0004) 30 #define I2S_TX_IRQ_EN (0x0008) 31 #define I2S_TX_IRQ_IFF_THLD (0x000c) 32 #define I2S_TX_IRQ_OFF_THLD (0x0010) 33 #define I2S_TX_DESC_IFF_ADDR (0x0014) [all …]
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