| /freebsd/sys/contrib/device-tree/Bindings/pci/ |
| H A D | loongson.yaml | 56 reg = <0x0 0x1a000000 0x0 0x2000000>;
59 ranges = <0x01000000 0x0 0x00004000 0x0 0x00004000 0x0 0x00004000>,
60 <0x02000000 0x0 0x40000000 0x0 0x40000000 0x0 0x40000000>;
|
| /freebsd/contrib/llvm-project/clang/lib/Headers/ |
| H A D | cpuid.h | 3 * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
17 /* Responses identification request with %eax 0 */
19 #define signature_AMD_ebx 0x68747541
20 #define signature_AMD_edx 0x69746e65
21 #define signature_AMD_ecx 0x444d4163
23 #define signature_CENTAUR_ebx 0x746e6543
24 #define signature_CENTAUR_edx 0x48727561
25 #define signature_CENTAUR_ecx 0x736c7561
27 #define signature_CYRIX_ebx 0x69727943
28 #define signature_CYRIX_edx 0x736e4978
[all …]
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| /freebsd/sys/dev/lge/ |
| H A D | if_lgereg.h | 37 #define LGE_MODE1 0x00 /* CSR00 */
38 #define LGE_MODE2 0x04 /* CSR01 */
39 #define LGE_PPTXBUF_IDX 0x08 /* CSR02 */
40 #define LGE_PRODID 0x0C /* CSR03 */
41 #define LGE_PPTXBUF_ADDR_LO 0x10 /* CSR04 */
42 #define LGE_PPTXBUF_ADDR_HI 0x14 /* CSR05 */
43 #define LGE_RSVD0 0x18 /* CSR06 */
44 #define LGE_PPRXBUF_IDX 0x1C /* CSR07 */
45 #define LGE_PPRXBUF_ADDR_LO 0x20 /* CSR08 */
46 #define LGE_PPRXBUF_ADDR_HI 0x24 /* CSR09 */
[all …]
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| /freebsd/sys/dev/dc/ |
| H A D | if_dcreg.h | 39 #define DC_BUSCTL 0x00 /* bus control */
40 #define DC_TXSTART 0x08 /* tx start demand */
41 #define DC_RXSTART 0x10 /* rx start demand */
42 #define DC_RXADDR 0x18 /* rx descriptor list start addr */
43 #define DC_TXADDR 0x20 /* tx descriptor list start addr */
44 #define DC_ISR 0x28 /* interrupt status register */
45 #define DC_NETCFG 0x30 /* network config register */
46 #define DC_IMR 0x38 /* interrupt mask */
47 #define DC_FRAMESDISCARDED 0x40 /* # of discarded frames */
48 #define DC_SIO 0x48 /* MII and ROM/EEPROM access */
[all …]
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| /freebsd/sys/contrib/device-tree/src/arm/ti/omap/ |
| H A D | omap4460.dtsi | 12 cpu0: cpu@0 {
32 reg = <0x4a002260 0x4
33 0x4a00232C 0x4
34 0x4a002378 0x18>;
36 interrupts = <0 126 IRQ_TYPE_LEVEL_HIGH>; /* talert */
39 #thermal-sensor-cells = <0>;
45 reg = <0x4a307bd
[all...] |
| /freebsd/sys/dev/nge/ |
| H A D | if_ngereg.h | 36 #define NGE_CSR 0x00
37 #define NGE_CFG 0x04
38 #define NGE_MEAR 0x08
39 #define NGE_PCITST 0x0C
40 #define NGE_ISR 0x10
41 #define NGE_IMR 0x14
42 #define NGE_IER 0x18
43 #define NGE_IHR 0x1C
44 #define NGE_TX_LISTPTR_LO 0x20
45 #define NGE_TX_LISTPTR_HI 0x24
[all …]
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| /freebsd/sys/dev/rtwn/rtl8192c/ |
| H A D | r92c_rx_desc.h | 26 #define R92C_RXDW0_PKTLEN_M 0x00003fff
27 #define R92C_RXDW0_PKTLEN_S 0
28 #define R92C_RXDW0_CRCERR 0x00004000
29 #define R92C_RXDW0_ICVERR 0x00008000
30 #define R92C_RXDW0_INFOSZ_M 0x000f0000
32 #define R92C_RXDW0_CIPHER_M 0x00700000
34 #define R92C_RXDW0_QOS 0x00800000
35 #define R92C_RXDW0_SHIFT_M 0x03000000
37 #define R92C_RXDW0_PHYST 0x04000000
38 #define R92C_RXDW0_SWDEC 0x08000000
[all …]
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| /freebsd/sys/contrib/ncsw/inc/flib/ |
| H A D | fsl_fman_prs.h | 38 #define FM_PCD_EX_PRS_DOUBLE_ECC 0x02000000
39 #define FM_PCD_EX_PRS_SINGLE_ECC 0x01000000
41 #define FM_PCD_PRS_PPSC_ALL_PORTS 0xffff0000
42 #define FM_PCD_PRS_RPIMAC_EN 0x00000001
43 #define FM_PCD_PRS_PORT_IDLE_STS 0xffff0000
44 #define FM_PCD_PRS_SINGLE_ECC 0x00004000
45 #define FM_PCD_PRS_DOUBLE_ECC 0x00004000
48 #define DEFAULT_MAX_PRS_CYC_LIM 0
|
| /freebsd/contrib/bearssl/src/symcipher/ |
| H A D | des_tab.c | 30 * order (rightmost bit is 0).
36 4, 14, 18, 8, 17, 0, 19
46 24, 7, 13, 0, 21, 17, 1
53 0x00808200, 0x00000000, 0x00008000, 0x00808202,
54 0x00808002, 0x00008202, 0x00000002, 0x00008000,
55 0x00000200, 0x00808200, 0x00808202, 0x00000200,
56 0x00800202, 0x00808002, 0x00800000, 0x00000002,
57 0x00000202, 0x00800200, 0x00800200, 0x00008200,
58 0x00008200, 0x00808000, 0x00808000, 0x00800202,
59 0x00008002, 0x00800002, 0x00800002, 0x00008002,
[all …]
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| /freebsd/sys/dev/alc/ |
| H A D | if_alcreg.h | 36 #define VENDORID_ATHEROS 0x1969
41 #define DEVICEID_ATHEROS_AR8131 0x1063 /* L1C */
42 #define DEVICEID_ATHEROS_AR8132 0x1062 /* L2C */
43 #define DEVICEID_ATHEROS_AR8151 0x1073 /* L1D V1.0 */
44 #define DEVICEID_ATHEROS_AR8151_V2 0x1083 /* L1D V2.0 */
45 #define DEVICEID_ATHEROS_AR8152_B 0x2060 /* L2C V1.1 */
46 #define DEVICEID_ATHEROS_AR8152_B2 0x2062 /* L2C V2.0 */
47 #define DEVICEID_ATHEROS_AR8161 0x1091
48 #define DEVICEID_ATHEROS_AR8162 0x1090
49 #define DEVICEID_ATHEROS_AR8171 0x10A1
[all …]
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| /freebsd/sys/dev/bge/ |
| H A D | if_bgereg.h | 54 * device register space at offset 0x8000 to read any 32K chunk
60 * accessed directly. NIC memory addresses are offset by 0x01000000.
64 #define BGE_PAGE_ZERO 0x00000000
65 #define BGE_PAGE_ZERO_END 0x000000FF
66 #define BGE_SEND_RING_RCB 0x00000100
67 #define BGE_SEND_RING_RCB_END 0x000001FF
68 #define BGE_RX_RETURN_RING_RCB 0x00000200
69 #define BGE_RX_RETURN_RING_RCB_END 0x000002FF
70 #define BGE_STATS_BLOCK 0x00000300
71 #define BGE_STATS_BLOCK_END 0x00000AFF
[all …]
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| /freebsd/sys/dev/jme/ |
| H A D | if_jmereg.h | 36 #define VENDORID_JMICRON 0x197B
41 #define DEVICEID_JMC250 0x0250
42 #define DEVICEREVID_JMC250_A0 0x00
43 #define DEVICEREVID_JMC250_A2 0x11
48 #define DEVICEID_JMC260 0x0260
49 #define DEVICEREVID_JMC260_A0 0x00
51 #define DEVICEID_JMC2XX_MASK 0x0FF0
54 #define JME_PCI_BAR0 0x10 /* 16KB memory window. */
56 #define JME_PCI_BAR1 0x18 /* 128bytes I/O window. */
58 #define JME_PCI_BAR2 0x1C /* 256bytes I/O window. */
[all …]
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| /freebsd/sys/dev/bhnd/cores/pmu/ |
| H A D | bhnd_pmureg.h | 29 (((_value) & _flag) != 0)
43 #define BHND_CLK_CTL_ST 0x1e0 /**< clock control and status */
55 #define BHND_CCS_FORCEALP 0x00000001 /**< force ALP request */
56 #define BHND_CCS_FORCEHT 0x00000002 /**< force HT request */
57 #define BHND_CCS_FORCEILP 0x00000004 /**< force ILP request */
58 #define BHND_CCS_FORCE_MASK 0x0000000F
60 #define BHND_CCS_ALPAREQ 0x00000008 /**< ALP Avail Request */
61 #define BHND_CCS_HTAREQ 0x00000010 /**< HT Avail Request */
62 #define BHND_CCS_AREQ_MASK 0x00000018
64 #define BHND_CCS_FORCEHWREQOFF 0x00000020 /**< Force HW Clock Request Off */
[all …]
|
| /freebsd/sys/dev/my/ |
| H A D | if_myreg.h | 33 #define MY_PAR0 0x0 /* physical address 0-3 */
34 #define MY_PAR1 0x04 /* physical address 4-5 */
35 #define MY_MAR0 0x08 /* multicast address 0-3 */
36 #define MY_MAR1 0x0C /* multicast address 4-7 */
37 #define MY_FAR0 0x10 /* flow-control address 0-3 */
38 #define MY_FAR1 0x14 /* flow-control address 4-5 */
39 #define MY_TCRRCR 0x18 /* receive & transmit configuration */
40 #define MY_BCR 0x1C /* bus command */
41 #define MY_TXPDR 0x20 /* transmit polling demand */
42 #define MY_RXPDR 0x24 /* receive polling demand */
[all …]
|
| /freebsd/sys/dev/ste/ |
| H A D | if_stereg.h | 39 #define ST_VENDORID 0x13F0
40 #define ST_DEVICEID_ST201_1 0x0200
41 #define ST_DEVICEID_ST201_2 0x0201
46 #define DL_VENDORID 0x1186
47 #define DL_DEVICEID_DL10050 0x1002
56 #define STE_DMACTL 0x00
57 #define STE_TX_DMALIST_PTR 0x04
58 #define STE_TX_DMABURST_THRESH 0x08
59 #define STE_TX_DMAURG_THRESH 0x09
60 #define STE_TX_DMAPOLL_PERIOD 0x0A
[all …]
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| /freebsd/sys/contrib/device-tree/src/nios2/ |
| H A D | 3c120_devboard.dts | 18 #size-cells = <0>;
20 cpu: cpu@0 {
23 reg = <0x00000000>;
38 altr,reset-addr = <0xc2800000>;
39 altr,fast-tlb-miss-addr = <0xc7fff400>;
40 altr,exception-addr = <0xd0000020>;
46 memory@0 {
48 reg = <0x10000000 0x08000000>,
49 <0x07fff400 0x00000400>;
52 sopc@0 {
[all …]
|
| /freebsd/sys/dev/sound/pci/ |
| H A D | emuxkireg.h | 50 #define EMU_PTR 0x00
51 #define EMU_PTR_CHNO_MASK 0x0000003f
52 #define EMU_PTR_ADDR_MASK 0x07ff0000
53 #define EMU_A_PTR_ADDR_MASK 0x0fff0000
55 #define EMU_DATA 0x04
57 #define EMU_IPR 0x08
58 #define EMU_IPR_RATETRCHANGE 0x01000000
59 #define EMU_IPR_FXDSP 0x00800000
60 #define EMU_IPR_FORCEINT 0x00400000
61 #define EMU_PCIERROR 0x00200000
[all …]
|
| H A D | cs4281.h | 32 #define CS4281_PCI_ID 0x60051013
39 #define CS4281PCI_HISR 0x000
40 # define CS4281PCI_HISR_DMAI 0x00040000
41 # define CS4281PCI_HISR_DMA(x) (0x0100 << (x))
43 #define CS4281PCI_HICR 0x008
44 # define CS4281PCI_HICR_EOI 0x00000003
46 #define CS4281PCI_HIMR 0x00c
47 # define CS4281PCI_HIMR_DMAI 0x00040000
48 # define CS4281PCI_HIMR_DMA(x) (0x0100 << (x))
50 #define CS4281PCI_IIER 0x010
[all …]
|
| /freebsd/sys/dev/ale/ |
| H A D | if_alereg.h | 36 #define VENDORID_ATHEROS 0x1969
41 #define DEVICEID_ATHEROS_AR81XX 0x1026
43 #define ALE_SPI_CTRL 0x200
44 #define SPI_VPD_ENB 0x00002000
46 #define ALE_SPI_ADDR 0x204 /* 16bits */
48 #define ALE_SPI_DATA 0x208
50 #define ALE_SPI_CONFIG 0x20C
52 #define ALE_SPI_OP_PROGRAM 0x210 /* 8bits */
54 #define ALE_SPI_OP_SC_ERASE 0x211 /* 8bits */
56 #define ALE_SPI_OP_CHIP_ERASE 0x212 /* 8bits */
[all …]
|
| /freebsd/sys/x86/include/ |
| H A D | apicreg.h | 40 * is 0xfee00000.
55 * 0A0 Processor Priority Register R
56 * 0B0 EOI Register W
57 * 0C0 RRR Remote read R
58 * 0D0 Logical Destination R/W
59 * 0E0 Destination Format Register 0..27 R; 28..31 R/W
60 * 0F0 SVR Spurious Interrupt Vector Reg. 0..3 R; 4..9 R/W
93 * 300 ICR_LOW Interrupt Command Reg. (0-31) R/W
195 LAPIC_ID = 0x2,
196 LAPIC_VERSION = 0x3,
[all …]
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| /freebsd/crypto/krb5/src/lib/crypto/builtin/des/ |
| H A D | f_tables.c | 65 * ((left & 0x55555555) << 1) | (right & 0x55555555) for left half
66 * (left & 0xaaaaaaaa) | ((right & 0xaaaaaaaa) >> 1) for right half
76 0x00000000, 0x00000010, 0x00000001, 0x00000011,
77 0x00001000, 0x00001010, 0x00001001, 0x00001011,
78 0x00000100, 0x00000110, 0x00000101, 0x00000111,
79 0x00001100, 0x00001110, 0x00001101, 0x00001111,
80 0x00100000, 0x00100010, 0x00100001, 0x00100011,
81 0x00101000, 0x00101010, 0x00101001, 0x00101011,
82 0x00100100, 0x00100110, 0x00100101, 0x00100111,
83 0x00101100, 0x00101110, 0x00101101, 0x00101111,
[all …]
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| /freebsd/contrib/openbsm/etc/ |
| H A D | audit_class | 1 0x00000000:no:invalid class
2 0x00000001:fr:file read
3 0x00000002:fw:file write
4 0x00000004:fa:file attribute access
5 0x00000008:fm:file attribute modify
6 0x00000010:fc:file create
7 0x00000020:fd:file delete
8 0x00000040:cl:file close
9 0x00000080:pc:process
10 0x0000010
[all...] |
| /freebsd/sys/contrib/device-tree/src/arm/nvidia/ |
| H A D | tegra124-nyan-big-emc.dtsi | 263 0x40040001 /* MC_EMEM_ARB_CFG */
264 0x8000000a /* MC_EMEM_ARB_OUTSTANDING_REQ */
265 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
266 0x00000001 /* MC_EMEM_ARB_TIMING_RP */
267 0x00000002 /* MC_EMEM_ARB_TIMING_RC */
268 0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
269 0x00000002 /* MC_EMEM_ARB_TIMING_FAW */
270 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
271 0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */
272 0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
[all …]
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| /freebsd/sys/sys/ |
| H A D | ioctl_compat.h | 73 #define OTIOCGETD _IOR('t', 0, int) /* get line discipline */
81 #define TANDEM 0x00000001 /* send stopc on out q full */
82 #define CBREAK 0x00000002 /* half-cooked mode */
83 #define LCASE 0x00000004 /* simulate lower case */
84 #define ECHO 0x00000008 /* echo input */
85 #define CRMOD 0x00000010 /* map \r to \r\n on output */
86 #define RAW 0x00000020 /* no i/o processing */
87 #define ODDP 0x00000040 /* get/send odd parity */
88 #define EVENP 0x00000080 /* get/send even parity */
89 #define ANYP 0x000000c0 /* get any parity/send none */
[all …]
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| /freebsd/sys/contrib/device-tree/src/powerpc/fsl/ |
| H A D | bsc9131rdb.dts | 20 ranges = <0x0 0x0 0x0 0xff800000 0x00004000>;
21 reg = <0x0 0xff71e000 0x0 0x2000>;
25 ranges = <0x0 0x0 0xff700000 0x100000>;
|