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/linux/tools/testing/selftests/powerpc/pmu/event_code_tests/
H A Devent_alternatives_tests_p10.c10 #define PM_RUN_CYC_ALT 0x200f4
11 #define PM_INST_DISP 0x200f2
12 #define PM_BR_2PATH 0x20036
13 #define PM_LD_MISS_L1 0x3e054
14 #define PM_RUN_INST_CMPL_ALT 0x400fa
16 #define EventCode_1 0x100fc
17 #define EventCode_2 0x200fa
18 #define EventCode_3 0x300fc
19 #define EventCode_4 0x400fc
45 * Test for event alternative for 0x0001 in event_alternatives_tests_p10()
[all...]
/linux/arch/parisc/include/uapi/asm/
H A Dtermbits.h42 #define VINTR 0
61 #define IUCLC 0x0200
62 #define IXON 0x0400
63 #define IXOFF 0x1000
64 #define IMAXBEL 0x4000
65 #define IUTF8 0x8000
68 #define OLCUC 0x00002
69 #define ONLCR 0x00004
70 #define NLDLY 0x00100
71 #define NL0 0x00000
[all …]
/linux/include/uapi/asm-generic/
H A Dtermbits.h42 #define VINTR 0
61 #define IUCLC 0x0200
62 #define IXON 0x0400
63 #define IXOFF 0x1000
64 #define IMAXBEL 0x2000
65 #define IUTF8 0x4000
68 #define OLCUC 0x00002
69 #define ONLCR 0x00004
70 #define NLDLY 0x00100
71 #define NL0 0x00000
[all …]
/linux/Documentation/devicetree/bindings/perf/
H A Driscv,pmu.yaml78 value of variant must be 0xffffffff_ffffffff.
104 riscv,event-to-mhpmevent = <0x0000B 0x0000 0x0001>;
105 riscv,event-to-mhpmcounters = <0x00001 0x00001 0x00000001>,
106 <0x00002 0x00002 0x00000004>,
107 <0x00003 0x0000A 0x00000ff8>,
108 <0x10000 0x10033 0x000ff000>;
110 /* For event ID 0x0002 */
111 <0x0000 0x0002 0xffffffff 0xffffffff 0x00000f8>,
112 /* For event ID 0-4 */
113 <0x0 0x0 0xffffffff 0xfffffff0 0x00000ff0>,
[all …]
/linux/arch/mips/include/uapi/asm/
H A Dtermbits.h55 #define VINTR 0 /* Interrupt character [ISIG] */
67 #if 0
81 #define IUCLC 0x0200 /* Map upper case to lower case on input */
82 #define IXON 0x0400 /* Enable start/stop output control */
83 #define IXOFF 0x1000 /* Enable start/stop input control */
84 #define IMAXBEL 0x2000 /* Ring bell when input queue is full */
85 #define IUTF8 0x4000 /* Input is UTF-8 */
88 #define OLCUC 0x00002 /* Map lower case to upper case on output */
89 #define ONLCR 0x00004 /* Map NL to CR-NL on output */
90 #define NLDLY 0x00100
[all …]
/linux/arch/powerpc/include/asm/nohash/32/
H A Dpte-85xx.h12 RPN...................... 0 0 U0 U1 U2 U3 UX SX UW SW UR SR
20 #define _PAGE_READ 0x00001 /* H: Read permission (SR) */
21 #define _PAGE_PRESENT 0x00002 /* S: PTE contains a translation */
22 #define _PAGE_WRITE 0x00004 /* S: Write permission (SW) */
23 #define _PAGE_DIRTY 0x00008 /* S: Page dirty */
24 #define _PAGE_EXEC 0x00010 /* H: SX permission */
25 #define _PAGE_ACCESSED 0x00020 /* S: Page referenced */
27 #define _PAGE_ENDIAN 0x00040 /* H: E bit */
28 #define _PAGE_GUARDED 0x00080 /* H: G bit */
29 #define _PAGE_COHERENT 0x00100 /* H: M bit */
[all …]
/linux/drivers/gpu/drm/nouveau/nvkm/engine/disp/
H A Ddp.h12 #define DPCD_RC00_DPCD_REV 0x00000
13 #define DPCD_RC01_MAX_LINK_RATE 0x00001
14 #define DPCD_RC02 0x00002
15 #define DPCD_RC02_ENHANCED_FRAME_CAP 0x80
16 #define DPCD_RC02_TPS3_SUPPORTED 0x40
17 #define DPCD_RC02_MAX_LANE_COUNT 0x1f
18 #define DPCD_RC03 0x00003
19 #define DPCD_RC03_TPS4_SUPPORTED 0x80
20 #define DPCD_RC03_MAX_DOWNSPREAD 0x01
21 #define DPCD_RC0E 0x0000e
[all …]
/linux/arch/powerpc/perf/
H A Dpower10-events-list.h12 EVENT(PM_CYC, 0x600f4);
13 EVENT(PM_DISP_STALL_CYC, 0x100f8);
14 EVENT(PM_EXEC_STALL, 0x30008);
15 EVENT(PM_INST_CMPL, 0x500fa);
16 EVENT(PM_BR_CMPL, 0x4d05e);
17 EVENT(PM_BR_MPRED_CMPL, 0x400f6);
18 EVENT(PM_BR_FIN, 0x2f04a);
19 EVENT(PM_MPRED_BR_FIN, 0x3e098);
20 EVENT(PM_LD_DEMAND_MISS_L1_FIN, 0x400f0);
23 EVENT(PM_LD_REF_L1, 0x100fc);
[all …]
H A Dpower8-events-list.h11 EVENT(PM_CYC, 0x0001e)
12 EVENT(PM_GCT_NOSLOT_CYC, 0x100f8)
13 EVENT(PM_CMPLU_STALL, 0x4000a)
14 EVENT(PM_INST_CMPL, 0x00002)
15 EVENT(PM_BRU_FIN, 0x10068)
16 EVENT(PM_BR_MPRED_CMPL, 0x400f6)
19 EVENT(PM_LD_REF_L1, 0x100ee)
21 EVENT(PM_LD_MISS_L1, 0x3e054)
23 EVENT(PM_ST_MISS_L1, 0x300f0)
25 EVENT(PM_L1_PREF, 0x0d8b8)
[all …]
H A Dpower9-events-list.h11 EVENT(PM_CYC, 0x0001e)
12 EVENT(PM_ICT_NOSLOT_CYC, 0x100f8)
13 EVENT(PM_CMPLU_STALL, 0x1e054)
14 EVENT(PM_INST_CMPL, 0x00002)
15 EVENT(PM_BR_CMPL, 0x4d05e)
16 EVENT(PM_BR_MPRED_CMPL, 0x400f6)
19 EVENT(PM_LD_REF_L1, 0x100fc)
21 EVENT(PM_LD_MISS_L1_FIN, 0x2c04e)
22 EVENT(PM_LD_MISS_L1, 0x3e054)
24 EVENT(PM_LD_MISS_L1_ALT, 0x400f0)
[all …]
H A Dpower7-events-list.h8 EVENT(PM_IC_DEMAND_L2_BR_ALL, 0x04898)
9 EVENT(PM_GCT_UTIL_7_TO_10_SLOTS, 0x020a0)
10 EVENT(PM_PMC2_SAVED, 0x10022)
11 EVENT(PM_CMPLU_STALL_DFU, 0x2003c)
12 EVENT(PM_VSU0_16FLOP, 0x0a0a4)
13 EVENT(PM_MRK_LSU_DERAT_MISS, 0x3d05a)
14 EVENT(PM_MRK_ST_CMPL, 0x10034)
15 EVENT(PM_NEST_PAIR3_ADD, 0x40881)
16 EVENT(PM_L2_ST_DISP, 0x46180)
17 EVENT(PM_L2_CASTOUT_MOD, 0x16180)
[all …]
/linux/arch/powerpc/include/uapi/asm/
H A Dtermbits.h48 #define VINTR 0
67 #define IXON 0x0200
68 #define IXOFF 0x0400
69 #define IUCLC 0x1000
70 #define IMAXBEL 0x2000
71 #define IUTF8 0x4000
74 #define ONLCR 0x00002
75 #define OLCUC 0x00004
76 #define NLDLY 0x00300
77 #define NL0 0x00000
[all …]
/linux/Documentation/userspace-api/media/v4l/
H A Dvidioc-g-audio.rst57 :header-rows: 0
58 :stub-columns: 0
87 :header-rows: 0
88 :stub-columns: 0
92 - 0x00001
98 - 0x00002
107 :header-rows: 0
108 :stub-columns: 0
112 - 0x00001
118 On success 0 is returned, on error -1 and the ``errno`` variable is set
/linux/arch/alpha/include/uapi/asm/
H A Dtermbits.h54 #define VEOF 0
73 #define IXON 0x0200
74 #define IXOFF 0x0400
75 #define IUCLC 0x1000
76 #define IMAXBEL 0x2000
77 #define IUTF8 0x4000
80 #define ONLCR 0x00002
81 #define OLCUC 0x00004
82 #define NLDLY 0x00300
83 #define NL0 0x00000
[all …]
/linux/arch/x86/include/asm/
H A Dapicdef.h14 #define IO_APIC_DEFAULT_PHYS_BASE 0xfec00000
15 #define APIC_DEFAULT_PHYS_BASE 0xfee00000
23 #define APIC_DELIVERY_MODE_FIXED 0
30 #define APIC_ID 0x20
32 #define APIC_LVR 0x30
33 #define APIC_LVR_MASK 0xFF00FF
35 #define GET_APIC_VERSION(x) ((x) & 0xFFu)
36 #define GET_APIC_MAXLVT(x) (((x) >> 16) & 0xFFu)
38 # define APIC_INTEGRATED(x) ((x) & 0xF0u)
42 #define APIC_XAPIC(x) ((x) >= 0x14)
[all …]
/linux/Documentation/admin-guide/perf/
H A Dhns3-pmu.rst44 config=0x00204
46 config=0x10204
51 The bits 0~15 of config (here 0x0204) are the true hardware event code. If
52 two events have same value of bits 0~15 of config, that means they are
53 event pair. And the bit 16 of config indicates getting counter 0 or
59 counter 0 / counter 1
75 …$# perf stat -g -e hns3_pmu_sicl_0/config=0x00002,global=1/ -e hns3_pmu_sicl_0/config=0x10002,glob…
86 $# perf stat -a -e hns3_pmu_sicl_0/config=0x1020F,global=1/ -I 1000
90 is same as mac id. The "tc" filter option must be set to 0xF in this mode,
95 $# perf stat -a -e hns3_pmu_sicl_0/config=0x1020F,port=0,tc=0xF/ -I 1000
[all …]
/linux/include/linux/perf/
H A Darm_pmu.h31 #define ARMPMU_EVT_64BIT 0x00001 /* Event uses a 64bit counter */
32 #define ARMPMU_EVT_47BIT 0x00002 /* Event uses a 47bit counter */
33 #define ARMPMU_EVT_63BIT 0x00004 /* Event uses a 63bit counter */
39 #define HW_OP_UNSUPPORTED 0xFFFF
41 #define CACHE_OP_UNSUPPORTED 0xFFFF
44 [0 ... PERF_COUNT_HW_MAX - 1] = HW_OP_UNSUPPORTED
47 [0 ... C(MAX) - 1] = { \
48 [0 ... C(OP_MAX) - 1] = { \
49 [0 ... C(RESULT_MAX) - 1] = CACHE_OP_UNSUPPORTED, \
62 * an event. A 0 means that the counter can be used.
[all …]
/linux/drivers/scsi/megaraid/
H A Dmegaraid_ioctl.h25 #define CL_ANN 0 /* print unconditionally, announcements */
46 #define MEGAIOCCMD _IOWR(MEGAIOC_MAGIC, 0, mimd_t)
52 #define USCSICMD 0x80
53 #define UIOC_RD 0x00001
54 #define UIOC_WR 0x00002
56 #define MBOX_CMD 0x00000
57 #define GET_DRIVER_VER 0x10000
58 #define GET_N_ADAP 0x20000
59 #define GET_ADAP_INFO 0x30000
60 #define GET_CAP 0x40000
[all …]
/linux/drivers/usb/gadget/udc/
H A Dgoku_udc.h12 * PCI BAR 0 points to these registers.
16 u32 int_status; /* 0x000 */
18 #define INT_SUSPEND 0x00001 /* or resume */
19 #define INT_USBRESET 0x00002
20 #define INT_ENDPOINT0 0x00004
21 #define INT_SETUP 0x00008
22 #define INT_STATUS 0x00010
23 #define INT_STATUSNAK 0x00020
24 #define INT_EPxDATASET(n) (0x00020 << (n)) /* 0 < n < 4 */
25 # define INT_EP1DATASET 0x00040
[all …]
/linux/drivers/scsi/ibmvscsi_tgt/
H A Dibmvscsi_tgt.h27 #define MSG_HI 0
36 #define SRP_VIOLATION 0x102 /* general error code */
55 #define LOCAL 0
70 #define ADAPT_SUCCESS 0L
139 SCSI_CDB = 0x01,
140 TASK_MANAGEMENT = 0x02,
141 /* MAD or addressed to port 0 */
142 ADAPTER_MAD = 0x04,
143 UNSET_TYPE = 0x08,
166 #define CMD_FAST_FAIL BIT(0)
[all …]
/linux/include/uapi/linux/
H A Dmedia.h48 #define MEDIA_ENT_F_BASE 0x00000000
49 #define MEDIA_ENT_F_OLD_BASE 0x00010000
50 #define MEDIA_ENT_F_OLD_SUBDEV_BASE 0x00020000
68 #define MEDIA_ENT_F_DTV_DEMOD (MEDIA_ENT_F_BASE + 0x00001)
69 #define MEDIA_ENT_F_TS_DEMUX (MEDIA_ENT_F_BASE + 0x00002)
70 #define MEDIA_ENT_F_DTV_CA (MEDIA_ENT_F_BASE + 0x00003)
71 #define MEDIA_ENT_F_DTV_NET_DECAP (MEDIA_ENT_F_BASE + 0x00004)
77 #define MEDIA_ENT_F_IO_DTV (MEDIA_ENT_F_BASE + 0x01001)
78 #define MEDIA_ENT_F_IO_VBI (MEDIA_ENT_F_BASE + 0x01002)
79 #define MEDIA_ENT_F_IO_SWRADIO (MEDIA_ENT_F_BASE + 0x01003)
[all …]
/linux/drivers/scsi/aic7xxx/
H A Daic79xx.h60 #define FALSE 0
63 #define ALL_CHANNELS '\0'
64 #define ALL_TARGETS_MASK 0xFFFF
65 #define INITIATOR_WILDCARD (~0)
66 #define SCB_LIST_NULL 0xFF00
68 #define QOUTFIFO_ENTRY_VALID 0x80
69 #define SCBID_IS_NULL(scbid) (((scbid) & 0xFF00 ) == SCB_LIST_NULL)
76 #define SCB_IS_SCSIBUS_B(ahd, scb) (0)
88 (0x01 << (SCB_GET_TARGET_OFFSET(ahd, scb)))
91 ((ahd_debug & AHD_SHOW_MASKED_ERRORS) == 0 \
[all …]
/linux/drivers/gpu/drm/msm/adreno/
H A Dadreno_gen7_2_0_snapshot.h99 {A7XX_TP0_TMO_DATA, 0x200, 6, 2, A7XX_PIPE_BR, A7XX_USPTP},
100 {A7XX_TP0_SMO_DATA, 0x80, 6, 2, A7XX_PIPE_BR, A7XX_USPTP},
101 {A7XX_TP0_MIPMAP_BASE_DATA, 0x3c0, 6, 2, A7XX_PIPE_BR, A7XX_USPTP},
102 {A7XX_SP_INST_DATA, 0x800, 6, 2, A7XX_PIPE_BR, A7XX_USPTP},
103 {A7XX_SP_INST_DATA_1, 0x800, 6, 2, A7XX_PIPE_BR, A7XX_USPTP},
104 {A7XX_SP_LB_0_DATA, 0x800, 6, 2, A7XX_PIPE_BR, A7XX_USPTP},
105 {A7XX_SP_LB_1_DATA, 0x800, 6, 2, A7XX_PIPE_BR, A7XX_USPTP},
106 {A7XX_SP_LB_2_DATA, 0x800, 6, 2, A7XX_PIPE_BR, A7XX_USPTP},
107 {A7XX_SP_LB_3_DATA, 0x800, 6, 2, A7XX_PIPE_BR, A7XX_USPTP},
108 {A7XX_SP_LB_4_DATA, 0x800, 6, 2, A7XX_PIPE_BR, A7XX_USPTP},
[all …]
/linux/drivers/net/wireless/realtek/rtl8xxxu/
H A D8192f.c18 {0x420, 0x00}, {0x422, 0x78}, {0x428, 0x0a}, {0x429, 0x10},
19 {0x430, 0x00}, {0x431, 0x00}, {0x432, 0x00}, {0x433, 0x01},
20 {0x434, 0x04}, {0x435, 0x05}, {0x436, 0x07}, {0x437, 0x08},
21 {0x43c, 0x04}, {0x43d, 0x05}, {0x43e, 0x07}, {0x43f, 0x08},
22 {0x440, 0x5d}, {0x441, 0x01}, {0x442, 0x00}, {0x444, 0x10},
23 {0x445, 0xf0}, {0x446, 0x0e}, {0x447, 0x1f}, {0x448, 0x00},
24 {0x449, 0x00}, {0x44a, 0x00}, {0x44b, 0x00}, {0x44c, 0x10},
25 {0x44d, 0xf0}, {0x44e, 0x0e}, {0x44f, 0x00}, {0x450, 0x00},
26 {0x451, 0x00}, {0x452, 0x00}, {0x453, 0x00}, {0x480, 0x20},
27 {0x49c, 0x30}, {0x49d, 0xf0}, {0x49e, 0x03}, {0x49f, 0x3e},
[all …]
/linux/drivers/net/ethernet/dec/tulip/
H A Dtulip.h36 #define TULIP_BAR 0 /* CBIO */
52 HAS_MII = 0x00001,
53 HAS_MEDIA_TABLE = 0x00002,
54 CSR12_IN_SROM = 0x00004,
55 ALWAYS_CHECK_MII = 0x00008,
56 HAS_ACPI = 0x00010,
57 MC_HASH_ONLY = 0x00020, /* Hash-only multicast filter. */
58 HAS_PNICNWAY = 0x00080,
59 HAS_NWAY = 0x00040, /* Uses internal NWay xcvr. */
60 HAS_INTR_MITIGATION = 0x00100,
[all …]

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