Searched +full:0 +full:x00001414 (Results 1 – 7 of 7) sorted by relevance
/freebsd/sys/contrib/device-tree/Bindings/memory-controllers/ |
H A D | nvidia,tegra20-emc.yaml | 38 const: 0 41 const: 0 145 "^emc-table@[0-9]+$": 165 const: 0 172 "^emc-table@[0-9]+$": 199 reg = <0x7000f400 0x400>; 200 interrupts = <0 78 4>; 207 #interconnect-cells = <0>; 209 #size-cells = <0>; 213 emc-tables@0 { [all …]
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/freebsd/sys/contrib/device-tree/src/arm/nvidia/ |
H A D | tegra20-paz00.dts | 28 memory@0 { 29 reg = <0x00000000 0x20000000>; 55 pinctrl-0 = <&state_default>; 303 reg = <0x1e>; 335 reg = <0x34>; 471 reg = <0x4c>; 484 nvidia,cpu-pwr-off-time = <0>; 486 nvidia,core-pwr-off-time = <0>; 494 emc-tables@0 { [all...] |
/freebsd/sys/dev/bce/ |
H A D | if_bcereg.h | 82 /* MII Control Register 0x0 */ 102 /* MII Status Register 0x1 */ 122 /* MII Autoneg Advertisement Register 0x4 */ 142 /* MII Autoneg Link Partner Ability Register 0x5 */ 162 /* 1000Base-T Control Register 0x09 */ 182 /* MII 1000Base-T Status Register 0x0a */ 194 /* MII Extended Status Register 0x0f */ 214 /* MII Autoneg Link Partner Ability Register 0x19 */ 245 #define BCE_CP_LOAD 0x00000001 246 #define BCE_CP_SEND 0x00000002 [all …]
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/freebsd/tools/test/iconv/ref/ |
H A D | UTF-32LE-rev | 1 0x00 = 0x00000000 2 0x01 = 0x00000001 3 0x02 = 0x00000002 4 0x03 = 0x00000003 5 0x04 = 0x00000004 6 0x05 = 0x00000005 7 0x06 = 0x00000006 8 0x07 = 0x00000007 9 0x08 = 0x00000008 10 0x09 = 0x00000009 [all …]
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H A D | UTF-16BE | 1 0x0100 = 0x00000001 2 0x0101 = 0x00000101 3 0x0102 = 0x00000201 4 0x0103 = 0x00000301 5 0x0104 = 0x00000401 6 0x0105 = 0x00000501 7 0x0106 = 0x00000601 8 0x0107 = 0x00000701 9 0x0108 = 0x00000801 10 0x0109 = 0x00000901 [all …]
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H A D | UTF-16LE | 1 0x0100 = 0x00000100 2 0x0101 = 0x00000101 3 0x0102 = 0x00000102 4 0x0103 = 0x00000103 5 0x0104 = 0x00000104 6 0x0105 = 0x00000105 7 0x0106 = 0x00000106 8 0x0107 = 0x00000107 9 0x0108 = 0x00000108 10 0x0109 = 0x00000109 [all …]
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/freebsd/sys/dev/qlnx/qlnxe/ |
H A D | ecore_init_values.h | 35 0x00030003, 0xffff0000, /* if phase != 'engine', skip 3 ops (no DMAE) */ 36 0x00020002, 0x00020000, /* if mode != '!asic', skip 2 ops */ 37 0x0280c201, 0x00000000, /* write 0x0 to address 0x50184 */ 38 0x02810201, 0x00000000, /* write 0x0 to address 0x50204 */ 40 0x00110003, 0xffff0000, /* if phase != 'engine', skip 17 ops (no DMAE) */ 41 0x00030002, 0x00020000, /* if mode != '!asic', skip 3 ops */ 42 0x0048c201, 0x00000000, /* write 0x0 to address 0x9184 */ 43 0x0048d201, 0x00000000, /* write 0x0 to address 0x91a4 */ 44 0x004ba601, 0x00000001, /* write 0x1 to address 0x974c */ 45 0x00020002, 0x00be0000, /* if mode != '(!asic)&bb', skip 2 ops */ [all …]
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