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/linux/arch/arm/boot/dts/nvidia/
H A Dtegra20-acer-a500-picasso.dts37 memory@0 {
38 reg = <0x00000000 0x40000000>;
48 reg = <0x2ffe0000 0x10000>; /* 64kB */
49 console-size = <0x8000>; /* 32kB */
50 record-size = <0x400>; /* 1kB */
56 alloc-ranges = <0x30000000 0x10000000>;
57 size = <0x10000000>; /* 256MiB */
92 pinctrl-0 = <&state_default>;
425 shutdown-gpios = <&gpio TEGRA_GPIO(U, 0) GPIO_ACTIVE_HIGH>;
443 reg = <0x1a>;
[all …]
H A Dtegra30-asus-tf201.dts67 reg = <0x4d>;
82 mount-matrix = "-1", "0", "0",
83 "0", "-1", "0",
84 "0", "0", "-1";
88 mount-matrix = "0", "-1", "0",
89 "-1", "0", "0",
90 "0", "0", "-1";
95 mount-matrix = "1", "0", "0",
96 "0", "-1", "0",
97 "0", "0", "1";
[all …]
H A Dtegra124-nyan-blaze-emc.dtsi92 0x40040001
93 0x8000000a
94 0x00000001
95 0x00000001
96 0x00000002
97 0x00000000
98 0x00000002
99 0x00000001
100 0x00000002
101 0x00000008
[all …]
H A Dtegra124-jetson-tk1-emc.dtsi104 0x40040001
105 0x8000000a
106 0x00000001
107 0x00000001
108 0x00000002
109 0x00000000
110 0x00000002
111 0x00000001
112 0x00000003
113 0x00000008
[all …]
H A Dtegra124-apalis-emc.dtsi108 0x40040001 0x8000000a
109 0x00000001 0x00000001
110 0x00000002 0x00000000
111 0x00000002 0x00000001
112 0x00000003 0x00000008
113 0x00000003 0x00000002
114 0x00000003 0x00000006
115 0x06030203 0x000a0502
116 0x77e30303 0x70000f03
117 0x001f0000
[all …]
H A Dtegra30-asus-tf300t.dts75 reg = <0x10>;
94 mount-matrix = "0", "-1", "0",
95 "-1", "0", "0",
96 "0", "0", "-1";
100 mount-matrix = "-1", "0", "0",
101 "0", "1", "0",
102 "0", "0", "-1";
107 mount-matrix = "0", "-1", "0",
108 "-1", "0", "0",
109 "0", "0", "1";
[all …]
H A Dtegra30-asus-tf300tg.dts22 <TEGRA_GPIO(X, 0) GPIO_ACTIVE_HIGH>,
171 reg = <0x10>;
190 mount-matrix = "1", "0", "0",
191 "0", "-1", "0",
192 "0", "0", "-1";
196 mount-matrix = "-1", "0", "0",
197 "0", "1", "0",
198 "0", "0", "-1";
203 mount-matrix = "0", "-1", "0",
204 "-1", "0", "0",
[all …]
H A Dtegra30-lg-p895.dts12 pinctrl-0 = <&state_default>;
123 nvidia,emem-configuration = < 0x00020001 0xc0000010
124 0x00000001 0x00000001 0x00000002 0x00000000
125 0x00000003 0x00000001 0x00000002 0x00000004
126 0x00000001 0x00000000 0x00000002 0x00000002
127 0x02020001 0x00060402 0x77230303 0x001f0000 >;
133 nvidia,emem-configuration = < 0x00030003 0xc0000010
134 0x00000001 0x00000001 0x00000002 0x00000000
135 0x00000003 0x00000001 0x00000002 0x00000004
136 0x00000001 0x00000000 0x00000002 0x00000002
[all …]
H A Dtegra30-asus-tf300tl.dts191 reg = <0x10>;
210 mount-matrix = "-1", "0", "0",
211 "0", "-1", "0",
212 "0", "0", "1";
216 mount-matrix = "-1", "0", "0",
217 "0", "1", "0",
218 "0", "0", "-1";
223 mount-matrix = "0", "-1", "0",
224 "-1", "0", "0",
225 "0", "0", "1";
[all …]
H A Dtegra30-pegatron-chagall.dts49 reg = <0x80000000 0x40000000>;
59 alloc-ranges = <0x80000000 0x30000000>;
60 size = <0x10000000>; /* 256MiB */
67 reg = <0xbeb00000 0x10000>; /* 64kB */
68 console-size = <0x8000>; /* 32kB */
69 record-size = <0x400>; /* 1kB */
74 reg = <0xbfe00000 0x200000>; /* 2MB */
100 pinctrl-0 = <&state_default>;
144 nvidia,lock = <0>;
145 nvidia,io-reset = <0>;
[all …]
H A Dtegra20-colibri.dtsi11 memory@0 {
17 reg = <0x00000000 0x10000000>;
57 pinctrl-0 = <&state_default>;
449 <&gpio TEGRA_GPIO(V, 0) GPIO_ACTIVE_LOW>;
451 <&gpio TEGRA_GPIO(P, 0) GPIO_ACTIVE_HIGH>;
469 nand@0 {
470 reg = <0>;
478 wp-gpios = <&gpio TEGRA_GPIO(S, 0) GPIO_ACTIVE_LOW>;
506 reg = <0x34>;
535 regulator-name = "VDD_CPU_1.0V";
[all …]
H A Dtegra30-asus-tf700t.dts92 reg = <0x10>;
111 mount-matrix = "1", "0", "0",
112 "0", "-1", "0",
113 "0", "0", "-1";
117 mount-matrix = "0", "1", "0",
118 "1", "0", "0",
119 "0", "0", "-1";
124 mount-matrix = "0", "-1", "0",
125 "-1", "0", "0",
126 "0", "0", "1";
[all …]
H A Dtegra124-nyan-big-emc.dtsi263 0x40040001 /* MC_EMEM_ARB_CFG */
264 0x8000000a /* MC_EMEM_ARB_OUTSTANDING_REQ */
265 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
266 0x00000001 /* MC_EMEM_ARB_TIMING_RP */
267 0x00000002 /* MC_EMEM_ARB_TIMING_RC */
268 0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
269 0x00000002 /* MC_EMEM_ARB_TIMING_FAW */
270 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
271 0x00000002 /* MC_EMEM_ARB_TIMING_RAP2PRE */
272 0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
[all …]
H A Dtegra20-paz00.dts28 memory@0 {
29 reg = <0x00000000 0x20000000>;
55 pinctrl-0 = <&state_default>;
303 reg = <0x1e>;
335 reg = <0x34>;
471 reg = <0x4c>;
484 nvidia,cpu-pwr-off-time = <0>;
486 nvidia,core-pwr-off-time = <0>;
494 emc-tables@0 {
495 nvidia,ram-code = <0x0>;
[all …]
H A Dtegra30-asus-nexus7-grouper-memory-timings.dtsi5 emc-timings-0 {
6 nvidia,ram-code = <0>; /* Elpida EDJ2108EDBG-DJL-F */
12 0x00020001 /* MC_EMEM_ARB_CFG */
13 0xc0000020 /* MC_EMEM_ARB_OUTSTANDING_REQ */
14 0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
15 0x00000001 /* MC_EMEM_ARB_TIMING_RP */
16 0x00000002 /* MC_EMEM_ARB_TIMING_RC */
17 0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
18 0x00000001 /* MC_EMEM_ARB_TIMING_FAW */
19 0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
[all …]
/linux/drivers/gpu/drm/amd/include/asic_reg/bif/
H A Dbif_3_0_sh_mask.h26 #define BACO_CNTL__BACO_ANA_ISO_DIS_MASK 0x00000080L
27 #define BACO_CNTL__BACO_ANA_ISO_DIS__SHIFT 0x00000007
28 #define BACO_CNTL__BACO_BCLK_OFF_MASK 0x00000002L
29 #define BACO_CNTL__BACO_BCLK_OFF__SHIFT 0x00000001
30 #define BACO_CNTL__BACO_EN_MASK 0x00000001L
31 #define BACO_CNTL__BACO_EN__SHIFT 0x00000000
32 #define BACO_CNTL__BACO_HANG_PROTECTION_EN_MASK 0x00000020L
33 #define BACO_CNTL__BACO_HANG_PROTECTION_EN__SHIFT 0x00000005
34 #define BACO_CNTL__BACO_ISO_DIS_MASK 0x00000004L
35 #define BACO_CNTL__BACO_ISO_DIS__SHIFT 0x00000002
[all …]
/linux/drivers/gpu/drm/amd/include/
H A Dvega10_enum.h51 GDS_PERF_SEL_DS_ADDR_CONFL = 0,
184 NO_FORCE_REQUEST = 0x00000000,
185 FORCE_LIGHT_SLEEP_REQUEST = 0x00000001,
186 FORCE_DEEP_SLEEP_REQUEST = 0x00000002,
187 FORCE_SHUT_DOWN_REQUEST = 0x00000003,
195 NO_FORCE_REQ = 0x00000000,
196 FORCE_LIGHT_SLEEP_REQ = 0x00000001,
204 ENABLE_MEM_PWR_CTRL = 0x00000000,
205 DISABLE_MEM_PWR_CTRL = 0x00000001,
213 DYNAMIC_SHUT_DOWN_ENABLE = 0x00000000,
[all …]
H A Dsoc24_enum.h52 CP_PERFMON_ENABLE_MODE_ALWAYS_COUNT = 0x00000000,
53 CP_PERFMON_ENABLE_MODE_RESERVED_1 = 0x00000001,
54 CP_PERFMON_ENABLE_MODE_COUNT_CONTEXT_TRUE = 0x00000002,
55 CP_PERFMON_ENABLE_MODE_COUNT_CONTEXT_FALSE = 0x00000003,
63 CP_PERFMON_STATE_DISABLE_AND_RESET = 0x00000000,
64 CP_PERFMON_STATE_START_COUNTING = 0x00000001,
65 CP_PERFMON_STATE_STOP_COUNTING = 0x00000002,
66 CP_PERFMON_STATE_RESERVED_3 = 0x00000003,
67 CP_PERFMON_STATE_DISABLE_AND_RESET_PHANTOM = 0x00000004,
68 CP_PERFMON_STATE_COUNT_AND_DUMP_PHANTOM = 0x00000005,
[all …]
H A Dsoc21_enum.h55 DSM_DATA_SEL_DISABLE = 0x00000000,
56 DSM_DATA_SEL_0 = 0x00000001,
57 DSM_DATA_SEL_1 = 0x00000002,
58 DSM_DATA_SEL_BOTH = 0x00000003,
66 DSM_ENABLE_ERROR_INJECT_FED_IN = 0x00000000,
67 DSM_ENABLE_ERROR_INJECT_SINGLE = 0x00000001,
68 DSM_ENABLE_ERROR_INJECT_UNCORRECTABLE = 0x00000002,
69 DSM_ENABLE_ERROR_INJECT_UNCORRECTABLE_LIMITED = 0x00000003,
77 DSM_SELECT_INJECT_DELAY_NO_DELAY = 0x00000000,
78 DSM_SELECT_INJECT_DELAY_DELAY_ERROR = 0x00000001,
[all …]
H A Dnavi10_enum.h51 GDS_PERF_SEL_DS_ADDR_CONFL = 0,
184 GATCL1_TYPE_NORMAL = 0x00000000,
185 GATCL1_TYPE_SHOOTDOWN = 0x00000001,
186 GATCL1_TYPE_BYPASS = 0x00000002,
194 UTCL1_TYPE_NORMAL = 0x00000000,
195 UTCL1_TYPE_SHOOTDOWN = 0x00000001,
196 UTCL1_TYPE_BYPASS = 0x00000002,
204 UTCL1_XNACK_SUCCESS = 0x00000000,
205 UTCL1_XNACK_RETRY = 0x00000001,
206 UTCL1_XNACK_PRT = 0x00000002,
[all …]
/linux/tools/testing/selftests/powerpc/vphn/
H A Dtest-vphn.c29 0xffffffffffffffff,
30 0xffffffffffffffff,
31 0xffffffffffffffff,
32 0xffffffffffffffff,
33 0xffffffffffffffff,
34 0xffffffffffffffff,
37 0x00000000
43 0x8001ffffffffffff,
44 0xffffffffffffffff,
45 0xfffffffffffffff
[all...]
/linux/drivers/net/wireless/realtek/rtw89/
H A Drtw8852a_rfk_table.c8 RTW89_DECL_RFK_WM(0x12a8, 0x00000001, 0x00000001),
9 RTW89_DECL_RFK_WM(0x12a8, 0x0000000e, 0x00000002),
10 RTW89_DECL_RFK_WM(0x32a8, 0x00000001, 0x00000001),
11 RTW89_DECL_RFK_WM(0x32a8, 0x0000000e, 0x00000002),
12 RTW89_DECL_RFK_WM(0x12bc, 0x000000f0, 0x00000005),
13 RTW89_DECL_RFK_WM(0x12bc, 0x00000f00, 0x00000005),
14 RTW89_DECL_RFK_WM(0x12bc, 0x000f0000, 0x00000005),
15 RTW89_DECL_RFK_WM(0x12bc, 0x0000f000, 0x00000005),
16 RTW89_DECL_RFK_WM(0x120c, 0x000000ff, 0x00000033),
17 RTW89_DECL_RFK_WM(0x12c0, 0x0ff00000, 0x00000033),
[all …]
/linux/drivers/gpu/drm/nouveau/include/nvhw/class/
H A Dcla0b5.h27 #define NVA0B5_SET_SRC_PHYS_MODE (0x00000260)
28 #define NVA0B5_SET_SRC_PHYS_MODE_TARGET 1:0
29 #define NVA0B5_SET_SRC_PHYS_MODE_TARGET_LOCAL_FB (0x00000000)
30 #define NVA0B5_SET_SRC_PHYS_MODE_TARGET_COHERENT_SYSMEM (0x00000001)
31 #define NVA0B5_SET_SRC_PHYS_MODE_TARGET_NONCOHERENT_SYSMEM (0x00000002)
32 #define NVA0B5_SET_DST_PHYS_MODE (0x00000264)
33 #define NVA0B5_SET_DST_PHYS_MODE_TARGET 1:0
34 #define NVA0B5_SET_DST_PHYS_MODE_TARGET_LOCAL_FB (0x00000000)
35 #define NVA0B5_SET_DST_PHYS_MODE_TARGET_COHERENT_SYSMEM (0x00000001)
36 #define NVA0B5_SET_DST_PHYS_MODE_TARGET_NONCOHERENT_SYSMEM (0x00000002)
[all …]
/linux/drivers/gpu/drm/amd/amdgpu/
H A Dtonga_sdma_pkt_open.h26 #define SDMA_OP_NOP 0
41 #define SDMA_SUBOP_TIMESTAMP_SET 0
44 #define SDMA_SUBOP_COPY_LINEAR 0
50 #define SDMA_SUBOP_WRITE_LINEAR 0
54 #define SDMA_PKT_HEADER_op_offset 0
55 #define SDMA_PKT_HEADER_op_mask 0x000000FF
56 #define SDMA_PKT_HEADER_op_shift 0
60 #define SDMA_PKT_HEADER_sub_op_offset 0
61 #define SDMA_PKT_HEADER_sub_op_mask 0x000000FF
71 #define SDMA_PKT_COPY_LINEAR_HEADER_op_offset 0
[all …]
H A Diceland_sdma_pkt_open.h26 #define SDMA_OP_NOP 0
41 #define SDMA_SUBOP_TIMESTAMP_SET 0
44 #define SDMA_SUBOP_COPY_LINEAR 0
50 #define SDMA_SUBOP_WRITE_LINEAR 0
54 #define SDMA_PKT_HEADER_op_offset 0
55 #define SDMA_PKT_HEADER_op_mask 0x000000FF
56 #define SDMA_PKT_HEADER_op_shift 0
60 #define SDMA_PKT_HEADER_sub_op_offset 0
61 #define SDMA_PKT_HEADER_sub_op_mask 0x000000FF
71 #define SDMA_PKT_COPY_LINEAR_HEADER_op_offset 0
[all …]

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