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/linux/Documentation/sound/soc/
H A Ddapm-graph.svg4 <!-- Generated by graphviz version 2.43.0 (0)
9 <g id="graph0" class="graph" transform="scale(1 1) rotate(0) translate(4 626)">
18 <title>4000b000.audio&#45;controller</title>
20 <text text-anchor="middle" x="216" y="-439.8" font-family="sans-serif" font-size="14.00">4000b000.a…
23 <title>cs42l51.0&#45;004a</title>
25 <text text-anchor="middle" x="607" y="-598.8" font-family="sans-serif" font-size="14.00">cs42l51.0&…
39 <!-- 4000b000.audio&#45;controller_capture -->
41 <title>4000b000.audio&#45;controller_capture</title>
46 <!-- 4000b000.audio&#45;controller_playback -->
48 <title>4000b000.audio&#45;controller_playback</title>
[all …]
/linux/Documentation/devicetree/bindings/clock/
H A Dimx1-clock.yaml38 clock-controller@21b000 {
41 reg = <0x0021b000 0x1000>;
H A Dfsl,vf610-ccm.yaml51 clock-controller@4006b000 {
53 reg = <0x4006b000 0x1000>;
/linux/arch/arm64/boot/dts/freescale/
H A Dqoriq-fman3-0-1g-3.dtsi10 fman0_rx_0x0b: port@8b000 {
11 cell-index = <0xb>;
13 reg = <0x8b000 0x1000>;
17 cell-index = <0x2b>;
19 reg = <0xab000 0x1000>;
25 reg = <0xe6000 0x1000>;
34 #size-cells = <0>;
36 reg = <0xe7000 0x1000>;
38 pcsphy3: ethernet-phy@0 {
39 reg = <0x0>;
/linux/Documentation/devicetree/bindings/crypto/
H A Dintel,keembay-ocs-hcu.yaml41 crypto@3000b000 {
43 reg = <0x3000b000 0x1000>;
/linux/arch/arm/boot/dts/realtek/
H A Drtd1195.dtsi6 /memreserve/ 0x00000000 0x0000a800; /* boot code */
7 /memreserve/ 0x0000a800 0x000f5800;
8 /memreserve/ 0x17fff000 0x00001000;
21 #size-cells = <0>;
23 cpu0: cpu@0 {
26 reg = <0x0>;
33 reg = <0x1>;
43 rpc_comm: rpc@b000 {
44 reg = <0x0000b000 0x1000>;
48 reg = <0x01b00000 0x400000>;
[all …]
/linux/Documentation/devicetree/bindings/phy/
H A Dqcom,ipq5332-usb-hsphy.yaml25 const: 0
49 usb-phy@7b000 {
51 reg = <0x0007b000 0x12c>;
56 #phy-cells = <0>;
/linux/Documentation/devicetree/bindings/media/
H A Dmediatek,mdp3-tcc.yaml61 display@1400b000 {
63 reg = <0x1400b000 0x1000>;
64 mediatek,gce-client-reg = <&gce1 SUBSYS_1400XXXX 0xb000 0x1000>;
H A Dti,cal.yaml25 # for DRA72 controllers pre ES2.0
75 port@0:
78 description: 'CSI2 Port #0'
112 - port@0
127 cal: cal@4845b000 {
129 reg = <0x4845B000 0x400>,
130 <0x4845B800 0x40>,
131 <0x4845B900 0x40>;
136 ti,camerrx-control = <&scm_conf 0xE94>;
140 #size-cells = <0>;
[all …]
/linux/arch/arm/boot/dts/st/
H A Dstm32mp15xxaa-pinctrl.dtsi13 gpio-ranges = <&pinctrl 0 0 16>;
19 gpio-ranges = <&pinctrl 0 16 16>;
25 gpio-ranges = <&pinctrl 0 32 16>;
31 gpio-ranges = <&pinctrl 0 48 16>;
37 gpio-ranges = <&pinctrl 0 64 16>;
43 gpio-ranges = <&pinctrl 0 80 16>;
49 gpio-ranges = <&pinctrl 0 96 16>;
55 gpio-ranges = <&pinctrl 0 112 16>;
61 gpio-ranges = <&pinctrl 0 128 16>;
64 gpioj: gpio@5000b000 {
[all …]
/linux/Documentation/devicetree/bindings/iio/adc/
H A Dfsl,vf610-adc.yaml49 * Frequency in normal mode (ADLPC=0, ADHSC=0)
50 * Frequency in high-speed mode (ADLPC=0, ADHSC=1)
51 * Frequency in low-power mode (ADLPC=1, ADHSC=0)
78 adc@4003b000 {
80 reg = <0x4003b000 0x1000>;
81 interrupts = <0 53 0x04>;
/linux/Documentation/devicetree/bindings/soc/mediatek/
H A Dmtk-svs.yaml85 svs@1100b000 {
87 reg = <0 0x1100b000 0 0x1000>;
/linux/arch/powerpc/boot/dts/fsl/
H A Dqoriq-fman-0-1g-3.dtsi2 * QorIQ FMan 1g port #3 device tree stub [ controller @ offset 0x400000 ]
36 fman0_rx_0x0b: port@8b000 {
37 cell-index = <0xb>;
39 reg = <0x8b000 0x1000>;
43 cell-index = <0x2b>;
45 reg = <0xab000 0x1000>;
51 reg = <0xe6000 0x1000>;
59 #size-cells = <0>;
61 reg = <0xe7120 0xee0>;
64 reg = <0x8>;
H A Dqoriq-fman-1-1g-3.dtsi2 * QorIQ FMan 1g port #3 device tree stub [ controller @ offset 0x500000 ]
36 fman1_rx_0x0b: port@8b000 {
37 cell-index = <0xb>;
39 reg = <0x8b000 0x1000>;
43 cell-index = <0x2b>;
45 reg = <0xab000 0x1000>;
51 reg = <0xe6000 0x1000>;
59 #size-cells = <0>;
61 reg = <0xe7120 0xee0>;
64 reg = <0x8>;
H A Dqoriq-fman3-1-1g-3.dtsi2 * QorIQ FMan v3 1g port #3 device tree stub [ controller @ offset 0x500000 ]
36 fman1_rx_0x0b: port@8b000 {
37 cell-index = <0xb>;
39 reg = <0x8b000 0x1000>;
43 cell-index = <0x2b>;
45 reg = <0xab000 0x1000>;
51 reg = <0xe6000 0x1000>;
67 #size-cells = <0>;
69 reg = <0xe7000 0x1000>;
72 pcsphy11: ethernet-phy@0 {
[all …]
H A Dqoriq-fman3-0-1g-3.dtsi2 * QorIQ FMan v3 1g port #3 device tree stub [ controller @ offset 0x400000 ]
36 fman0_rx_0x0b: port@8b000 {
37 cell-index = <0xb>;
39 reg = <0x8b000 0x1000>;
43 cell-index = <0x2b>;
45 reg = <0xab000 0x1000>;
51 reg = <0xe6000 0x1000>;
67 #size-cells = <0>;
69 reg = <0xe7000 0x1000>;
72 pcsphy3: ethernet-phy@0 {
[all …]
H A Dmpc8536ds.dtsi36 nor@0,0 {
40 reg = <0x0 0x0 0x8000000>;
44 partition@0 {
45 reg = <0x0 0x03000000>;
50 reg = <0x03000000 0x00e00000>;
56 reg = <0x03e00000 0x00200000>;
62 reg = <0x04000000 0x00400000>;
67 reg = <0x04400000 0x03b00000>;
72 reg = <0x07f00000 0x00080000>;
77 reg = <0x07f80000 0x00080000>;
[all …]
/linux/Documentation/devicetree/bindings/thermal/
H A Dmediatek,thermal.yaml94 thermal@1100b000 {
96 reg = <0x1100b000 0x1000>;
97 interrupts = <0 70 IRQ_TYPE_LEVEL_LOW>;
/linux/arch/arm/boot/dts/ti/omap/
H A Ddra72x.dtsi27 target-module@5b000 { /* 0x4845b000, ap 59 46.0 */
29 reg = <0x5b000 0x4>,
30 <0x5b010 0x4>;
36 clocks = <&cam_clkctrl DRA7_CAM_VIP2_CLKCTRL 0>;
40 ranges = <0x0 0x5b000 0x1000>;
42 cal: cal@0 {
44 reg = <0x0000 0x400>,
45 <0x0800 0x40>,
46 <0x0900 0x40>;
51 ti,camerrx-control = <&scm_conf 0xE94>;
[all …]
/linux/arch/arm/boot/dts/arm/
H A Dversatile-pb.dts11 clear-mask = <0xffffffff>;
16 valid-mask = <0x7fe003ff>;
21 reg = <0x101e6000 0x1000>;
33 reg = <0x101e7000 0x1000>;
46 reg = <0x10001000 0x1000
47 0x41000000 0x10000
48 0x42000000 0x100000>;
49 bus-range = <0 0xff>;
54 ranges = <0x01000000 0 0x00000000 0x43000000 0 0x00010000 /* downstream I/O */
55 0x02000000 0 0x50000000 0x50000000 0 0x10000000 /* non-prefetchable memory */
[all …]
/linux/Documentation/devicetree/bindings/sound/
H A Dst,stm32-sai.yaml68 "^audio-controller@[0-9a-f]+$":
81 const: 0
130 const: 0
204 sai2: sai@4400b000 {
208 ranges = <0 0x4400b000 0x400>;
209 reg = <0x4400b000 0x4>, <0x4400b3f0 0x10>;
213 pinctrl-0 = <&sai2a_pins_a>, <&sai2b_pins_b>;
217 #sound-dai-cells = <0>;
219 reg = <0x4 0x1c>;
220 dmas = <&dmamux1 89 0x400 0x01>;
/linux/drivers/clk/imx/
H A Dclk-gate-93.c17 #define DIRECT_OFFSET 0x0
20 * 0b000 - LPCG will be OFF in any CPU mode.
21 * 0b100 - LPCG will be ON in any CPU mode.
23 #define LPM_SETTING_OFF 0x0
24 #define LPM_SETTING_ON 0x4
26 #define LPM_CUR_OFFSET 0x1c
28 #define AUTHEN_OFFSET 0x30
72 if (gate->share_count && (*gate->share_count)++ > 0) in imx93_clk_gate_enable()
79 return 0; in imx93_clk_gate_enable()
90 if (WARN_ON(*gate->share_count == 0)) in imx93_clk_gate_disable()
[all …]
/linux/arch/arm64/boot/dts/realtek/
H A Drtd129x.dtsi8 /memreserve/ 0x0000000000000000 0x000000000001f000;
9 /memreserve/ 0x000000000001f000 0x00000000000e1000;
10 /memreserve/ 0x0000000001b00000 0x00000000004be000;
26 reg = <0x1f000 0x1000>;
30 reg = <0x1ffe000 0x4000>;
34 reg = <0x10100000 0xf00000>;
47 #clock-cells = <0>;
51 soc@0 {
55 ranges = <0x00000000 0x00000000 0x0001f000>, /* boot ROM */
57 <0x80000000 0x80000000 0x80000000>;
[all …]
H A Drtd139x.dtsi8 /memreserve/ 0x0000000000000000 0x000000000002f000;
9 /memreserve/ 0x000000000002f000 0x00000000000d1000;
25 reg = <0x2f000 0x1000>;
29 reg = <0x1ffe000 0x4000>;
33 reg = <0x10100000 0xf00000>;
46 #clock-cells = <0>;
50 soc@0 {
54 ranges = <0x00000000 0x00000000 0x0001f000>, /* boot ROM */
55 <0x98000000 0x98000000 0x68000000>;
59 reg = <0x98000000 0x200000>;
[all …]
/linux/Documentation/devicetree/bindings/bus/
H A Dti-sysc.yaml31 pattern: "^target-module(@[0-9a-f]+)?$"
157 default: 0
158 minimum: 0
192 target-module@2b000 {
195 reg = <0x2b400 0x4>,
196 <0x2b404 0x4>,
197 <0x2b408 0x4>;
199 clocks = <&l3_init_clkctrl OMAP4_USB_OTG_HS_CLKCTRL 0>;
214 ranges = <0 0x2b000 0x1000>;

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