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/linux/Documentation/devicetree/bindings/power/
H A Drenesas,rcar-sysc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/renesas,rcar-sysc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car and RZ/G System Controller
10 - Geert Uytterhoeven <geert+renesas@glider.be>
11 - Magnus Damm <magnus.damm@gmail.com>
14 The R-Car (RZ/G) System Controller provides power management for the CPU
17 include/dt-bindings/power/r8*-sysc.h
22 - renesas,r8a7742-sysc # RZ/G1H
[all …]
/linux/drivers/pmdomain/renesas/
H A DMakefile1 # SPDX-License-Identifier: GPL-2.0
3 obj-$(CONFIG_SYSC_R8A7742) += r8a7742-sysc.o
4 obj-$(CONFIG_SYSC_R8A7743) += r8a7743-sysc.o
5 obj-$(CONFIG_SYSC_R8A7745) += r8a7745-sysc.o
6 obj-$(CONFIG_SYSC_R8A77470) += r8a77470-sysc.o
7 obj-$(CONFIG_SYSC_R8A774A1) += r8a774a1-sysc.o
8 obj-$(CONFIG_SYSC_R8A774B1) += r8a774b1-sysc.o
9 obj-$(CONFIG_SYSC_R8A774C0) += r8a774c0-sysc.o
10 obj-$(CONFIG_SYSC_R8A774E1) += r8a774e1-sysc.o
11 obj-$(CONFIG_SYSC_R8A7779) += r8a7779-sysc.o
[all …]
H A Drcar-sysc.c1 // SPDX-License-Identifier: GPL-2.0
3 * R-Car SYSC Power management support
6 * Copyright (C) 2015-2017 Glider bvba
19 #include <linux/soc/renesas/rcar-sysc.h>
21 #include "rcar-sysc.h"
23 /* SYSC Common */
24 #define SYSCSR 0x00 /* SYSC Status Register */
30 /* SYSC Status Register */
37 * Use WFI to power off, CPG/APMU to resume ARM cores on R-Car Gen2
38 * Use PSCI on R-Car Gen3
[all …]
/linux/arch/arm/boot/dts/ti/omap/
H A Dam437x-l4.dtsi2 compatible = "ti,am4-l4-wkup", "simple-pm-bus";
3 power-domains = <&prm_wkup>;
5 clock-names = "fck";
10 reg-names = "ap", "la", "ia0", "ia1";
11 #address-cells = <1>;
12 #size-cells = <1>;
18 compatible = "simple-pm-bus";
19 #address-cells = <1>;
20 #size-cells = <1>;
28 compatible = "simple-pm-bus";
[all …]
H A Dam33xx-l4.dtsi2 compatible = "ti,am33xx-l4-wkup", "simple-pm-bus";
3 power-domains = <&prm_wkup>;
5 clock-names = "fck";
10 reg-names = "ap", "la", "ia0", "ia1";
11 #address-cells = <1>;
12 #size-cells = <1>;
18 compatible = "simple-pm-bus";
19 #address-cells = <1>;
20 #size-cells = <1>;
28 compatible = "simple-pm-bus";
[all …]
H A Domap4.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/
6 #include <dt-bindings/bus/ti-sysc.h>
7 #include <dt-bindings/clock/omap4.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/pinctrl/omap.h>
11 #include <dt-bindings/clock/omap4.h>
15 interrupt-parent = <&wakeupgen>;
16 #address-cells = <1>;
[all …]
H A Domap5-l4-abe.dtsi2 compatible = "ti,omap5-l4-abe", "simple-pm-bus";
5 reg-names = "la", "ap";
6 power-domains = <&prm_abe>;
7 /* OMAP5_L4_ABE_CLKCTRL is read-only */
8 #address-cells = <1>;
9 #size-cells = <1>;
13 compatible = "simple-pm-bus";
14 #address-cells = <1>;
15 #size-cells = <1>;
89 target-module@22000 { /* 0x40122000, ap 2 02.0 */
[all …]
H A Domap5.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/bus/ti-sysc.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/pinctrl/omap.h>
12 #include <dt-bindings/clock/omap5.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
19 interrupt-parent = <&wakeupgen>;
[all …]
H A Dam33xx.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/bus/ti-sysc.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/pinctrl/am33xx.h>
11 #include <dt-bindings/clock/am3.h>
15 interrupt-parent = <&intc>;
16 #address-cells = <1>;
17 #size-cells = <1>;
30 d-can0 = &dcan0;
[all …]
H A Dam4372.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/bus/ti-sysc.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/clock/am4.h>
15 interrupt-parent = <&wakeupgen>;
16 #address-cells = <1>;
17 #size-cells = <1>;
41 #address-cells = <1>;
[all …]
H A Ddra7.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2013 Texas Instruments Incorporated - https://www.ti.com/
8 #include <dt-bindings/bus/ti-sysc.h>
9 #include <dt-bindings/clock/dra7.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/pinctrl/dra.h>
16 #address-cells = <2>;
17 #size-cells = <2>;
20 interrupt-parent = <&crossbar_mpu>;
47 compatible = "arm,armv7-timer";
[all …]
H A Ddra74x.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2014 Texas Instruments Incorporated - https://www.ti.com/
16 compatible = "arm,cortex-a15";
18 operating-points-v2 = <&cpu0_opp_table>;
21 clock-names = "cpu";
23 clock-latency = <300000>; /* From omap-cpufreq driver */
26 #cooling-cells = <2>; /* min followed by max */
28 vbb-supply = <&abb_mpu>;
40 compatible = "arm,cortex-a15-pmu";
41 interrupt-parent = <&wakeupgen>;
[all …]
/linux/Documentation/devicetree/bindings/bus/
H A Dti-sysc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/bus/ti-sysc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tony Lindgren <tony@atomide.com>
31 pattern: "^target-module(@[0-9a-f]+)?$"
35 - items:
36 - enum:
37 - ti,sysc-omap2
38 - ti,sysc-omap4
[all …]
/linux/drivers/clk/ralink/
H A Dclk-mtmips.c1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/clk-provider.h>
12 #include <linux/reset-controller.h>
110 struct regmap *sysc; member
232 struct clk_hw **hws = clk_data->hws; in mtmips_register_pherip_clocks()
234 size_t idx_start = priv->data->num_clk_base + priv->data->num_clk_fixed + in mtmips_register_pherip_clocks()
235 priv->data->num_clk_factor; in mtmips_register_pherip_clocks()
238 for (i = 0; i < priv->data->num_clk_periph; i++) { in mtmips_register_pherip_clocks()
241 sclk = &priv->data->clk_periph[i]; in mtmips_register_pherip_clocks()
242 ret = of_clk_hw_register(np, &sclk->hw); in mtmips_register_pherip_clocks()
[all …]
H A Dclk-mt7621.c1 // SPDX-License-Identifier: GPL-2.0
9 #include <linux/clk-provider.h>
14 #include <linux/reset-controller.h>
16 #include <dt-bindings/clock/mt7621-clk.h>
17 #include <dt-bindings/reset/mt7621-reset.h>
36 struct regmap *sysc; member
101 struct regmap *sysc = clk_gate->priv->sysc; in mt7621_gate_enable() local
103 return regmap_update_bits(sysc, SYSC_REG_CLKCFG1, in mt7621_gate_enable()
104 clk_gate->bit_idx, clk_gate->bit_idx); in mt7621_gate_enable()
110 struct regmap *sysc = clk_gate->priv->sysc; in mt7621_gate_disable() local
[all …]
/linux/drivers/bus/
H A Dti-sysc.c1 // SPDX-License-Identifier: GPL-2.0
3 * ti-sysc.c - Texas Instruments sysc interconnect target driver
8 * Copyright (C) 2017-2024 Texas Instruments Incorporated - https://www.ti.com/
13 * Copyright (C) 2009-2011 Nokia Corporation
14 * Copyright (C) 2011-2021 Texas Instruments Incorporated - https://www.ti.com/
35 #include <linux/platform_data/ti-sysc.h>
37 #include <dt-bindings/bus/ti-sysc.h>
70 struct sysc *ddata;
98 static const char * const reg_names[] = { "rev", "sysc", "syss", };
108 * struct sysc - TI sysc interconnect target module registers and capabilities
[all …]
/linux/arch/arm/boot/dts/renesas/
H A Dr8a7792.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car V2H (R8A77920) SoC
8 #include <dt-bindings/clock/r8a7792-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/power/r8a7792-sysc.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
17 interrupt-parent = <&gic>;
40 compatible = "fixed-clock";
[all …]
H A Dr8a77470.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/r8a77470-cpg-mssr.h>
11 #include <dt-bindings/power/r8a77470-sysc.h>
14 #address-cells = <2>;
15 #size-cells = <2>;
16 interrupt-parent = <&gic>;
27 #address-cells = <1>;
28 #size-cells = <0>;
[all …]
H A Dr8a7790.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car H2 (R8A77900) SoC
6 * Copyright (C) 2013-2014 Renesas Solutions Corp.
10 #include <dt-bindings/clock/r8a7790-cpg-mssr.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/power/r8a7790-sysc.h>
17 #address-cells = <2>;
18 #size-cells = <2>;
19 interrupt-parent = <&gic>;
[all …]
H A Dr8a7743.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2017 Cogent Embedded Inc.
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/r8a7743-cpg-mssr.h>
11 #include <dt-bindings/power/r8a7743-sysc.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
17 interrupt-parent = <&gic>;
25 compatible = "fixed-clock";
[all …]
H A Dr8a7742.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/clock/r8a7742-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/power/r8a7742-sysc.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
17 interrupt-parent = <&gic>;
25 compatible = "fixed-clock";
26 #clock-cells = <0>;
[all …]
H A Dr8a7791.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car M2-W (R8A77910) SoC
5 * Copyright (C) 2013-2015 Renesas Electronics Corporation
6 * Copyright (C) 2013-2014 Renesas Solutions Corp.
10 #include <dt-bindings/clock/r8a7791-cpg-mssr.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/power/r8a7791-sysc.h>
17 #address-cells = <2>;
18 #size-cells = <2>;
[all …]
/linux/arch/arm64/boot/dts/renesas/
H A Dr8a77995.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the R-Car D3 (R8A77995) SoC
9 #include <dt-bindings/clock/r8a77995-cpg-mssr.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/power/r8a77995-sysc.h>
15 #address-cells = <2>;
16 #size-cells = <2>;
17 interrupt-parent = <&gic>;
25 compatible = "fixed-clock";
26 #clock-cells = <0>;
[all …]
H A Dr8a774c0.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2018-2019 Renesas Electronics Corp.
8 #include <dt-bindings/clock/r8a774c0-cpg-mssr.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/r8a774c0-sysc.h>
14 #address-cells = <2>;
15 #size-cells = <2>;
16 interrupt-parent = <&gic>;
24 compatible = "fixed-clock";
25 #clock-cells = <0>;
[all …]
/linux/arch/mips/ralink/
H A Dclk.c1 // SPDX-License-Identifier: GPL-2.0-only
13 #include <linux/clk-provider.h>
14 #include <asm/mach-ralink/ralink_regs.h>
25 return "ralink,rt2880-sysc"; in clk_cpu()
28 return "ralink,rt3883-sysc"; in clk_cpu()
31 return "ralink,rt3050-sysc"; in clk_cpu()
34 return "ralink,rt3052-sysc"; in clk_cpu()
37 return "ralink,rt3350-sysc"; in clk_cpu()
40 return "ralink,rt3352-sysc"; in clk_cpu()
43 return "ralink,rt5350-sysc"; in clk_cpu()
[all …]

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