| /linux/Documentation/netlink/specs/ |
| H A D | dpll.yaml | 1 # SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Clause)
8 -
10 name: mode
16 -
20 -
22 doc: highest prio input pin auto selected by dpll
23 render-max: true
24 -
26 name: lock-status
31 -
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| /linux/Documentation/devicetree/bindings/sound/ |
| H A D | mediatek,mt8188-afe.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/mediatek,mt8188-afe.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Trevor Wu <trevor.wu@mediatek.com>
14 const: mediatek,mt8188-afe
25 reset-names:
28 memory-region:
31 Shared memory region for AFE memif. A "shared-dma-pool".
32 See dtschema reserved-memory/shared-dma-pool.yaml for details.
[all …]
|
| H A D | mt8195-afe-pcm.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/mt8195-afe-pcm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Trevor Wu <trevor.wu@mediatek.com>
14 const: mediatek,mt8195-audio
25 reset-names:
28 memory-region:
31 Shared memory region for AFE memif. A "shared-dma-pool".
32 See ../reserved-memory/reserved-memory.txt for details.
[all …]
|
| H A D | cs35l36.txt | 5 - compatible : "cirrus,cs35l36"
7 - reg : the I2C address of the device for I2C
9 - VA-supply, VP-supply : power supplies for the device,
13 - cirrus,boost-ctl-millivolt : Boost Voltage Value. Configures the boost
18 - cirrus,boost-peak-milliamp : Boost-converter peak current limit in mA.
24 - cirrus,boost-ind-nanohenry : Inductor estimation LBST reference value.
32 - cirrus,multi-amp-mode : Boolean to determine if there are more than
33 one amplifier in the system. If more than one it is best to Hi-Z the ASP
36 - cirrus,boost-ctl-select : Boost converter control source selection.
39 0x00 - Control Port Value
[all …]
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| /linux/sound/pci/hda/ |
| H A D | hda_generic.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Generic BIOS auto-parser helper functions for HD-audio
16 /* table entry for multi-io paths */
18 hda_nid_t pin; /* multi-io widget pin NID */ member
20 unsigned int ctl_in; /* cached input-pin control value */
25 * For output, stored in the order of DAC -> ... -> pin,
26 * for input, pin -> ... -> ADC.
30 * multi[] indicates whether it's a selector widget with multi-connectors
48 unsigned char multi[MAX_NID_PATH_DEPTH]; member
52 bool pin_fixed:1; /* path with fixed pin */
[all …]
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| /linux/Documentation/sound/hd-audio/ |
| H A D | models.rst | 2 HD-Audio Codec-Specific Models
8 3-jack in back and a headphone out
9 3stack-digout
10 3-jack in back, a HP out and a SPDIF out
12 5-jack in back, 2-jack in front
13 5stack-digout
14 5-jack in back, 2-jack in front, a SPDIF out
16 6-jack in back, 2-jack in front
17 6stack-digout
18 6-jack with a SPDIF out
[all …]
|
| H A D | controls.rst | 2 HD-Audio Codec-Specific Mixer Controls
6 This file explains the codec-specific mixer controls.
9 --------------
11 Channel Mode
12 This is an enum control to change the surround-channel setup,
16 jack-retasking of multi-I/O jacks.
18 Auto-Mute Mode
19 This is an enum control to change the auto-mute behavior of the
20 headphone and line-out jacks. If built-in speakers and headphone
21 and/or line-out jacks are available on a machine, this controls
[all …]
|
| /linux/Documentation/devicetree/bindings/display/ |
| H A D | multi-inno,mi0283qt.txt | 1 Multi-Inno MI0283QT display panel
4 - compatible: "multi-inno,mi0283qt".
7 all mandatory properties described in ../spi/spi-bus.txt must be specified.
10 - dc-gpios: D/C pin. The presence/absence of this GPIO determines
11 the panel interface mode (IM[3:0] pins):
12 - present: IM=x110 4-wire 8-bit data serial interface
13 - absent: IM=x101 3-wire 9-bit data serial interface
14 - reset-gpios: Reset pin
15 - power-supply: A regulator node for the supply voltage.
16 - backlight: phandle of the backlight device attached to the panel
[all …]
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| /linux/sound/soc/sof/ |
| H A D | ipc4-topology.h | 1 /* SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause) */
15 #define SOF_IPC4_FW_PAGE(x) ((((x) + BIT(12) - 1) & ~(BIT(12) - 1)) >> 12)
16 #define SOF_IPC4_FW_ROUNDUP(x) (((x) + BIT(6) - 1) & (~(BIT(6) -
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| /linux/Documentation/devicetree/bindings/pinctrl/ |
| H A D | renesas,rza1-ports.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/renesas,rza1-ports.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas RZ/A1 combined Pin and GPIO controller
10 - Jacopo Mondi <jacopo+renesas@jmondi.org>
11 - Geert Uytterhoeven <geert+renesas@glider.be>
14 The Renesas SoCs of the RZ/A1 family feature a combined Pin and GPIO
16 Pin multiplexing and GPIO configuration is performed on a per-pin basis
17 writing configuration values to per-port register sets.
[all …]
|
| H A D | pinctrl-st.txt | 1 *ST pin controller.
3 Each multi-function pin is controlled, driven and routed through the
4 PIO multiplexing block. Each pin supports GPIO functionality (ALT0)
5 and multiple alternate functions(ALT1 - ALTx) that directly connect
6 the pin to different hardware blocks.
8 When a pin is in GPIO mode, Output Enable (OE), Open Drain(OD), and
12 gpio driver to configure a pin.
14 GPIO bank can have one of the two possible types of interrupt-wirings.
20 | |----> [gpio-bank (n) ]
21 | |----> [gpio-bank (n + 1)]
[all …]
|
| H A D | awinic,aw9523-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/awinic,aw9523-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
13 The Awinic AW9523/AW9523B I2C GPIO Expander featuring 16 multi-function
14 I/O, 256 steps PWM mode and interrupt support.
18 const: awinic,aw9523-pinctrl
23 '#gpio-cells':
25 Specifying the pin number and flags, as defined in
[all …]
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| /linux/arch/powerpc/boot/dts/ |
| H A D | turris1x.dts | 1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright 2013 - 2022 CZ.NIC z.s.p.o. (http://www.nic.cz/)
8 * and available at: https://docs.turris.cz/hw/turris-1x/turris-1x/
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/leds/common.h>
14 /include/ "fsl/p2020si-pre.dtsi"
41 gpio-controller@18 {
45 #gpio-cells = <2>;
46 gpio-controller;
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|
| /linux/drivers/watchdog/ |
| H A D | f71808e_wdt.c | 1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * Copyright (C) 2007-2009 Hans de Goede <hdegoede@redhat.com> *
22 #define SIO_UNLOCK_KEY 0x87 /* Key to enable Super-I/O */
23 #define SIO_LOCK_KEY 0xAA /* Key to disable Super-I/O */
31 #define SIO_F81866_REG_PORT_SEL 0x27 /* F81866 Multi-Function Register */
33 #define SIO_REG_MFUNCT1 0x29 /* Multi function select 1 */
34 #define SIO_REG_MFUNCT2 0x2a /* Multi function select 2 */
35 #define SIO_REG_MFUNCT3 0x2b /* Multi function select 3 */
74 pin number 63 */
96 "Watchdog f71862fg reset output pin configuration. Choose pin 56 or 63"
[all …]
|
| /linux/arch/m68k/coldfire/ |
| H A D | m527x.c | 1 // SPDX-License-Identifier: GPL-2.0
5 * m527x.c -- platform support for ColdFire 527x based boards
7 * Sub-architcture dependent initialization code for the Freescale
10 * Copyright (C) 1999-2004, Greg Ungerer (gerg@snapgear.com)
11 * Copyright (C) 2001-2004, SnapGear Inc. (www.snapgear.com)
45 CLKDEV_INIT("imx1-i2c.0", NULL, &clk_sys),
77 /* setup Port FECI2C Pin Assignment Register for I2C */ in m527x_i2c_init()
85 /* setup Port FECI2C Pin Assignment Register for I2C */ in m527x_i2c_init()
101 * External Pin Mask Setting & Enable External Pin for Interface in m527x_uarts_init()
114 /* Set multi-function pins to ethernet mode for fec0 */ in m527x_fec_init()
[all …]
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| /linux/Documentation/devicetree/bindings/iio/adc/ |
| H A D | adi,ad4695.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schema
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| /linux/arch/arm/boot/dts/microchip/ |
| H A D | at91rm9200.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91rm9200.dtsi - Device Tree Include file for AT91RM9200 family SoC
12 #include <dt-bindings/pinctrl/at91.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/gpio/gpio.h>
15 #include <dt-bindings/clock/at91.h>
16 #include <dt-bindings/mfd/at91-usart.h>
19 #address-cells = <1>;
20 #size-cells = <1>;
23 interrupt-parent = <&aic>;
[all …]
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| /linux/include/linux/soc/pxa/ |
| H A D | mfp.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Common Multi-Function Pin Definitions
7 * 2007-8-21: eric miao <eric.miao@marvell.com>
18 MFP_PIN_INVALID = -1,
325 * a possible MFP configuration is represented by a 32-bit integer
327 * bit 0.. 9 - MFP Pin Number (1024 Pins Maximum)
328 * bit 10..12 - Alternate Function Selection
329 * bit 13..15 - Drive Strength
330 * bit 16..18 - Low Power Mode State
331 * bit 19..20 - Low Power Mode Edge Detection
[all …]
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| /linux/drivers/soc/pxa/ |
| H A D | mfp.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/arch/arm/plat-pxa/mfp.c
5 * Multi-Function Pin Support
9 * 2007-08-21: eric miao <eric.miao@marvell.com>
43 * used in parentheses for don't-care values. Except for the float output,
45 * non-LPM pulled output, the same configuration could probably be used.
66 * The pullup and pulldown state of the MFP pin at run mode is by default
85 * (most likely a read-modify-write operation) is atomic, and that
93 unsigned long config; /* -1 for not configured */
95 unsigned long mfpr_run; /* Run-Mode Register Value */
[all …]
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| /linux/Documentation/devicetree/bindings/memory-controllers/ |
| H A D | renesas,rpc-if.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controllers/renesas,rpc-if.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas Reduced Pin Count Interface (RPC-IF)
10 - Sergei Shtylyov <sergei.shtylyov@gmail.com>
13 Renesas RPC-IF allows a SPI flash or HyperFlash connected to the SoC to
14 be accessed via the external address space read mode or the manual mode.
16 The flash chip itself should be represented by a subnode of the RPC-IF node.
19 - if it contains "jedec,spi-nor", then SPI is used;
[all …]
|
| /linux/Documentation/arch/arm/pxa/ |
| H A D | mfp.rst | 7 MFP stands for Multi-Function Pin, which is the pin-mux logic on PXA3xx and
15 mechanism is introduced from PXA3xx to completely move the pin-mux functions
16 out of the GPIO controller. In addition to pin-mux configurations, the MFP
17 also controls the low power state, driving strength, pull-up/down and event
18 detection of each pin. Below is a diagram of internal connections between
21 +--------+
22 | |--(GPIO19)--+
24 | |--(GPIO...) |
25 +--------+ |
26 | +---------+
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| /linux/Documentation/devicetree/bindings/leds/ |
| H A D | leds-lp55xx.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/leds/leds-lp55xx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jacek Anaszewski <jacek.anaszewski@gmail.com>
11 - Pavel Machek <pavel@ucw.cz>
14 Bindings for the TI/National Semiconductor LP55xx and LP8501 multi channel
27 - national,lp5521
28 - national,lp5523
29 - ti,lp55231
[all …]
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| /linux/Documentation/i2c/ |
| H A D | slave-testunit-backend.rst | 1 .. SPDX-License-Identifier: GPL-2.0
7 by Wolfram Sang <wsa@sang-engineering.com> in 2020
11 easy to obtain). Examples include multi-master testing, and SMBus Host Notify
13 between master and slave mode because it needs to send data, too.
21 # echo "slave-testunit 0x1030" > /sys/bus/i2c/devices/i2c-0/new_device
30 compatible = "slave-testunit";
39 When writing, the device consists of 4 8-bit registers and, except for some
43 .. csv-table::
51 Using 'i2cset' from the i2c-tools package, the generic command looks like::
53 # i2cset -y <bus_num> <testunit_address> <CMD> <DATAL> <DATAH> <DELAY> i
[all …]
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| /linux/drivers/pinctrl/ |
| H A D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
7 bool "Pin controllers"
15 bool "Support pin multiplexing controllers" if COMPILE_TEST
22 bool "Support pin configuration controllers" if COMPILE_TEST
35 bool "AMD GPIO pin control"
53 tristate "Apple SoC GPIO pin controller driver"
66 will be called pinctrl-apple-gpio.
69 bool "Axis ARTPEC-6 pin controller driver"
74 This is the driver for the Axis ARTPEC-6 pin controller. This driver
75 supports pin function multiplexing as well as pin bias and drive
[all …]
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| /linux/arch/arm/mach-pxa/ |
| H A D | mfp-pxa3xx.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * linux/arch/arm/mach-pxa/mfp.c
5 * PXA3xx Multi-Function Pin Support
9 * 2007-08-21: eric miao <eric.miao@marvell.com>
19 #include "mfp-pxa3xx.h"
20 #include "pxa3xx-regs.h"
26 * entering - for instance, we might not want to place MFP pins in
27 * a pull-down mode if they're an active low chip select, and we're
42 * NOTE: the last 3 bits DxS are write-1-to-clear so carefully in pxa3xx_mfp_resume()
|