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/freebsd/sys/contrib/device-tree/Bindings/pinctrl/
H A Datmel,at91-pinctrl.txt10 Please refer to pinctrl-bindings.txt in this directory for details of the
12 phrase "pin configuration node".
14 Atmel AT91 pin configuration node is a node of a group of pins which can be
16 of the pins in that group. The 'pins' selects the function mode(also named pin
17 mode) this pin can work on and the 'config' configures various pad settings
18 such as pull-up, multi drive, etc.
21 - compatible: "atmel,at91rm9200-pinctrl" or "atmel,at91sam9x5-pinctrl"
22 or "atmel,sama5d3-pinctrl" or "microchip,sam9x60-pinctrl"
23 - atmel,mux-mask: array of mask (periph per bank) to describe if a pin can be
24 configured in this periph mode. All the periph and bank need to be describe.
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H A Drenesas,rza1-ports.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/renesas,rza1-port
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H A Dqcom,pmic-mpp.txt1 Qualcomm PMIC Multi-Purpose Pin (MPP) block
6 - compatible:
10 "qcom,pm8018-mpp",
11 "qcom,pm8019-mpp",
12 "qcom,pm8038-mpp",
13 "qcom,pm8058-mpp",
14 "qcom,pm8821-mpp",
15 "qcom,pm8841-mpp",
16 "qcom,pm8916-mpp",
17 "qcom,pm8917-mpp",
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H A Drenesas,rza1-pinctrl.txt1 Renesas RZ/A1 combined Pin and GPIO controller
3 The Renesas SoCs of the RZ/A1 family feature a combined Pin and GPIO controller,
5 Pin multiplexing and GPIO configuration is performed on a per-pin basis
6 writing configuration values to per-port register sets.
8 function (port mode) or in alternate function mode.
9 Up to 8 different alternate function modes exist for each single pin.
11 Pin controller node
12 -------------------
15 - compatible: should be:
16 - "renesas,r7s72100-ports": for RZ/A1H
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H A Dpinctrl-st.txt1 *ST pin controller.
3 Each multi-function pin is controlled, driven and routed through the
4 PIO multiplexing block. Each pin supports GPIO functionality (ALT0)
5 and multiple alternate functions(ALT1 - ALTx) that directly connect
6 the pin to different hardware blocks.
8 When a pin is in GPIO mode, Output Enable (OE), Open Drain(OD), and
12 gpio driver to configure a pin.
14 GPIO bank can have one of the two possible types of interrupt-wirings.
20 | |----> [gpio-bank (n) ]
21 | |----> [gpio-bank (n + 1)]
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H A Dqcom,pmic-mpp.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,pmic-mpp.yaml#
5 $schema: http://devicetree.org/meta-schema
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/freebsd/sys/contrib/device-tree/src/arm/marvell/
H A Darmada-385-turris-omnia.dts1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
5 * Copyright (C) 2016 Uwe Kleine-König <uwe@kleine-koenig.org>
8 * Schematic available at https://www.turris.cz/doc/_media/rtrom01-schema.pdf
11 /dts-v1/;
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/input/input.h>
15 #include <dt-binding
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/freebsd/sys/contrib/device-tree/Bindings/sound/
H A Dmediatek,mt8188-afe.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/mediatek,mt8188-af
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H A Drenesas,rsnd.txt1 Renesas R-Car sound
7 Renesas R-Car and RZ/G sound is constructed from below modules
11 - SRC : Sampling Rate Converter
12 - CMD
13 - CTU : Channel Transfer Unit
14 - MIX : Mixer
15 - DVC : Digital Volume and Mute Function
22 * Multi channel
25 Multi channel is supported by Multi
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H A Dmt8195-afe-pcm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/mt8195-af
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H A Dcs35l36.txt5 - compatible : "cirrus,cs35l36"
7 - reg : the I2C address of the device for I2C
9 - VA-supply, VP-supply : power supplies for the device,
13 - cirrus,boost-ctl-millivolt : Boost Voltage Value. Configures the boost
18 - cirrus,boost-pea
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H A Dmchp-i2s-mcc.txt1 * Microchip I2S Multi-Channel Controller
4 - compatible: Should be "microchip,sam9x60-i2smcc".
5 - reg: Should be the physical base address of the controller and the
7 - interrupts: Should contain the interrupt for the controller.
8 - dmas: Should be one per channel name listed in the dma-names property,
9 as described in atmel-dma.txt and dma.txt files.
10 - dma-names: Identifier string for each DMA request line in the dmas property.
12 - clocks: Must contain an entry for each entry in clock-names.
13 Please refer to clock-bindings.txt.
14 - clock-names: Should be one of each entry matching the clocks phandles list:
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/freebsd/sys/contrib/device-tree/Bindings/display/
H A Dmulti-inno,mi0283qt.txt1 Multi-Inno MI0283QT display panel
4 - compatible: "multi-inno,mi0283qt".
7 all mandatory properties described in ../spi/spi-bus.txt must be specified.
10 - dc-gpios: D/C pin. The presence/absence of this GPIO determines
11 the panel interface mode (IM[3:0] pins):
12 - present: IM=x110 4-wire 8-bit data serial interface
13 - absent: IM=x101 3-wire 9-bit data serial interface
14 - reset-gpios: Reset pin
15 - power-supply: A regulator node for the supply voltage.
16 - backlight: phandle of the backlight device attached to the panel
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/freebsd/sys/contrib/device-tree/src/powerpc/
H A Dturris1x.dts1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright 2013 - 2022 CZ.NIC z.s.p.o. (http://www.nic.cz/)
8 * and available at: https://docs.turris.cz/hw/turris-1x/turris-1x/
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/leds/common.h>
14 /include/ "fsl/p2020si-pre.dtsi"
41 gpio-controller@18 {
45 #gpio-cells = <2>;
46 gpio-controller;
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/freebsd/sys/contrib/device-tree/Bindings/regulator/
H A Dact8945a-regulator.txt1 Device-Tree bindings for regulators of Active-semi ACT8945A Multi-Function Device
4 - compatible: "active-semi,act8945a", please refer to ../mfd/act8945a.txt.
7 - active-semi,vsel-high: Indicates if the VSEL pin is set to logic-high.
8 If this property is missing, assume the VSEL pin is set to logic-low.
11 - vp1-supply: The input supply for REG_DCDC1
12 - vp2-supply: The input supply for REG_DCDC2
13 - vp3-supply: The input supply for REG_DCDC3
14 - inl45-supply: The input supply for REG_LDO1 and REG_LDO2
15 - inl67-supply: The input supply for REG_LDO3 and REG_LDO4
18 regulator-initial-mode, regulator-allowed-modes and regulator-mode could be
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/freebsd/contrib/wpa/src/wps/
H A Dwps.h2 * Wi-Fi Protected Setup
3 * Copyright (c) 2007-2016, Jouni Malinen <j@w1.fi>
16 * enum wsc_op_code - EAP-WSC OP-Code values
34 * struct wps_credential - WPS Credential
71 * struct wps_device_data - WPS Device Data
73 * @device_name: Device Name (0..32 octets encoded in UTF-8)
74 * @manufacturer: Manufacturer (0..64 octets encoded in UTF-8)
75 * @model_name: Model Name (0..32 octets encoded in UTF-8)
76 * @model_number: Model Number (0..32 octets encoded in UTF-8)
77 * @serial_number: Serial Number (0..32 octets encoded in UTF-8)
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/freebsd/sys/contrib/device-tree/src/arm/microchip/
H A Dat91rm9200.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * at91rm9200.dtsi - Device Tree Include file for AT91RM9200 family SoC
12 #include <dt-bindings/pinctrl/at91.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-binding
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/freebsd/sys/contrib/device-tree/Bindings/memory-controllers/
H A Drenesas,rpc-if.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/memory-controller
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/freebsd/sys/contrib/device-tree/Bindings/leds/
H A Dleds-lp55xx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/leds/leds-lp55x
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/freebsd/sys/contrib/device-tree/Bindings/
H A Dtrivial-devices.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/trivial-devices.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
27 spi-ma
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/freebsd/contrib/wpa/hostapd/
H A DChangeLog3 2024-07-20 - v2.11
4 * Wi-Fi Easy Connect
5 - add support for DPP release 3
6 - allow Configurator parameters to be provided during config exchange
7 * HE/IEEE 802.11ax/Wi-Fi 6
8 - various fixes
9 * EHT/IEEE 802.11be/Wi-Fi 7
10 - add preliminary support
15 * support RADIUS ACL/PSK check during 4-way handshake (wpa_psk_radius=3)
16 * EAP-SIM/AKA: support IMSI privacy
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/freebsd/sys/dev/sound/pci/
H A Denvy24.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
29 /* -------------------------------------------------------------------- */
40 #define PCIR_MT 0x1c /* Professional Multi-Track I/O Base Address */
48 #define PCIM_LAC_MPU401 0x0008 /* MPU-401 I/O enable */
60 #define PCIM_LCC_MPUBASE 0x0006 /* MPU-401 base 300h-330h */
68 #define PCIM_SCFG_MPU 0x20 /* 1(0)/2(1) MPU-401 UART(s) */
71 #define PCIM_SCFG_ADC 0x0c /* 1-4 stereo ADC connected */
72 #define PCIM_SCFG_DAC 0x03 /* 1-4 stereo DAC connected */
74 #define PCIR_ACL 0x61 /* AC-Link Configuration Register */
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/freebsd/sys/dev/pcf/
H A Dpcfvar.h1 /*-
2 * SPDX-License-Identifier: BSD-2-Clause
39 #define LAB 0x02 /* lost arbitration bit in multi-master mode */
44 #define STS 0x20 /* STOP detected in slave receiver mode */
45 #define PIN 0x80 /* pending interrupt not (r/w) */ macro
81 #define PCF_LOCK(sc) mtx_lock(&(sc)->pcf_lock)
82 #define PCF_UNLOCK(sc) mtx_unlock(&(sc)->pcf_lock)
83 #define PCF_ASSERT_LOCKED(sc) mtx_assert(&(sc)->pcf_lock, MA_OWNED)
101 bus_write_1(sc->res_ioport, 0, data); in pcf_set_S0()
109 bus_write_1(sc->res_ioport, 1, data); in pcf_set_S1()
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/freebsd/share/misc/
H A Dscsi_modes1 # SCSI mode page data base.
35 # 'i' is a byte-sized integral types, followed by a field width of
38 # 'b' is a bit-sized integral type
39 # 't' is a bitfield type- followed by a bit field width
42 # 'z' values are null-padded strings
78 {Autoload Mode} t3
81 {Extended Self-Test Completion Time} i2
95 0x02 "Disconnect-Reconnect" {
111 0x16 "Extended Device-Type Specific";
154 0x18 "Protocol-Specific Logical Unit";
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/freebsd/sys/contrib/device-tree/Bindings/mfd/
H A Daspeed-lpc.txt2 Device tree bindings for the Aspeed Low Pin Count (LPC) Bus Controller
5 The LPC bus is a means to bridge a host CPU to a number of low-bandwidth
11 The LPC controller is represented as a multi-function device to account for the
16 * An LPC Host Controller: Manages LPC functions such as host vs slave mode, the
18 APB-to-LPC bridging amonst other functions.
21 as LPC firmware hub cycles, configuration of the LPC-to-AHB mapping, UART
33 [1] https://www.renesas.com/en-sg/doc/products/mpumcu/001/rej09b0078_h8s2168.pdf?key=7c888374547021…
34 …el.com/content/dam/www/public/us/en/documents/product-briefs/ipmi-second-gen-interface-spec-v2-rev…
40 - compatible: One of:
41 "aspeed,ast2400-lpc-v2", "simple-mfd", "syscon"
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