1*c66ec88fSEmmanuel Vadot* Microchip I2S Multi-Channel Controller 2*c66ec88fSEmmanuel Vadot 3*c66ec88fSEmmanuel VadotRequired properties: 4*c66ec88fSEmmanuel Vadot- compatible: Should be "microchip,sam9x60-i2smcc". 5*c66ec88fSEmmanuel Vadot- reg: Should be the physical base address of the controller and the 6*c66ec88fSEmmanuel Vadot length of memory mapped region. 7*c66ec88fSEmmanuel Vadot- interrupts: Should contain the interrupt for the controller. 8*c66ec88fSEmmanuel Vadot- dmas: Should be one per channel name listed in the dma-names property, 9*c66ec88fSEmmanuel Vadot as described in atmel-dma.txt and dma.txt files. 10*c66ec88fSEmmanuel Vadot- dma-names: Identifier string for each DMA request line in the dmas property. 11*c66ec88fSEmmanuel Vadot Two dmas have to be defined, "tx" and "rx". 12*c66ec88fSEmmanuel Vadot- clocks: Must contain an entry for each entry in clock-names. 13*c66ec88fSEmmanuel Vadot Please refer to clock-bindings.txt. 14*c66ec88fSEmmanuel Vadot- clock-names: Should be one of each entry matching the clocks phandles list: 15*c66ec88fSEmmanuel Vadot - "pclk" (peripheral clock) Required. 16*c66ec88fSEmmanuel Vadot - "gclk" (generated clock) Optional (1). 17*c66ec88fSEmmanuel Vadot 18*c66ec88fSEmmanuel VadotOptional properties: 19*c66ec88fSEmmanuel Vadot- pinctrl-0: Should specify pin control groups used for this controller. 20*c66ec88fSEmmanuel Vadot- princtrl-names: Should contain only one value - "default". 21*c66ec88fSEmmanuel Vadot 22*c66ec88fSEmmanuel Vadot 23*c66ec88fSEmmanuel Vadot(1) : Only the peripheral clock is required. The generated clock is optional 24*c66ec88fSEmmanuel Vadot and should be set mostly when Master Mode is required. 25*c66ec88fSEmmanuel Vadot 26*c66ec88fSEmmanuel VadotExample: 27*c66ec88fSEmmanuel Vadot 28*c66ec88fSEmmanuel Vadot i2s@f001c000 { 29*c66ec88fSEmmanuel Vadot compatible = "microchip,sam9x60-i2smcc"; 30*c66ec88fSEmmanuel Vadot reg = <0xf001c000 0x100>; 31*c66ec88fSEmmanuel Vadot interrupts = <34 IRQ_TYPE_LEVEL_HIGH 7>; 32*c66ec88fSEmmanuel Vadot dmas = <&dma0 33*c66ec88fSEmmanuel Vadot (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | 34*c66ec88fSEmmanuel Vadot AT91_XDMAC_DT_PERID(36))>, 35*c66ec88fSEmmanuel Vadot <&dma0 36*c66ec88fSEmmanuel Vadot (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | 37*c66ec88fSEmmanuel Vadot AT91_XDMAC_DT_PERID(37))>; 38*c66ec88fSEmmanuel Vadot dma-names = "tx", "rx"; 39*c66ec88fSEmmanuel Vadot clocks = <&i2s_clk>, <&i2s_gclk>; 40*c66ec88fSEmmanuel Vadot clock-names = "pclk", "gclk"; 41*c66ec88fSEmmanuel Vadot pinctrl-names = "default"; 42*c66ec88fSEmmanuel Vadot pinctrl-0 = <&pinctrl_i2s_default>; 43*c66ec88fSEmmanuel Vadot }; 44