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/linux/Documentation/devicetree/bindings/net/
H A Dnixge.txt4 - compatible: Should be "ni,xge-enet-3.00", but can be "ni,xge-enet-2.00" for
5 older device trees with DMA engines co-located in the address map,
7 - reg: Address and length of the register set for the device. It contains the
8 information of registers in the same order as described by reg-names.
9 - reg-names: Should contain the reg names
12 - interrupts: Should contain tx and rx interrupt
13 - interrupt-names: Should be "rx" and "tx"
14 - phy-mode: See ethernet.txt file in the same directory.
15 - nvmem-cells: Phandle of nvmem cell containing the MAC address
16 - nvmem-cell-names: Should be "address"
[all …]
H A Dasix,ax88796c.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Łukasz Stelmach <l.stelmach@samsung.com>
18 ../spi/spi-controller.yaml must be specified.
21 - $ref: ethernet-controller.yaml#
22 - $ref: /schemas/spi/spi-peripheral-props.yaml
31 spi-max-frequency:
32 maximum: 40000000
37 reset-gpios:
[all …]
/linux/arch/powerpc/boot/dts/fsl/
H A Dmpc8536ds.dtsi2 * MPC8536DS Device Tree Source stub (no addresses or top-level ranges)
37 #address-cells = <1>;
38 #size-cells = <1>;
39 compatible = "cfi-flash";
41 bank-width = <2>;
42 device-width = <1>;
46 label = "ramdisk-nor";
51 label = "diagnostic-nor";
52 read-only;
57 label = "dink-nor";
[all …]
/linux/arch/arm/boot/dts/socionext/
H A Dmilbeaut-m10v-evb.dts1 // SPDX-License-Identifier: GPL-2.0
3 /dts-v1/;
4 #include "milbeaut-m10v.dtsi"
8 compatible = "socionext,milbeaut-m10v-evb", "socionext,sc2000a";
16 stdout-path = "serial0:115200n8";
21 compatible = "fixed-clock";
22 #clock-cells = <0>;
23 clock-frequency = <40000000>;
27 memory@40000000 {
/linux/arch/arm/boot/dts/arm/
H A Dvexpress-v2p-ca15-tc1.dts1 // SPDX-License-Identifier: GPL-2.0
6 * Cortex-A15 MPCore (V2P-CA15)
8 * HBI-0237A
11 /dts-v1/;
12 #include "vexpress-v2m-rs1.dtsi"
15 model = "V2P-CA15";
18 compatible = "arm,vexpress,v2p-ca15,tc1", "arm,vexpress,v2p-ca15", "arm,vexpress";
19 interrupt-parent = <&gic>;
20 #address-cells = <2>;
21 #size-cells = <2>;
[all …]
/linux/Documentation/devicetree/bindings/mtd/
H A Dlpc32xx-slc.txt4 - compatible: "nxp,lpc3220-slc"
5 - reg: Address and size of the controller
6 - nand-on-flash-bbt: Use bad block table on flash
7 - gpios: GPIO specification for NAND write protect
11 - nxp,wdr-clks: Delay before Ready signal is tested on write (W_RDY)
12 - nxp,rdr-clks: Delay before Ready signal is tested on read (R_RDY)
15 - nxp,wwidth: Write pulse width (W_WIDTH)
16 - nxp,whold: Write hold time (W_HOLD)
17 - nxp,wsetup: Write setup time (W_SETUP)
18 - nxp,rwidth: Read pulse width (R_WIDTH)
[all …]
H A Datmel-nand.txt4 Documentation/devicetree/bindings/memory-controllers/atmel,ebi.txt).
11 - compatible: should be one of the following
12 "atmel,at91rm9200-nand-controller"
13 "atmel,at91sam9260-nand-controller"
14 "atmel,at91sam9261-nand-controller"
15 "atmel,at91sam9g45-nand-controller"
16 "atmel,sama5d3-nand-controller"
17 "microchip,sam9x60-nand-controller"
18 - ranges: empty ranges property to forward EBI ranges definitions.
19 - #address-cells: should be set to 2.
[all …]
/linux/arch/arm/boot/dts/nxp/mxs/
H A Dimx28-sps1.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
6 /dts-v1/;
11 compatible = "schulercontrol,imx28-sps1", "fsl,imx28";
13 memory@40000000 {
18 reg_usb0_vbus: regulator-0 {
19 compatible = "regulator-fixed";
20 regulator-name = "usb0_vbus";
21 regulator-min-microvolt = <5000000>;
22 regulator-max-microvolt = <5000000>;
27 #address-cells = <1>;
[all …]
/linux/Documentation/devicetree/bindings/net/can/
H A Dxilinx,can.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Appana Durga Kedareswara rao <appana.durga.rao@xilinx.com>
16 - xlnx,zynq-can-1.0
17 - xlnx,axi-can-1.00.a
18 - xlnx,canfd-1.0
19 - xlnx,canfd-2.0
31 clock-names:
34 power-domains:
[all …]
/linux/arch/arm64/boot/dts/arm/
H A Dvexpress-v2f-1xv7-ca53x2.dts1 // SPDX-License-Identifier: GPL-2.0
6 * V2F-1XV7
8 * Cortex-A53 (2 cores) Soft Macrocell Model
10 * HBI-0247C
13 /dts-v1/;
15 #include <dt-bindings/interrupt-controller/arm-gic.h>
16 #include "arm/arm/vexpress-v2m-rs1.dtsi"
19 model = "V2F-1XV7 Cortex-A53x2 SMM";
22 compatible = "arm,vexpress,v2f-1xv7,ca53x2", "arm,vexpress,v2f-1xv7", "arm,vexpress";
23 interrupt-parent = <&gic>;
[all …]
/linux/Documentation/devicetree/bindings/pci/
H A Dv3-v360epc-pci.txt6 - compatible: should be one of:
7 "v3,v360epc-pci"
8 "arm,integrator-ap-pci", "v3,v360epc-pci"
9 - reg: should contain two register areas:
12 - interrupts: should contain a reference to the V3 error interrupt
14 - bus-range: see pci.txt
15 - ranges: this follows the standard PCI bindings in the IEEE Std
16 1275-1994 (see pci.txt) with the following restriction:
17 - The non-prefetchable and prefetchable memory windows must
19 - The prefetchable memory window must be immediately adjacent
[all …]
/linux/arch/mips/boot/dts/ralink/
H A Dgardena_smart_gateway_mt7688.dts1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
14 compatible = "gardena,smart-gateway-mt7688", "ralink,mt7688a-soc",
15 "ralink,mt7628a-soc";
23 gpio-keys {
24 compatible = "gpio-keys";
26 pinctrl-names = "default";
27 pinctrl-0 = <&pinmux_gpio_gpio>; /* GPIO11 */
[all …]
/linux/arch/arm/boot/dts/nxp/lpc/
H A Dlpc3250-phy3250.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * PHYTEC phyCORE-LPC3250 board
5 * Copyright (C) 2015-2019 Vladimir Zapolskiy <vz@mleia.com>
9 /dts-v1/;
13 model = "PHYTEC phyCORE-LPC3250 board based on NXP LPC3250";
22 compatible = "gpio-leds";
26 default-state = "off";
31 linux,default-trigger = "heartbeat";
37 power-supply = <&reg_lcd>;
41 remote-endpoint = <&cldc_output>;
[all …]
/linux/drivers/media/firewire/
H A Dfiredtv-fe.c1 // SPDX-License-Identifier: GPL-2.0-or-later
21 struct firedtv *fdtv = fe->sec_priv; in fdtv_dvb_init()
24 /* FIXME - allocate free channel at IRM */ in fdtv_dvb_init()
25 fdtv->isochannel = fdtv->adapter.num; in fdtv_dvb_init()
27 err = cmp_establish_pp_connection(fdtv, fdtv->subunit, in fdtv_dvb_init()
28 fdtv->isochannel); in fdtv_dvb_init()
30 dev_err(fdtv->device, in fdtv_dvb_init()
40 struct firedtv *fdtv = fe->sec_priv; in fdtv_sleep()
43 cmp_break_pp_connection(fdtv, fdtv->subunit, fdtv->isochannel); in fdtv_sleep()
44 fdtv->isochannel = -1; in fdtv_sleep()
[all …]
/linux/arch/arm64/boot/dts/mediatek/
H A Dmt7981b-xiaomi-ax3000t.dts1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 /dts-v1/;
11 memory@40000000 {
H A Dmt7981b-openwrt-one.dts1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
3 /dts-v1/;
11 memory@40000000 {
H A Dmt8516-pumpkin.dts1 // SPDX-License-Identifier: GPL-2.0
7 /dts-v1/;
10 #include "pumpkin-common.dtsi"
16 memory@40000000 {
H A Dmt8167-pumpkin.dts1 // SPDX-License-Identifier: GPL-2.0
7 /dts-v1/;
10 #include "pumpkin-common.dtsi"
14 chassis-type = "embedded";
15 compatible = "mediatek,mt8167-pumpkin", "mediatek,mt8167";
17 memory@40000000 {
H A Dmt6755-evb.dts1 // SPDX-License-Identifier: GPL-2.0-only
7 /dts-v1/;
12 chassis-type = "embedded";
13 compatible = "mediatek,mt6755-evb", "mediatek,mt6755";
19 memory@40000000 {
25 stdout-path = "serial0:921600n8";
H A Dmt6779-evb.dts1 // SPDX-License-Identifier: GPL-2.0+
8 /dts-v1/;
13 chassis-type = "embedded";
14 compatible = "mediatek,mt6779-evb", "mediatek,mt6779";
20 memory@40000000 {
26 stdout-path = "serial0:921600n8";
/linux/arch/arm/boot/dts/hpe/
H A Dhpe-bmc-dl360gen10.dts1 // SPDX-License-Identifier: GPL-2.0
6 /include/ "hpe-gxp.dtsi"
9 #address-cells = <1>;
10 #size-cells = <1>;
11 compatible = "hpe,gxp-dl360gen10", "hpe,gxp";
19 stdout-path = "serial0:115200n8";
22 memory@40000000 {
/linux/arch/arm/boot/dts/microchip/
H A Dsama7g5.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * sama7g5.dtsi - Device Tree Include file for SAMA7G5 family SoC
12 #include <dt-bindings/iio/adc/at91-sama5d2_adc.h>
13 #include <dt-bindings/interrupt-controller/irq.h>
14 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 #include <dt-bindings/clock/at91.h>
16 #include <dt-bindings/dma/at91.h>
17 #include <dt-bindings/gpio/gpio.h>
18 #include <dt-bindings/mfd/at91-usart.h>
19 #include <dt-bindings/nvmem/microchip,sama7g5-otpc.h>
[all …]
/linux/arch/arm/boot/dts/samsung/
H A Dexynos4412-i9305.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
3 #include "exynos4412-galaxy-s3.dtsi"
6 model = "Samsung Galaxy S3 (GT-I9305) based on Exynos4412";
8 chassis-type = "handset";
12 memory@40000000 {
20 samsung,pins = "gpd1-1", "gpd1-0";
H A Dexynos4412-odroidx2.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Hardkernel's Exynos4412 based ODROID-X2 board device tree source
7 * Device tree source file for Hardkernel's ODROID-X2 board which is based
11 #include "exynos4412-odroidx.dts"
12 #include "exynos4412-prime.dtsi"
15 model = "Hardkernel ODROID-X2 board based on Exynos4412";
16 compatible = "hardkernel,odroid-x2", "samsung,exynos4412", "samsung,exynos4";
18 memory@40000000 {
/linux/arch/arm/boot/dts/st/
H A Dstih407-b2120.dts1 // SPDX-License-Identifier: GPL-2.0-only
6 /dts-v1/;
8 #include "stihxxx-b2120.dtsi"
11 compatible = "st,stih407-b2120", "st,stih407";
14 stdout-path = &sbc_serial0;
17 memory@40000000 {

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