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/linux/Documentation/userspace-api/media/v4l/
H A Dpixfmt-rgb.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _pixfmt-rgb:
22 (including capture queues of mem-to-mem devices) fill the alpha component in
25 but can set the alpha bit to a user-configurable value, the
26 :ref:`V4L2_CID_ALPHA_COMPONENT <v4l2-alpha-component>` control is used to
31 :ref:`Output <output>` devices (including output queues of mem-to-mem devices
44 - In all the tables that follow, bit 7 is the most significant bit in a byte.
45 - 'r', 'g' and 'b' denote bits of the red, green and blue components
54 based on the order of the RGB components as seen in a 8-, 16- or 32-bit word,
57 for each component. For instance, the RGB565 format stores a pixel in a 16-bit
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H A Dpixfmt-srggb10-ipu3.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _v4l2-pix-fmt-ipu3-sbggr10:
4 .. _v4l2-pix-fmt-ipu3-sgbrg10:
5 .. _v4l2-pix-fmt-ipu3-sgrbg10:
6 .. _v4l2-pix-fmt-ipu3-srggb10:
13 10-bit Bayer formats
24 In other respects this format is similar to :ref:`V4L2-PIX-FMT-SRGGB10`.
36 .. flat-table::
38 * - start + 0:
39 - B\ :sub:`0000low`
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H A Dpixfmt-srggb14p.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _V4L2-PIX-FMT-SRGGB14P:
4 .. _v4l2-pix-fmt-sbggr14p:
5 .. _v4l2-pix-fmt-sgbrg14p:
6 .. _v4l2-pix-fmt-sgrbg14p:
12 *man V4L2_PIX_FMT_SRGGB14P(2)*
17 14-bit packed Bayer formats
29 Each n-pixel row contains n/2 green samples and n/2 blue or red samples,
30 with alternating green-red and green-blue rows. They are conventionally
41 \setlength{\tabcolsep}{2pt}
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H A Dsubdev-image-processing-full.svg1 <?xml version="1.0" encoding="UTF-8" standalone="no"?>
2 <!-- SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later -->
6 xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#"
9 xmlns:sodipodi="http://sodipodi.sourceforge.net/DTD/sodipodi-0.dtd"
13 viewBox="-186 71 1174.5119 332.1463"
17 sodipodi:docname="subdev-image-processing-full.svg">
40 inkscape:pageshadow="2"
41 inkscape:window-width="1920"
42 inkscape:window-height="997"
45 fit-margin-top="0"
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H A Dsubdev-image-processing-scaling-multi-source.svg1 <?xml version="1.0" encoding="UTF-8" standalone="no"?>
2 <!-- SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later -->
6 xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#"
9 xmlns:sodipodi="http://sodipodi.sourceforge.net/DTD/sodipodi-0.dtd"
13 viewBox="-194 128 1175.0698 319.59442"
17 sodipodi:docname="subdev-image-processing-scaling-multi-source.svg">
40 inkscape:pageshadow="2"
41 inkscape:window-width="1920"
42 inkscape:window-height="997"
45 fit-margin-top="0"
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H A Dpixfmt-srggb10p.rst1 .. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later
3 .. _V4L2-PIX-FMT-SRGGB10P:
4 .. _v4l2-pix-fmt-sbggr10p:
5 .. _v4l2-pix-fmt-sgbrg10p:
6 .. _v4l2-pix-fmt-sgrbg10p:
16 10-bit packed Bayer formats
25 of the pixels, and the 5th byte contains the 2 least significants
28 Each n-pixel row contains n/2 green samples and n/2 blue or red samples,
29 with alternating green-red and green-blue rows. They are conventionally
38 .. flat-table::
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H A Dmt2110t.svg1 <?xml version="1.0" encoding="UTF-8"?>
2 <!-- SPDX-License-Identifier: GPL-2.0 OR GFDL-1.1-no-invariants-or-later -->
3 <!DOCTYPE svg PUBLIC "-//W3C//DTD SVG 1.1//EN" "http://www.w3.org/Graphics/SVG/1.1/DTD/svg11.dtd">
4 …-rule="evenodd" stroke-width="28.222" stroke-linejoin="round" xmlns="http://www.w3.org/2000/svg" x…
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15 …<font-face font-family="Liberation Sans embedded" units-per-em="2048" font-weight="normal" font-st…
16 <missing-glyph horiz-adv-x="2048" d="M 0,0 L 2047,0 2047,2047 0,2047 0,0 Z"/>
17 …-adv-x="1033" d="M 191,-425 C 142,-425 100,-421 67,-414 L 67,-279 C 92,-283 120,-285 151,-285 263,…
18 …<glyph unicode="x" horiz-adv-x="1006" d="M 801,0 L 510,444 217,0 23,0 408,556 41,1082 240,1082 510…
19 …glyph unicode="w" horiz-adv-x="1509" d="M 1174,0 L 965,0 776,765 740,934 C 734,904 725,861 712,805…
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H A Dcrop.svg1 <?xml version="1.0" encoding="UTF-8" standalone="no"?>
2 <!-- SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later -->
6 xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#"
9 xmlns:sodipodi="http://sodipodi.sourceforge.net/DTD/sodipodi-0.dtd"
25 ….48 8.19,17.01 -46.93,23.31 29.61,-25.515 -38.12,8.505 47.25,-23.31 z m -1559.25,800.73 -8.5,-17.0…
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28 style="clip-rule:evenodd" /></clipPath><clipPath
31 …-1626 -1,0 0,1 -2,0 0,1 -2,0 0,1 -2,0 0,1 -2,0 0,1 -2,0 0,1 -2,0 0,1 -2,0 0,1 -2,0 0,1 -2,0 0,1 -2…
32 -1,0 0,1 -1,0 0,1 -1,0 0,1 -2,0 0,1 -1,0 0,2 2,0 0,-1 4,0 0,-1 5,0 0,-1 4,0 0,-1 5,0 0,-1 5,0 0,-1 …
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/linux/drivers/net/wireless/realtek/rtlwifi/rtl8821ae/
H A Dtable.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2009-2010 Realtek Corporation.*/
2898 "FCC", "2.4G", "20M", "CCK", "1T", "01", "36",
2899 "ETSI", "2.4G", "20M", "CCK", "1T", "01", "32",
2900 "MKK", "2.4G", "20M", "CCK", "1T", "01", "32",
2901 "FCC", "2.4G", "20M", "CCK", "1T", "02", "36",
2902 "ETSI", "2.4G", "20M", "CCK", "1T", "02", "32",
2903 "MKK", "2.4G", "20M", "CCK", "1T", "02", "32",
2904 "FCC", "2.4G", "20M", "CCK", "1T", "03", "36",
2905 "ETSI", "2.4G", "20M", "CCK", "1T", "03", "32",
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/linux/drivers/gpu/drm/exynos/
H A Dregs-gsc.h1 /* SPDX-License-Identifier: GPL-2.0-only */
2 /* linux/drivers/gpu/drm/exynos/regs-gsc.h
7 * Register definition file for Samsung G-Scaler driver
13 /* G-Scaler enable */
29 #define GSC_ENABLE_OP_STATUS (1 << 2)
33 /* G-Scaler S/W reset */
37 /* G-Scaler IRQ */
41 #define GSC_IRQ_OR_MASK (1 << 2)
45 /* G-Scaler input control */
57 #define GSC_IN_ROT_YFLIP (2 << 16)
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/linux/Documentation/admin-guide/media/
H A Dipu6_isys_graph.svg1 <?xml version="1.0" encoding="UTF-8" standalone="no"?>
2 <!DOCTYPE svg PUBLIC "-//W3C//DTD SVG 1.1//EN"
4 <!-- Generated by graphviz version 2.43.0 (0)
5 -->
6 <!-- Title: board Pages: 1 -->
9 <g id="graph0" class="graph" transform="scale(1 1) rotate(0) translate(4 1469)">
11 <polygon fill="white" stroke="transparent" points="-4,4 -4,-1469 1699,-1469 1699,4 -4,4"/>
12 <!-- n00000001 -->
13 <g id="node1" class="node">
15 …n fill="yellow" stroke="black" points="832.99,-750.08 629.99,-750.08 629.99,-712.08 832.99,-712.08…
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/linux/drivers/media/platform/samsung/exynos-gsc/
H A Dgsc-regs.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (c) 2011 - 2012 Samsung Electronics Co., Ltd.
6 * Register definition file for Samsung G-Scaler driver
12 /* G-Scaler enable */
14 #define GSC_ENABLE_OP_STATUS (1 << 2)
18 /* G-Scaler S/W reset */
22 /* G-Scaler IRQ */
29 /* G-Scaler input control */
37 #define GSC_IN_ROT_YFLIP (2 << 16)
41 #define GSC_IN_RGB_HD_WIDE (2 << 14)
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/linux/arch/x86/crypto/
H A Dsm3-avx-asm_64.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
4 * specified in: https://datatracker.ietf.org/doc/html/draft-sca-cfrg-sm3-02
34 #define K1 -208106958 /* 0xf3988a32 */
35 #define K2 -416213915 /* 0xe7311465 */
36 #define K3 -832427829 /* 0xce6228cb */
37 #define K4 -1664855657 /* 0x9cc45197 */
40 #define K7 -433943364 /* 0xe6228cbc */
41 #define K8 -867886727 /* 0xcc451979 */
42 #define K9 -1735773453 /* 0x988a32f3 */
45 #define K12 -1001285732 /* 0xc451979c */
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H A Dsha256-avx2-asm.S2 # Implement fast SHA-256 with AVX2 instructions. (x86_64)
13 # General Public License (GPL) Version 2, available from the file
21 # - Redistributions of source code must retain the above
25 # - Redistributions in binary form must reproduce the above
41 # This code is described in an Intel White-Paper:
42 # "Fast SHA-256 Implementations on Intel Architecture Processors"
48 # This code schedules 2 blocks at a time, with 4 lanes per block
60 # Add reg to mem using reg-mem add and store
87 SHUF_00BA = %ymm10 # shuffle xBxA -> 00BA
88 SHUF_DC00 = %ymm12 # shuffle xDxC -> DC00
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H A Dsha256-ssse3-asm.S2 # Implement fast SHA-256 with SSSE3 instructions. (x86_64)
13 # General Public License (GPL) Version 2, available from the file
21 # - Redistributions of source code must retain the above
25 # - Redistributions in binary form must reproduce the above
41 # This code is described in an Intel White-Paper:
42 # "Fast SHA-256 Implementations on Intel Architecture Processors"
58 # Add reg to mem using reg-mem add and store
87 SHUF_00BA = %xmm10 # shuffle xBxA -> 00BA
88 SHUF_DC00 = %xmm11 # shuffle xDxC -> DC00
92 INP = %rsi # 2nd arg
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H A Dsha256-avx-asm.S2 # Implement fast SHA-256 with AVX1 instructions. (x86_64)
13 # General Public License (GPL) Version 2, available from the file
21 # - Redistributions of source code must retain the above
25 # - Redistributions in binary form must reproduce the above
40 # This code is described in an Intel White-Paper:
41 # "Fast SHA-256 Implementations on Intel Architecture Processors"
59 # Add reg to mem using reg-mem add and store
67 shld $(32-(\p1)), \p2, \p2
94 SHUF_00BA = %xmm10 # shuffle xBxA -> 00BA
95 SHUF_DC00 = %xmm12 # shuffle xDxC -> DC00
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H A Dsha512-avx2-asm.S2 # Implement fast SHA-512 with AVX2 instructions. (x86_64)
14 # General Public License (GPL) Version 2, available from the file
22 # - Redistributions of source code must retain the above
26 # - Redistributions in binary form must reproduce the above
42 # This code is described in an Intel White-Paper:
43 # "Fast SHA-512 Implementations on Intel Architecture Processors"
75 # 2nd arg
91 g = %r10 define
118 # Add reg to mem using reg-mem add and store
146 h = g
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/linux/drivers/iio/accel/
H A Dbma400.h1 /* SPDX-License-Identifier: GPL-2.0-only */
16 * Read-Only Registers
63 * Read-write configuration registers
105 #define BMA400_INT_GEN1_MSK BIT(2)
112 #define BMA400_S_TAP_MSK BIT(2)
116 #define BMA400_TAP_SEN_MSK GENMASK(2, 0)
118 #define BMA400_TAP_QUIET_MSK GENMASK(3, 2)
123 * BMA400_SCALE_MIN macro value represents m/s^2 for 1 LSB before
124 * converting to micro values for +-2g range.
126 * For +-2g - 1 LSB = 0.976562 milli g = 0.009576 m/s^2
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/linux/drivers/staging/most/dim2/
H A Dhal.c1 // SPDX-License-Identifier: GPL-2.0
3 * hal.c - DIM2 HAL implementation
6 * Copyright (C) 2015-2016, Microchip Technology Germany II GmbH & Co. KG
25 * Number of 32-bit units for DBR map.
28 * 2: block size is 256, max allocation is 8K
30 * 8: block size is 64, max allocation is 2K
35 #define DBR_MAP_SIZE 2
37 /* -------------------------------------------------------------------------- */
50 /* -------------------------------------------------------------------------- */
64 /* -------------------------------------------------------------------------- */
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/linux/drivers/staging/vc04_services/vchiq-mmal/
H A Dmmal-encodings.h1 /* SPDX-License-Identifier: GPL-2.0 */
16 #define MMAL_ENCODING_H264 MMAL_FOURCC('H', '2', '6', '4')
17 #define MMAL_ENCODING_H263 MMAL_FOURCC('H', '2', '6', '3')
19 #define MMAL_ENCODING_MP2V MMAL_FOURCC('M', 'P', '2', 'V')
22 #define MMAL_ENCODING_WMV2 MMAL_FOURCC('W', 'M', 'V', '2')
30 #define MMAL_ENCODING_MJPEG MMAL_FOURCC('M', 'J', 'P', 'G')
32 #define MMAL_ENCODING_JPEG MMAL_FOURCC('J', 'P', 'E', 'G')
33 #define MMAL_ENCODING_GIF MMAL_FOURCC('G', 'I', 'F', ' ')
34 #define MMAL_ENCODING_PNG MMAL_FOURCC('P', 'N', 'G', ' ')
36 #define MMAL_ENCODING_TGA MMAL_FOURCC('T', 'G', 'A', ' ')
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/linux/drivers/gpu/drm/msm/dp/
H A Ddp_utils.c1 /* SPDX-License-Identifier: GPL-2.0-only */
15 u8 g[4]; in msm_dp_utils_get_g0_value() local
22 g[0] = c[3]; in msm_dp_utils_get_g0_value()
23 g[1] = c[0] ^ c[3]; in msm_dp_utils_get_g0_value()
24 g[2] = c[1]; in msm_dp_utils_get_g0_value()
25 g[3] = c[2]; in msm_dp_utils_get_g0_value()
28 ret_data = ((g[i] & 0x01) << i) | ret_data; in msm_dp_utils_get_g0_value()
36 u8 g[4]; in msm_dp_utils_get_g1_value() local
43 g[0] = c[0] ^ c[3]; in msm_dp_utils_get_g1_value()
44 g[1] = c[0] ^ c[1] ^ c[3]; in msm_dp_utils_get_g1_value()
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/linux/include/dt-bindings/memory/
H A Dmt8186-memory-port.h1 /* SPDX-License-Identifier: GPL-2.0-only */
11 #include <dt-bindings/memory/mtk-memory-port.h>
15 * 0 ~ 4G; 4G ~ 8G; 8G ~ 12G; 12G ~ 16G, we could adjust these masters
18 * b) The iova of any master can NOT cross the 4G/8G/12G boundary.
22 * modules dma-address-region larbs-ports
23 * disp 0 ~ 4G larb0/1/2
24 * vcodec 4G ~ 8G larb4/7
25 * cam/mdp 8G ~ 12G the other larbs.
26 * N/A 12G ~ 16G
32 /* LARB 0 -- MMSYS */
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/linux/arch/powerpc/crypto/
H A Dsha256-spe-asm.S1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Fast SHA-256 implementation for SPE instruction set (PPC)
14 #include <asm/asm-offsets.h>
48 stwu r1,-128(r1); /* create stack frame */ \
101 #define R_LOAD_W(a, b, c, d, e, f, g, h, w, off) \ argument
109 andc rT1,g,e; /* 1: ch' = ~e and g */ \
114 rotrwi rT0,a,2; /* 1: S0 = a rotr 2 */ \
126 LOAD_DATA(w, off+4) /* 2: W */ \
128 rotrwi rT0,d,6; /* 2: S1 = e rotr 6 */ \
130 rotrwi rT1,d,11; /* 2: S1' = e rotr 11 */ \
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/linux/drivers/net/ethernet/brocade/bna/
H A Dbfa_defs_mfg_comm.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Linux network driver for QLogic BR-series Converged Network Adapter.
6 * Copyright (c) 2005-2014 Brocade Communications Systems, Inc.
7 * Copyright (c) 2014-2015 QLogic Corporation
21 #define BFA_MFG_ENC_VER 2
35 BFA_MFG_TYPE_FC8P2 = 825, /*!< 8G 2port FC card */
36 BFA_MFG_TYPE_FC8P1 = 815, /*!< 8G 1port FC card */
37 BFA_MFG_TYPE_FC4P2 = 425, /*!< 4G 2port FC card */
38 BFA_MFG_TYPE_FC4P1 = 415, /*!< 4G 1port FC card */
39 BFA_MFG_TYPE_CNA10P2 = 1020, /*!< 10G 2port CNA card */
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/linux/Documentation/input/devices/
H A Dcma3000_d0x.rst1 CMA3000-D0x Accelerometer
5 * VTI CMA3000-D0x
8 CMA3000-D0X Product Family Specification 8281000A.02.pdf
15 -----------
17 CMA3000 Tri-axis accelerometer supports Motion detect, Measurement and
33 which includes time and g value. Refer product specifications for
47 -------------
59 G range in milli g i.e 2000 or 8000
65 Motion detect g range threshold value
71 Free fall g range threshold value
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