1 // SPDX-License-Identifier: MIT
2 /*
3 * Copyright © 2021 Intel Corporation
4 */
5
6 #include "xe_exec_queue.h"
7
8 #include <linux/nospec.h>
9
10 #include <drm/drm_device.h>
11 #include <drm/drm_drv.h>
12 #include <drm/drm_file.h>
13 #include <drm/drm_syncobj.h>
14 #include <uapi/drm/xe_drm.h>
15
16 #include "xe_dep_scheduler.h"
17 #include "xe_device.h"
18 #include "xe_gt.h"
19 #include "xe_gt_sriov_vf.h"
20 #include "xe_hw_engine_class_sysfs.h"
21 #include "xe_hw_engine_group.h"
22 #include "xe_hw_fence.h"
23 #include "xe_irq.h"
24 #include "xe_lrc.h"
25 #include "xe_macros.h"
26 #include "xe_migrate.h"
27 #include "xe_pm.h"
28 #include "xe_ring_ops_types.h"
29 #include "xe_trace.h"
30 #include "xe_vm.h"
31 #include "xe_pxp.h"
32
33 /**
34 * DOC: Execution Queue
35 *
36 * An Execution queue is an interface for the HW context of execution.
37 * The user creates an execution queue, submits the GPU jobs through those
38 * queues and in the end destroys them.
39 *
40 * Execution queues can also be created by XeKMD itself for driver internal
41 * operations like object migration etc.
42 *
43 * An execution queue is associated with a specified HW engine or a group of
44 * engines (belonging to the same tile and engine class) and any GPU job
45 * submitted on the queue will be run on one of these engines.
46 *
47 * An execution queue is tied to an address space (VM). It holds a reference
48 * of the associated VM and the underlying Logical Ring Context/s (LRC/s)
49 * until the queue is destroyed.
50 *
51 * The execution queue sits on top of the submission backend. It opaquely
52 * handles the GuC and Execlist backends whichever the platform uses, and
53 * the ring operations the different engine classes support.
54 */
55
56 enum xe_exec_queue_sched_prop {
57 XE_EXEC_QUEUE_JOB_TIMEOUT = 0,
58 XE_EXEC_QUEUE_TIMESLICE = 1,
59 XE_EXEC_QUEUE_PREEMPT_TIMEOUT = 2,
60 XE_EXEC_QUEUE_SCHED_PROP_MAX = 3,
61 };
62
63 static int exec_queue_user_extensions(struct xe_device *xe, struct xe_exec_queue *q,
64 u64 extensions, int ext_number);
65
__xe_exec_queue_free(struct xe_exec_queue * q)66 static void __xe_exec_queue_free(struct xe_exec_queue *q)
67 {
68 int i;
69
70 for (i = 0; i < XE_EXEC_QUEUE_TLB_INVAL_COUNT; ++i)
71 if (q->tlb_inval[i].dep_scheduler)
72 xe_dep_scheduler_fini(q->tlb_inval[i].dep_scheduler);
73
74 if (xe_exec_queue_uses_pxp(q))
75 xe_pxp_exec_queue_remove(gt_to_xe(q->gt)->pxp, q);
76 if (q->vm)
77 xe_vm_put(q->vm);
78
79 if (q->xef)
80 xe_file_put(q->xef);
81
82 kfree(q);
83 }
84
alloc_dep_schedulers(struct xe_device * xe,struct xe_exec_queue * q)85 static int alloc_dep_schedulers(struct xe_device *xe, struct xe_exec_queue *q)
86 {
87 struct xe_tile *tile = gt_to_tile(q->gt);
88 int i;
89
90 for (i = 0; i < XE_EXEC_QUEUE_TLB_INVAL_COUNT; ++i) {
91 struct xe_dep_scheduler *dep_scheduler;
92 struct xe_gt *gt;
93 struct workqueue_struct *wq;
94
95 if (i == XE_EXEC_QUEUE_TLB_INVAL_PRIMARY_GT)
96 gt = tile->primary_gt;
97 else
98 gt = tile->media_gt;
99
100 if (!gt)
101 continue;
102
103 wq = gt->tlb_inval.job_wq;
104
105 #define MAX_TLB_INVAL_JOBS 16 /* Picking a reasonable value */
106 dep_scheduler = xe_dep_scheduler_create(xe, wq, q->name,
107 MAX_TLB_INVAL_JOBS);
108 if (IS_ERR(dep_scheduler))
109 return PTR_ERR(dep_scheduler);
110
111 q->tlb_inval[i].dep_scheduler = dep_scheduler;
112 }
113 #undef MAX_TLB_INVAL_JOBS
114
115 return 0;
116 }
117
__xe_exec_queue_alloc(struct xe_device * xe,struct xe_vm * vm,u32 logical_mask,u16 width,struct xe_hw_engine * hwe,u32 flags,u64 extensions)118 static struct xe_exec_queue *__xe_exec_queue_alloc(struct xe_device *xe,
119 struct xe_vm *vm,
120 u32 logical_mask,
121 u16 width, struct xe_hw_engine *hwe,
122 u32 flags, u64 extensions)
123 {
124 struct xe_exec_queue *q;
125 struct xe_gt *gt = hwe->gt;
126 int err;
127
128 /* only kernel queues can be permanent */
129 XE_WARN_ON((flags & EXEC_QUEUE_FLAG_PERMANENT) && !(flags & EXEC_QUEUE_FLAG_KERNEL));
130
131 q = kzalloc(struct_size(q, lrc, width), GFP_KERNEL);
132 if (!q)
133 return ERR_PTR(-ENOMEM);
134
135 kref_init(&q->refcount);
136 q->flags = flags;
137 q->hwe = hwe;
138 q->gt = gt;
139 q->class = hwe->class;
140 q->width = width;
141 q->msix_vec = XE_IRQ_DEFAULT_MSIX;
142 q->logical_mask = logical_mask;
143 q->fence_irq = >->fence_irq[hwe->class];
144 q->ring_ops = gt->ring_ops[hwe->class];
145 q->ops = gt->exec_queue_ops;
146 INIT_LIST_HEAD(&q->lr.link);
147 INIT_LIST_HEAD(&q->multi_gt_link);
148 INIT_LIST_HEAD(&q->hw_engine_group_link);
149 INIT_LIST_HEAD(&q->pxp.link);
150
151 q->sched_props.timeslice_us = hwe->eclass->sched_props.timeslice_us;
152 q->sched_props.preempt_timeout_us =
153 hwe->eclass->sched_props.preempt_timeout_us;
154 q->sched_props.job_timeout_ms =
155 hwe->eclass->sched_props.job_timeout_ms;
156 if (q->flags & EXEC_QUEUE_FLAG_KERNEL &&
157 q->flags & EXEC_QUEUE_FLAG_HIGH_PRIORITY)
158 q->sched_props.priority = XE_EXEC_QUEUE_PRIORITY_KERNEL;
159 else
160 q->sched_props.priority = XE_EXEC_QUEUE_PRIORITY_NORMAL;
161
162 if (q->flags & (EXEC_QUEUE_FLAG_MIGRATE | EXEC_QUEUE_FLAG_VM)) {
163 err = alloc_dep_schedulers(xe, q);
164 if (err) {
165 __xe_exec_queue_free(q);
166 return ERR_PTR(err);
167 }
168 }
169
170 if (vm)
171 q->vm = xe_vm_get(vm);
172
173 if (extensions) {
174 /*
175 * may set q->usm, must come before xe_lrc_create(),
176 * may overwrite q->sched_props, must come before q->ops->init()
177 */
178 err = exec_queue_user_extensions(xe, q, extensions, 0);
179 if (err) {
180 __xe_exec_queue_free(q);
181 return ERR_PTR(err);
182 }
183 }
184
185 return q;
186 }
187
__xe_exec_queue_init(struct xe_exec_queue * q,u32 exec_queue_flags)188 static int __xe_exec_queue_init(struct xe_exec_queue *q, u32 exec_queue_flags)
189 {
190 int i, err;
191 u32 flags = 0;
192
193 /*
194 * PXP workloads executing on RCS or CCS must run in isolation (i.e. no
195 * other workload can use the EUs at the same time). On MTL this is done
196 * by setting the RUNALONE bit in the LRC, while starting on Xe2 there
197 * is a dedicated bit for it.
198 */
199 if (xe_exec_queue_uses_pxp(q) &&
200 (q->class == XE_ENGINE_CLASS_RENDER || q->class == XE_ENGINE_CLASS_COMPUTE)) {
201 if (GRAPHICS_VER(gt_to_xe(q->gt)) >= 20)
202 flags |= XE_LRC_CREATE_PXP;
203 else
204 flags |= XE_LRC_CREATE_RUNALONE;
205 }
206
207 if (!(exec_queue_flags & EXEC_QUEUE_FLAG_KERNEL))
208 flags |= XE_LRC_CREATE_USER_CTX;
209
210 err = q->ops->init(q);
211 if (err)
212 return err;
213
214 /*
215 * This must occur after q->ops->init to avoid race conditions during VF
216 * post-migration recovery, as the fixups for the LRC GGTT addresses
217 * depend on the queue being present in the backend tracking structure.
218 *
219 * In addition to above, we must wait on inflight GGTT changes to avoid
220 * writing out stale values here. Such wait provides a solid solution
221 * (without a race) only if the function can detect migration instantly
222 * from the moment vCPU resumes execution.
223 */
224 for (i = 0; i < q->width; ++i) {
225 struct xe_lrc *lrc;
226
227 xe_gt_sriov_vf_wait_valid_ggtt(q->gt);
228 lrc = xe_lrc_create(q->hwe, q->vm, xe_lrc_ring_size(),
229 q->msix_vec, flags);
230 if (IS_ERR(lrc)) {
231 err = PTR_ERR(lrc);
232 goto err_lrc;
233 }
234
235 /* Pairs with READ_ONCE to xe_exec_queue_contexts_hwsp_rebase */
236 WRITE_ONCE(q->lrc[i], lrc);
237 }
238
239 return 0;
240
241 err_lrc:
242 for (i = i - 1; i >= 0; --i)
243 xe_lrc_put(q->lrc[i]);
244 return err;
245 }
246
__xe_exec_queue_fini(struct xe_exec_queue * q)247 static void __xe_exec_queue_fini(struct xe_exec_queue *q)
248 {
249 int i;
250
251 q->ops->fini(q);
252
253 for (i = 0; i < q->width; ++i)
254 xe_lrc_put(q->lrc[i]);
255 }
256
xe_exec_queue_create(struct xe_device * xe,struct xe_vm * vm,u32 logical_mask,u16 width,struct xe_hw_engine * hwe,u32 flags,u64 extensions)257 struct xe_exec_queue *xe_exec_queue_create(struct xe_device *xe, struct xe_vm *vm,
258 u32 logical_mask, u16 width,
259 struct xe_hw_engine *hwe, u32 flags,
260 u64 extensions)
261 {
262 struct xe_exec_queue *q;
263 int err;
264
265 /* VMs for GSCCS queues (and only those) must have the XE_VM_FLAG_GSC flag */
266 xe_assert(xe, !vm || (!!(vm->flags & XE_VM_FLAG_GSC) == !!(hwe->engine_id == XE_HW_ENGINE_GSCCS0)));
267
268 q = __xe_exec_queue_alloc(xe, vm, logical_mask, width, hwe, flags,
269 extensions);
270 if (IS_ERR(q))
271 return q;
272
273 err = __xe_exec_queue_init(q, flags);
274 if (err)
275 goto err_post_alloc;
276
277 /*
278 * We can only add the queue to the PXP list after the init is complete,
279 * because the PXP termination can call exec_queue_kill and that will
280 * go bad if the queue is only half-initialized. This means that we
281 * can't do it when we handle the PXP extension in __xe_exec_queue_alloc
282 * and we need to do it here instead.
283 */
284 if (xe_exec_queue_uses_pxp(q)) {
285 err = xe_pxp_exec_queue_add(xe->pxp, q);
286 if (err)
287 goto err_post_init;
288 }
289
290 return q;
291
292 err_post_init:
293 __xe_exec_queue_fini(q);
294 err_post_alloc:
295 __xe_exec_queue_free(q);
296 return ERR_PTR(err);
297 }
298 ALLOW_ERROR_INJECTION(xe_exec_queue_create, ERRNO);
299
xe_exec_queue_create_class(struct xe_device * xe,struct xe_gt * gt,struct xe_vm * vm,enum xe_engine_class class,u32 flags,u64 extensions)300 struct xe_exec_queue *xe_exec_queue_create_class(struct xe_device *xe, struct xe_gt *gt,
301 struct xe_vm *vm,
302 enum xe_engine_class class,
303 u32 flags, u64 extensions)
304 {
305 struct xe_hw_engine *hwe, *hwe0 = NULL;
306 enum xe_hw_engine_id id;
307 u32 logical_mask = 0;
308
309 for_each_hw_engine(hwe, gt, id) {
310 if (xe_hw_engine_is_reserved(hwe))
311 continue;
312
313 if (hwe->class == class) {
314 logical_mask |= BIT(hwe->logical_instance);
315 if (!hwe0)
316 hwe0 = hwe;
317 }
318 }
319
320 if (!logical_mask)
321 return ERR_PTR(-ENODEV);
322
323 return xe_exec_queue_create(xe, vm, logical_mask, 1, hwe0, flags, extensions);
324 }
325
326 /**
327 * xe_exec_queue_create_bind() - Create bind exec queue.
328 * @xe: Xe device.
329 * @tile: tile which bind exec queue belongs to.
330 * @flags: exec queue creation flags
331 * @extensions: exec queue creation extensions
332 *
333 * Normalize bind exec queue creation. Bind exec queue is tied to migration VM
334 * for access to physical memory required for page table programming. On a
335 * faulting devices the reserved copy engine instance must be used to avoid
336 * deadlocking (user binds cannot get stuck behind faults as kernel binds which
337 * resolve faults depend on user binds). On non-faulting devices any copy engine
338 * can be used.
339 *
340 * Returns exec queue on success, ERR_PTR on failure
341 */
xe_exec_queue_create_bind(struct xe_device * xe,struct xe_tile * tile,u32 flags,u64 extensions)342 struct xe_exec_queue *xe_exec_queue_create_bind(struct xe_device *xe,
343 struct xe_tile *tile,
344 u32 flags, u64 extensions)
345 {
346 struct xe_gt *gt = tile->primary_gt;
347 struct xe_exec_queue *q;
348 struct xe_vm *migrate_vm;
349
350 migrate_vm = xe_migrate_get_vm(tile->migrate);
351 if (xe->info.has_usm) {
352 struct xe_hw_engine *hwe = xe_gt_hw_engine(gt,
353 XE_ENGINE_CLASS_COPY,
354 gt->usm.reserved_bcs_instance,
355 false);
356
357 if (!hwe) {
358 xe_vm_put(migrate_vm);
359 return ERR_PTR(-EINVAL);
360 }
361
362 q = xe_exec_queue_create(xe, migrate_vm,
363 BIT(hwe->logical_instance), 1, hwe,
364 flags, extensions);
365 } else {
366 q = xe_exec_queue_create_class(xe, gt, migrate_vm,
367 XE_ENGINE_CLASS_COPY, flags,
368 extensions);
369 }
370 xe_vm_put(migrate_vm);
371
372 if (!IS_ERR(q)) {
373 int err = drm_syncobj_create(&q->ufence_syncobj,
374 DRM_SYNCOBJ_CREATE_SIGNALED,
375 NULL);
376 if (err) {
377 xe_exec_queue_put(q);
378 return ERR_PTR(err);
379 }
380 }
381
382 return q;
383 }
384 ALLOW_ERROR_INJECTION(xe_exec_queue_create_bind, ERRNO);
385
xe_exec_queue_destroy(struct kref * ref)386 void xe_exec_queue_destroy(struct kref *ref)
387 {
388 struct xe_exec_queue *q = container_of(ref, struct xe_exec_queue, refcount);
389 struct xe_exec_queue *eq, *next;
390 int i;
391
392 xe_assert(gt_to_xe(q->gt), atomic_read(&q->job_cnt) == 0);
393
394 if (q->ufence_syncobj)
395 drm_syncobj_put(q->ufence_syncobj);
396
397 if (xe_exec_queue_uses_pxp(q))
398 xe_pxp_exec_queue_remove(gt_to_xe(q->gt)->pxp, q);
399
400 xe_exec_queue_last_fence_put_unlocked(q);
401 for_each_tlb_inval(i)
402 xe_exec_queue_tlb_inval_last_fence_put_unlocked(q, i);
403
404 if (!(q->flags & EXEC_QUEUE_FLAG_BIND_ENGINE_CHILD)) {
405 list_for_each_entry_safe(eq, next, &q->multi_gt_list,
406 multi_gt_link)
407 xe_exec_queue_put(eq);
408 }
409
410 q->ops->destroy(q);
411 }
412
xe_exec_queue_fini(struct xe_exec_queue * q)413 void xe_exec_queue_fini(struct xe_exec_queue *q)
414 {
415 /*
416 * Before releasing our ref to lrc and xef, accumulate our run ticks
417 * and wakeup any waiters.
418 */
419 xe_exec_queue_update_run_ticks(q);
420 if (q->xef && atomic_dec_and_test(&q->xef->exec_queue.pending_removal))
421 wake_up_var(&q->xef->exec_queue.pending_removal);
422
423 __xe_exec_queue_fini(q);
424 __xe_exec_queue_free(q);
425 }
426
xe_exec_queue_assign_name(struct xe_exec_queue * q,u32 instance)427 void xe_exec_queue_assign_name(struct xe_exec_queue *q, u32 instance)
428 {
429 switch (q->class) {
430 case XE_ENGINE_CLASS_RENDER:
431 snprintf(q->name, sizeof(q->name), "rcs%d", instance);
432 break;
433 case XE_ENGINE_CLASS_VIDEO_DECODE:
434 snprintf(q->name, sizeof(q->name), "vcs%d", instance);
435 break;
436 case XE_ENGINE_CLASS_VIDEO_ENHANCE:
437 snprintf(q->name, sizeof(q->name), "vecs%d", instance);
438 break;
439 case XE_ENGINE_CLASS_COPY:
440 snprintf(q->name, sizeof(q->name), "bcs%d", instance);
441 break;
442 case XE_ENGINE_CLASS_COMPUTE:
443 snprintf(q->name, sizeof(q->name), "ccs%d", instance);
444 break;
445 case XE_ENGINE_CLASS_OTHER:
446 snprintf(q->name, sizeof(q->name), "gsccs%d", instance);
447 break;
448 default:
449 XE_WARN_ON(q->class);
450 }
451 }
452
xe_exec_queue_lookup(struct xe_file * xef,u32 id)453 struct xe_exec_queue *xe_exec_queue_lookup(struct xe_file *xef, u32 id)
454 {
455 struct xe_exec_queue *q;
456
457 mutex_lock(&xef->exec_queue.lock);
458 q = xa_load(&xef->exec_queue.xa, id);
459 if (q)
460 xe_exec_queue_get(q);
461 mutex_unlock(&xef->exec_queue.lock);
462
463 return q;
464 }
465
466 enum xe_exec_queue_priority
xe_exec_queue_device_get_max_priority(struct xe_device * xe)467 xe_exec_queue_device_get_max_priority(struct xe_device *xe)
468 {
469 return capable(CAP_SYS_NICE) ? XE_EXEC_QUEUE_PRIORITY_HIGH :
470 XE_EXEC_QUEUE_PRIORITY_NORMAL;
471 }
472
exec_queue_set_priority(struct xe_device * xe,struct xe_exec_queue * q,u64 value)473 static int exec_queue_set_priority(struct xe_device *xe, struct xe_exec_queue *q,
474 u64 value)
475 {
476 if (XE_IOCTL_DBG(xe, value > XE_EXEC_QUEUE_PRIORITY_HIGH))
477 return -EINVAL;
478
479 if (XE_IOCTL_DBG(xe, value > xe_exec_queue_device_get_max_priority(xe)))
480 return -EPERM;
481
482 q->sched_props.priority = value;
483 return 0;
484 }
485
xe_exec_queue_enforce_schedule_limit(void)486 static bool xe_exec_queue_enforce_schedule_limit(void)
487 {
488 #if IS_ENABLED(CONFIG_DRM_XE_ENABLE_SCHEDTIMEOUT_LIMIT)
489 return true;
490 #else
491 return !capable(CAP_SYS_NICE);
492 #endif
493 }
494
495 static void
xe_exec_queue_get_prop_minmax(struct xe_hw_engine_class_intf * eclass,enum xe_exec_queue_sched_prop prop,u32 * min,u32 * max)496 xe_exec_queue_get_prop_minmax(struct xe_hw_engine_class_intf *eclass,
497 enum xe_exec_queue_sched_prop prop,
498 u32 *min, u32 *max)
499 {
500 switch (prop) {
501 case XE_EXEC_QUEUE_JOB_TIMEOUT:
502 *min = eclass->sched_props.job_timeout_min;
503 *max = eclass->sched_props.job_timeout_max;
504 break;
505 case XE_EXEC_QUEUE_TIMESLICE:
506 *min = eclass->sched_props.timeslice_min;
507 *max = eclass->sched_props.timeslice_max;
508 break;
509 case XE_EXEC_QUEUE_PREEMPT_TIMEOUT:
510 *min = eclass->sched_props.preempt_timeout_min;
511 *max = eclass->sched_props.preempt_timeout_max;
512 break;
513 default:
514 break;
515 }
516 #if IS_ENABLED(CONFIG_DRM_XE_ENABLE_SCHEDTIMEOUT_LIMIT)
517 if (capable(CAP_SYS_NICE)) {
518 switch (prop) {
519 case XE_EXEC_QUEUE_JOB_TIMEOUT:
520 *min = XE_HW_ENGINE_JOB_TIMEOUT_MIN;
521 *max = XE_HW_ENGINE_JOB_TIMEOUT_MAX;
522 break;
523 case XE_EXEC_QUEUE_TIMESLICE:
524 *min = XE_HW_ENGINE_TIMESLICE_MIN;
525 *max = XE_HW_ENGINE_TIMESLICE_MAX;
526 break;
527 case XE_EXEC_QUEUE_PREEMPT_TIMEOUT:
528 *min = XE_HW_ENGINE_PREEMPT_TIMEOUT_MIN;
529 *max = XE_HW_ENGINE_PREEMPT_TIMEOUT_MAX;
530 break;
531 default:
532 break;
533 }
534 }
535 #endif
536 }
537
exec_queue_set_timeslice(struct xe_device * xe,struct xe_exec_queue * q,u64 value)538 static int exec_queue_set_timeslice(struct xe_device *xe, struct xe_exec_queue *q,
539 u64 value)
540 {
541 u32 min = 0, max = 0;
542
543 xe_exec_queue_get_prop_minmax(q->hwe->eclass,
544 XE_EXEC_QUEUE_TIMESLICE, &min, &max);
545
546 if (xe_exec_queue_enforce_schedule_limit() &&
547 !xe_hw_engine_timeout_in_range(value, min, max))
548 return -EINVAL;
549
550 q->sched_props.timeslice_us = value;
551 return 0;
552 }
553
554 static int
exec_queue_set_pxp_type(struct xe_device * xe,struct xe_exec_queue * q,u64 value)555 exec_queue_set_pxp_type(struct xe_device *xe, struct xe_exec_queue *q, u64 value)
556 {
557 if (value == DRM_XE_PXP_TYPE_NONE)
558 return 0;
559
560 /* we only support HWDRM sessions right now */
561 if (XE_IOCTL_DBG(xe, value != DRM_XE_PXP_TYPE_HWDRM))
562 return -EINVAL;
563
564 if (!xe_pxp_is_enabled(xe->pxp))
565 return -ENODEV;
566
567 return xe_pxp_exec_queue_set_type(xe->pxp, q, DRM_XE_PXP_TYPE_HWDRM);
568 }
569
570 typedef int (*xe_exec_queue_set_property_fn)(struct xe_device *xe,
571 struct xe_exec_queue *q,
572 u64 value);
573
574 static const xe_exec_queue_set_property_fn exec_queue_set_property_funcs[] = {
575 [DRM_XE_EXEC_QUEUE_SET_PROPERTY_PRIORITY] = exec_queue_set_priority,
576 [DRM_XE_EXEC_QUEUE_SET_PROPERTY_TIMESLICE] = exec_queue_set_timeslice,
577 [DRM_XE_EXEC_QUEUE_SET_PROPERTY_PXP_TYPE] = exec_queue_set_pxp_type,
578 };
579
exec_queue_user_ext_set_property(struct xe_device * xe,struct xe_exec_queue * q,u64 extension)580 static int exec_queue_user_ext_set_property(struct xe_device *xe,
581 struct xe_exec_queue *q,
582 u64 extension)
583 {
584 u64 __user *address = u64_to_user_ptr(extension);
585 struct drm_xe_ext_set_property ext;
586 int err;
587 u32 idx;
588
589 err = copy_from_user(&ext, address, sizeof(ext));
590 if (XE_IOCTL_DBG(xe, err))
591 return -EFAULT;
592
593 if (XE_IOCTL_DBG(xe, ext.property >=
594 ARRAY_SIZE(exec_queue_set_property_funcs)) ||
595 XE_IOCTL_DBG(xe, ext.pad) ||
596 XE_IOCTL_DBG(xe, ext.property != DRM_XE_EXEC_QUEUE_SET_PROPERTY_PRIORITY &&
597 ext.property != DRM_XE_EXEC_QUEUE_SET_PROPERTY_TIMESLICE &&
598 ext.property != DRM_XE_EXEC_QUEUE_SET_PROPERTY_PXP_TYPE))
599 return -EINVAL;
600
601 idx = array_index_nospec(ext.property, ARRAY_SIZE(exec_queue_set_property_funcs));
602 if (!exec_queue_set_property_funcs[idx])
603 return -EINVAL;
604
605 return exec_queue_set_property_funcs[idx](xe, q, ext.value);
606 }
607
608 typedef int (*xe_exec_queue_user_extension_fn)(struct xe_device *xe,
609 struct xe_exec_queue *q,
610 u64 extension);
611
612 static const xe_exec_queue_user_extension_fn exec_queue_user_extension_funcs[] = {
613 [DRM_XE_EXEC_QUEUE_EXTENSION_SET_PROPERTY] = exec_queue_user_ext_set_property,
614 };
615
616 #define MAX_USER_EXTENSIONS 16
exec_queue_user_extensions(struct xe_device * xe,struct xe_exec_queue * q,u64 extensions,int ext_number)617 static int exec_queue_user_extensions(struct xe_device *xe, struct xe_exec_queue *q,
618 u64 extensions, int ext_number)
619 {
620 u64 __user *address = u64_to_user_ptr(extensions);
621 struct drm_xe_user_extension ext;
622 int err;
623 u32 idx;
624
625 if (XE_IOCTL_DBG(xe, ext_number >= MAX_USER_EXTENSIONS))
626 return -E2BIG;
627
628 err = copy_from_user(&ext, address, sizeof(ext));
629 if (XE_IOCTL_DBG(xe, err))
630 return -EFAULT;
631
632 if (XE_IOCTL_DBG(xe, ext.pad) ||
633 XE_IOCTL_DBG(xe, ext.name >=
634 ARRAY_SIZE(exec_queue_user_extension_funcs)))
635 return -EINVAL;
636
637 idx = array_index_nospec(ext.name,
638 ARRAY_SIZE(exec_queue_user_extension_funcs));
639 err = exec_queue_user_extension_funcs[idx](xe, q, extensions);
640 if (XE_IOCTL_DBG(xe, err))
641 return err;
642
643 if (ext.next_extension)
644 return exec_queue_user_extensions(xe, q, ext.next_extension,
645 ++ext_number);
646
647 return 0;
648 }
649
calc_validate_logical_mask(struct xe_device * xe,struct drm_xe_engine_class_instance * eci,u16 width,u16 num_placements)650 static u32 calc_validate_logical_mask(struct xe_device *xe,
651 struct drm_xe_engine_class_instance *eci,
652 u16 width, u16 num_placements)
653 {
654 int len = width * num_placements;
655 int i, j, n;
656 u16 class;
657 u16 gt_id;
658 u32 return_mask = 0, prev_mask;
659
660 if (XE_IOCTL_DBG(xe, !xe_device_uc_enabled(xe) &&
661 len > 1))
662 return 0;
663
664 for (i = 0; i < width; ++i) {
665 u32 current_mask = 0;
666
667 for (j = 0; j < num_placements; ++j) {
668 struct xe_hw_engine *hwe;
669
670 n = j * width + i;
671
672 hwe = xe_hw_engine_lookup(xe, eci[n]);
673 if (XE_IOCTL_DBG(xe, !hwe))
674 return 0;
675
676 if (XE_IOCTL_DBG(xe, xe_hw_engine_is_reserved(hwe)))
677 return 0;
678
679 if (XE_IOCTL_DBG(xe, n && eci[n].gt_id != gt_id) ||
680 XE_IOCTL_DBG(xe, n && eci[n].engine_class != class))
681 return 0;
682
683 class = eci[n].engine_class;
684 gt_id = eci[n].gt_id;
685
686 if (width == 1 || !i)
687 return_mask |= BIT(eci[n].engine_instance);
688 current_mask |= BIT(eci[n].engine_instance);
689 }
690
691 /* Parallel submissions must be logically contiguous */
692 if (i && XE_IOCTL_DBG(xe, current_mask != prev_mask << 1))
693 return 0;
694
695 prev_mask = current_mask;
696 }
697
698 return return_mask;
699 }
700
xe_exec_queue_create_ioctl(struct drm_device * dev,void * data,struct drm_file * file)701 int xe_exec_queue_create_ioctl(struct drm_device *dev, void *data,
702 struct drm_file *file)
703 {
704 struct xe_device *xe = to_xe_device(dev);
705 struct xe_file *xef = to_xe_file(file);
706 struct drm_xe_exec_queue_create *args = data;
707 struct drm_xe_engine_class_instance eci[XE_HW_ENGINE_MAX_INSTANCE];
708 struct drm_xe_engine_class_instance __user *user_eci =
709 u64_to_user_ptr(args->instances);
710 struct xe_hw_engine *hwe;
711 struct xe_vm *vm;
712 struct xe_tile *tile;
713 struct xe_exec_queue *q = NULL;
714 u32 logical_mask;
715 u32 flags = 0;
716 u32 id;
717 u32 len;
718 int err;
719
720 if (XE_IOCTL_DBG(xe, args->flags & ~DRM_XE_EXEC_QUEUE_LOW_LATENCY_HINT) ||
721 XE_IOCTL_DBG(xe, args->reserved[0] || args->reserved[1]))
722 return -EINVAL;
723
724 len = args->width * args->num_placements;
725 if (XE_IOCTL_DBG(xe, !len || len > XE_HW_ENGINE_MAX_INSTANCE))
726 return -EINVAL;
727
728 err = copy_from_user(eci, user_eci,
729 sizeof(struct drm_xe_engine_class_instance) * len);
730 if (XE_IOCTL_DBG(xe, err))
731 return -EFAULT;
732
733 if (XE_IOCTL_DBG(xe, !xe_device_get_gt(xe, eci[0].gt_id)))
734 return -EINVAL;
735
736 if (args->flags & DRM_XE_EXEC_QUEUE_LOW_LATENCY_HINT)
737 flags |= EXEC_QUEUE_FLAG_LOW_LATENCY;
738
739 if (eci[0].engine_class == DRM_XE_ENGINE_CLASS_VM_BIND) {
740 if (XE_IOCTL_DBG(xe, args->width != 1) ||
741 XE_IOCTL_DBG(xe, args->num_placements != 1) ||
742 XE_IOCTL_DBG(xe, eci[0].engine_instance != 0))
743 return -EINVAL;
744
745 for_each_tile(tile, xe, id) {
746 struct xe_exec_queue *new;
747
748 flags |= EXEC_QUEUE_FLAG_VM;
749 if (id)
750 flags |= EXEC_QUEUE_FLAG_BIND_ENGINE_CHILD;
751
752 new = xe_exec_queue_create_bind(xe, tile, flags,
753 args->extensions);
754 if (IS_ERR(new)) {
755 err = PTR_ERR(new);
756 if (q)
757 goto put_exec_queue;
758 return err;
759 }
760 if (id == 0)
761 q = new;
762 else
763 list_add_tail(&new->multi_gt_list,
764 &q->multi_gt_link);
765 }
766 } else {
767 logical_mask = calc_validate_logical_mask(xe, eci,
768 args->width,
769 args->num_placements);
770 if (XE_IOCTL_DBG(xe, !logical_mask))
771 return -EINVAL;
772
773 hwe = xe_hw_engine_lookup(xe, eci[0]);
774 if (XE_IOCTL_DBG(xe, !hwe))
775 return -EINVAL;
776
777 vm = xe_vm_lookup(xef, args->vm_id);
778 if (XE_IOCTL_DBG(xe, !vm))
779 return -ENOENT;
780
781 err = down_read_interruptible(&vm->lock);
782 if (err) {
783 xe_vm_put(vm);
784 return err;
785 }
786
787 if (XE_IOCTL_DBG(xe, xe_vm_is_closed_or_banned(vm))) {
788 up_read(&vm->lock);
789 xe_vm_put(vm);
790 return -ENOENT;
791 }
792
793 q = xe_exec_queue_create(xe, vm, logical_mask,
794 args->width, hwe, flags,
795 args->extensions);
796 up_read(&vm->lock);
797 xe_vm_put(vm);
798 if (IS_ERR(q))
799 return PTR_ERR(q);
800
801 if (xe_vm_in_preempt_fence_mode(vm)) {
802 q->lr.context = dma_fence_context_alloc(1);
803
804 err = xe_vm_add_compute_exec_queue(vm, q);
805 if (XE_IOCTL_DBG(xe, err))
806 goto put_exec_queue;
807 }
808
809 if (q->vm && q->hwe->hw_engine_group) {
810 err = xe_hw_engine_group_add_exec_queue(q->hwe->hw_engine_group, q);
811 if (err)
812 goto put_exec_queue;
813 }
814 }
815
816 q->xef = xe_file_get(xef);
817
818 /* user id alloc must always be last in ioctl to prevent UAF */
819 err = xa_alloc(&xef->exec_queue.xa, &id, q, xa_limit_32b, GFP_KERNEL);
820 if (err)
821 goto kill_exec_queue;
822
823 args->exec_queue_id = id;
824
825 return 0;
826
827 kill_exec_queue:
828 xe_exec_queue_kill(q);
829 put_exec_queue:
830 xe_exec_queue_put(q);
831 return err;
832 }
833
xe_exec_queue_get_property_ioctl(struct drm_device * dev,void * data,struct drm_file * file)834 int xe_exec_queue_get_property_ioctl(struct drm_device *dev, void *data,
835 struct drm_file *file)
836 {
837 struct xe_device *xe = to_xe_device(dev);
838 struct xe_file *xef = to_xe_file(file);
839 struct drm_xe_exec_queue_get_property *args = data;
840 struct xe_exec_queue *q;
841 int ret;
842
843 if (XE_IOCTL_DBG(xe, args->reserved[0] || args->reserved[1]))
844 return -EINVAL;
845
846 q = xe_exec_queue_lookup(xef, args->exec_queue_id);
847 if (XE_IOCTL_DBG(xe, !q))
848 return -ENOENT;
849
850 switch (args->property) {
851 case DRM_XE_EXEC_QUEUE_GET_PROPERTY_BAN:
852 args->value = q->ops->reset_status(q);
853 ret = 0;
854 break;
855 default:
856 ret = -EINVAL;
857 }
858
859 xe_exec_queue_put(q);
860
861 return ret;
862 }
863
864 /**
865 * xe_exec_queue_lrc() - Get the LRC from exec queue.
866 * @q: The exec_queue.
867 *
868 * Retrieves the primary LRC for the exec queue. Note that this function
869 * returns only the first LRC instance, even when multiple parallel LRCs
870 * are configured.
871 *
872 * Return: Pointer to LRC on success, error on failure
873 */
xe_exec_queue_lrc(struct xe_exec_queue * q)874 struct xe_lrc *xe_exec_queue_lrc(struct xe_exec_queue *q)
875 {
876 return q->lrc[0];
877 }
878
879 /**
880 * xe_exec_queue_is_lr() - Whether an exec_queue is long-running
881 * @q: The exec_queue
882 *
883 * Return: True if the exec_queue is long-running, false otherwise.
884 */
xe_exec_queue_is_lr(struct xe_exec_queue * q)885 bool xe_exec_queue_is_lr(struct xe_exec_queue *q)
886 {
887 return q->vm && xe_vm_in_lr_mode(q->vm) &&
888 !(q->flags & EXEC_QUEUE_FLAG_VM);
889 }
890
891 /**
892 * xe_exec_queue_is_idle() - Whether an exec_queue is idle.
893 * @q: The exec_queue
894 *
895 * FIXME: Need to determine what to use as the short-lived
896 * timeline lock for the exec_queues, so that the return value
897 * of this function becomes more than just an advisory
898 * snapshot in time. The timeline lock must protect the
899 * seqno from racing submissions on the same exec_queue.
900 * Typically vm->resv, but user-created timeline locks use the migrate vm
901 * and never grabs the migrate vm->resv so we have a race there.
902 *
903 * Return: True if the exec_queue is idle, false otherwise.
904 */
xe_exec_queue_is_idle(struct xe_exec_queue * q)905 bool xe_exec_queue_is_idle(struct xe_exec_queue *q)
906 {
907 if (xe_exec_queue_is_parallel(q)) {
908 int i;
909
910 for (i = 0; i < q->width; ++i) {
911 if (xe_lrc_seqno(q->lrc[i]) !=
912 q->lrc[i]->fence_ctx.next_seqno - 1)
913 return false;
914 }
915
916 return true;
917 }
918
919 return xe_lrc_seqno(q->lrc[0]) ==
920 q->lrc[0]->fence_ctx.next_seqno - 1;
921 }
922
923 /**
924 * xe_exec_queue_update_run_ticks() - Update run time in ticks for this exec queue
925 * from hw
926 * @q: The exec queue
927 *
928 * Update the timestamp saved by HW for this exec queue and save run ticks
929 * calculated by using the delta from last update.
930 */
xe_exec_queue_update_run_ticks(struct xe_exec_queue * q)931 void xe_exec_queue_update_run_ticks(struct xe_exec_queue *q)
932 {
933 struct xe_device *xe = gt_to_xe(q->gt);
934 struct xe_lrc *lrc;
935 u64 old_ts, new_ts;
936 int idx;
937
938 /*
939 * Jobs that are executed by kernel doesn't have a corresponding xe_file
940 * and thus are not accounted.
941 */
942 if (!q->xef)
943 return;
944
945 /* Synchronize with unbind while holding the xe file open */
946 if (!drm_dev_enter(&xe->drm, &idx))
947 return;
948 /*
949 * Only sample the first LRC. For parallel submission, all of them are
950 * scheduled together and we compensate that below by multiplying by
951 * width - this may introduce errors if that premise is not true and
952 * they don't exit 100% aligned. On the other hand, looping through
953 * the LRCs and reading them in different time could also introduce
954 * errors.
955 */
956 lrc = q->lrc[0];
957 new_ts = xe_lrc_update_timestamp(lrc, &old_ts);
958 q->xef->run_ticks[q->class] += (new_ts - old_ts) * q->width;
959
960 drm_dev_exit(idx);
961 }
962
963 /**
964 * xe_exec_queue_kill - permanently stop all execution from an exec queue
965 * @q: The exec queue
966 *
967 * This function permanently stops all activity on an exec queue. If the queue
968 * is actively executing on the HW, it will be kicked off the engine; any
969 * pending jobs are discarded and all future submissions are rejected.
970 * This function is safe to call multiple times.
971 */
xe_exec_queue_kill(struct xe_exec_queue * q)972 void xe_exec_queue_kill(struct xe_exec_queue *q)
973 {
974 struct xe_exec_queue *eq = q, *next;
975
976 list_for_each_entry_safe(eq, next, &eq->multi_gt_list,
977 multi_gt_link) {
978 q->ops->kill(eq);
979 xe_vm_remove_compute_exec_queue(q->vm, eq);
980 }
981
982 q->ops->kill(q);
983 xe_vm_remove_compute_exec_queue(q->vm, q);
984 }
985
xe_exec_queue_destroy_ioctl(struct drm_device * dev,void * data,struct drm_file * file)986 int xe_exec_queue_destroy_ioctl(struct drm_device *dev, void *data,
987 struct drm_file *file)
988 {
989 struct xe_device *xe = to_xe_device(dev);
990 struct xe_file *xef = to_xe_file(file);
991 struct drm_xe_exec_queue_destroy *args = data;
992 struct xe_exec_queue *q;
993
994 if (XE_IOCTL_DBG(xe, args->pad) ||
995 XE_IOCTL_DBG(xe, args->reserved[0] || args->reserved[1]))
996 return -EINVAL;
997
998 mutex_lock(&xef->exec_queue.lock);
999 q = xa_erase(&xef->exec_queue.xa, args->exec_queue_id);
1000 if (q)
1001 atomic_inc(&xef->exec_queue.pending_removal);
1002 mutex_unlock(&xef->exec_queue.lock);
1003
1004 if (XE_IOCTL_DBG(xe, !q))
1005 return -ENOENT;
1006
1007 if (q->vm && q->hwe->hw_engine_group)
1008 xe_hw_engine_group_del_exec_queue(q->hwe->hw_engine_group, q);
1009
1010 xe_exec_queue_kill(q);
1011
1012 trace_xe_exec_queue_close(q);
1013 xe_exec_queue_put(q);
1014
1015 return 0;
1016 }
1017
xe_exec_queue_last_fence_lockdep_assert(struct xe_exec_queue * q,struct xe_vm * vm)1018 static void xe_exec_queue_last_fence_lockdep_assert(struct xe_exec_queue *q,
1019 struct xe_vm *vm)
1020 {
1021 if (q->flags & EXEC_QUEUE_FLAG_MIGRATE) {
1022 xe_migrate_job_lock_assert(q);
1023 } else if (q->flags & EXEC_QUEUE_FLAG_VM) {
1024 lockdep_assert_held(&vm->lock);
1025 } else {
1026 xe_vm_assert_held(vm);
1027 lockdep_assert_held(&q->hwe->hw_engine_group->mode_sem);
1028 }
1029 }
1030
1031 /**
1032 * xe_exec_queue_last_fence_put() - Drop ref to last fence
1033 * @q: The exec queue
1034 * @vm: The VM the engine does a bind or exec for
1035 */
xe_exec_queue_last_fence_put(struct xe_exec_queue * q,struct xe_vm * vm)1036 void xe_exec_queue_last_fence_put(struct xe_exec_queue *q, struct xe_vm *vm)
1037 {
1038 xe_exec_queue_last_fence_lockdep_assert(q, vm);
1039
1040 xe_exec_queue_last_fence_put_unlocked(q);
1041 }
1042
1043 /**
1044 * xe_exec_queue_last_fence_put_unlocked() - Drop ref to last fence unlocked
1045 * @q: The exec queue
1046 *
1047 * Only safe to be called from xe_exec_queue_destroy().
1048 */
xe_exec_queue_last_fence_put_unlocked(struct xe_exec_queue * q)1049 void xe_exec_queue_last_fence_put_unlocked(struct xe_exec_queue *q)
1050 {
1051 if (q->last_fence) {
1052 dma_fence_put(q->last_fence);
1053 q->last_fence = NULL;
1054 }
1055 }
1056
1057 /**
1058 * xe_exec_queue_last_fence_get() - Get last fence
1059 * @q: The exec queue
1060 * @vm: The VM the engine does a bind or exec for
1061 *
1062 * Get last fence, takes a ref
1063 *
1064 * Returns: last fence if not signaled, dma fence stub if signaled
1065 */
xe_exec_queue_last_fence_get(struct xe_exec_queue * q,struct xe_vm * vm)1066 struct dma_fence *xe_exec_queue_last_fence_get(struct xe_exec_queue *q,
1067 struct xe_vm *vm)
1068 {
1069 struct dma_fence *fence;
1070
1071 xe_exec_queue_last_fence_lockdep_assert(q, vm);
1072
1073 if (q->last_fence &&
1074 test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &q->last_fence->flags))
1075 xe_exec_queue_last_fence_put(q, vm);
1076
1077 fence = q->last_fence ? q->last_fence : dma_fence_get_stub();
1078 dma_fence_get(fence);
1079 return fence;
1080 }
1081
1082 /**
1083 * xe_exec_queue_last_fence_get_for_resume() - Get last fence
1084 * @q: The exec queue
1085 * @vm: The VM the engine does a bind or exec for
1086 *
1087 * Get last fence, takes a ref. Only safe to be called in the context of
1088 * resuming the hw engine group's long-running exec queue, when the group
1089 * semaphore is held.
1090 *
1091 * Returns: last fence if not signaled, dma fence stub if signaled
1092 */
xe_exec_queue_last_fence_get_for_resume(struct xe_exec_queue * q,struct xe_vm * vm)1093 struct dma_fence *xe_exec_queue_last_fence_get_for_resume(struct xe_exec_queue *q,
1094 struct xe_vm *vm)
1095 {
1096 struct dma_fence *fence;
1097
1098 lockdep_assert_held_write(&q->hwe->hw_engine_group->mode_sem);
1099
1100 if (q->last_fence &&
1101 test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &q->last_fence->flags))
1102 xe_exec_queue_last_fence_put_unlocked(q);
1103
1104 fence = q->last_fence ? q->last_fence : dma_fence_get_stub();
1105 dma_fence_get(fence);
1106 return fence;
1107 }
1108
1109 /**
1110 * xe_exec_queue_last_fence_set() - Set last fence
1111 * @q: The exec queue
1112 * @vm: The VM the engine does a bind or exec for
1113 * @fence: The fence
1114 *
1115 * Set the last fence for the engine. Increases reference count for fence, when
1116 * closing engine xe_exec_queue_last_fence_put should be called.
1117 */
xe_exec_queue_last_fence_set(struct xe_exec_queue * q,struct xe_vm * vm,struct dma_fence * fence)1118 void xe_exec_queue_last_fence_set(struct xe_exec_queue *q, struct xe_vm *vm,
1119 struct dma_fence *fence)
1120 {
1121 xe_exec_queue_last_fence_lockdep_assert(q, vm);
1122 xe_assert(vm->xe, !dma_fence_is_container(fence));
1123
1124 xe_exec_queue_last_fence_put(q, vm);
1125 q->last_fence = dma_fence_get(fence);
1126 }
1127
1128 /**
1129 * xe_exec_queue_tlb_inval_last_fence_put() - Drop ref to last TLB invalidation fence
1130 * @q: The exec queue
1131 * @vm: The VM the engine does a bind for
1132 * @type: Either primary or media GT
1133 */
xe_exec_queue_tlb_inval_last_fence_put(struct xe_exec_queue * q,struct xe_vm * vm,unsigned int type)1134 void xe_exec_queue_tlb_inval_last_fence_put(struct xe_exec_queue *q,
1135 struct xe_vm *vm,
1136 unsigned int type)
1137 {
1138 xe_exec_queue_last_fence_lockdep_assert(q, vm);
1139 xe_assert(vm->xe, type == XE_EXEC_QUEUE_TLB_INVAL_MEDIA_GT ||
1140 type == XE_EXEC_QUEUE_TLB_INVAL_PRIMARY_GT);
1141
1142 xe_exec_queue_tlb_inval_last_fence_put_unlocked(q, type);
1143 }
1144
1145 /**
1146 * xe_exec_queue_tlb_inval_last_fence_put_unlocked() - Drop ref to last TLB
1147 * invalidation fence unlocked
1148 * @q: The exec queue
1149 * @type: Either primary or media GT
1150 *
1151 * Only safe to be called from xe_exec_queue_destroy().
1152 */
xe_exec_queue_tlb_inval_last_fence_put_unlocked(struct xe_exec_queue * q,unsigned int type)1153 void xe_exec_queue_tlb_inval_last_fence_put_unlocked(struct xe_exec_queue *q,
1154 unsigned int type)
1155 {
1156 xe_assert(q->vm->xe, type == XE_EXEC_QUEUE_TLB_INVAL_MEDIA_GT ||
1157 type == XE_EXEC_QUEUE_TLB_INVAL_PRIMARY_GT);
1158
1159 dma_fence_put(q->tlb_inval[type].last_fence);
1160 q->tlb_inval[type].last_fence = NULL;
1161 }
1162
1163 /**
1164 * xe_exec_queue_tlb_inval_last_fence_get() - Get last fence for TLB invalidation
1165 * @q: The exec queue
1166 * @vm: The VM the engine does a bind for
1167 * @type: Either primary or media GT
1168 *
1169 * Get last fence, takes a ref
1170 *
1171 * Returns: last fence if not signaled, dma fence stub if signaled
1172 */
xe_exec_queue_tlb_inval_last_fence_get(struct xe_exec_queue * q,struct xe_vm * vm,unsigned int type)1173 struct dma_fence *xe_exec_queue_tlb_inval_last_fence_get(struct xe_exec_queue *q,
1174 struct xe_vm *vm,
1175 unsigned int type)
1176 {
1177 struct dma_fence *fence;
1178
1179 xe_exec_queue_last_fence_lockdep_assert(q, vm);
1180 xe_assert(vm->xe, type == XE_EXEC_QUEUE_TLB_INVAL_MEDIA_GT ||
1181 type == XE_EXEC_QUEUE_TLB_INVAL_PRIMARY_GT);
1182 xe_assert(vm->xe, q->flags & (EXEC_QUEUE_FLAG_VM |
1183 EXEC_QUEUE_FLAG_MIGRATE));
1184
1185 if (q->tlb_inval[type].last_fence &&
1186 test_bit(DMA_FENCE_FLAG_SIGNALED_BIT,
1187 &q->tlb_inval[type].last_fence->flags))
1188 xe_exec_queue_tlb_inval_last_fence_put(q, vm, type);
1189
1190 fence = q->tlb_inval[type].last_fence ?: dma_fence_get_stub();
1191 dma_fence_get(fence);
1192 return fence;
1193 }
1194
1195 /**
1196 * xe_exec_queue_tlb_inval_last_fence_set() - Set last fence for TLB invalidation
1197 * @q: The exec queue
1198 * @vm: The VM the engine does a bind for
1199 * @fence: The fence
1200 * @type: Either primary or media GT
1201 *
1202 * Set the last fence for the tlb invalidation type on the queue. Increases
1203 * reference count for fence, when closing queue
1204 * xe_exec_queue_tlb_inval_last_fence_put should be called.
1205 */
xe_exec_queue_tlb_inval_last_fence_set(struct xe_exec_queue * q,struct xe_vm * vm,struct dma_fence * fence,unsigned int type)1206 void xe_exec_queue_tlb_inval_last_fence_set(struct xe_exec_queue *q,
1207 struct xe_vm *vm,
1208 struct dma_fence *fence,
1209 unsigned int type)
1210 {
1211 xe_exec_queue_last_fence_lockdep_assert(q, vm);
1212 xe_assert(vm->xe, type == XE_EXEC_QUEUE_TLB_INVAL_MEDIA_GT ||
1213 type == XE_EXEC_QUEUE_TLB_INVAL_PRIMARY_GT);
1214 xe_assert(vm->xe, q->flags & (EXEC_QUEUE_FLAG_VM |
1215 EXEC_QUEUE_FLAG_MIGRATE));
1216 xe_assert(vm->xe, !dma_fence_is_container(fence));
1217
1218 xe_exec_queue_tlb_inval_last_fence_put(q, vm, type);
1219 q->tlb_inval[type].last_fence = dma_fence_get(fence);
1220 }
1221
1222 /**
1223 * xe_exec_queue_contexts_hwsp_rebase - Re-compute GGTT references
1224 * within all LRCs of a queue.
1225 * @q: the &xe_exec_queue struct instance containing target LRCs
1226 * @scratch: scratch buffer to be used as temporary storage
1227 *
1228 * Returns: zero on success, negative error code on failure
1229 */
xe_exec_queue_contexts_hwsp_rebase(struct xe_exec_queue * q,void * scratch)1230 int xe_exec_queue_contexts_hwsp_rebase(struct xe_exec_queue *q, void *scratch)
1231 {
1232 int i;
1233 int err = 0;
1234
1235 for (i = 0; i < q->width; ++i) {
1236 struct xe_lrc *lrc;
1237
1238 /* Pairs with WRITE_ONCE in __xe_exec_queue_init */
1239 lrc = READ_ONCE(q->lrc[i]);
1240 if (!lrc)
1241 continue;
1242
1243 xe_lrc_update_memirq_regs_with_address(lrc, q->hwe, scratch);
1244 xe_lrc_update_hwctx_regs_with_address(lrc);
1245 err = xe_lrc_setup_wa_bb_with_scratch(lrc, q->hwe, scratch);
1246 if (err)
1247 break;
1248 }
1249
1250 return err;
1251 }
1252