xref: /linux/drivers/scsi/lpfc/lpfc_bsg.h (revision 88e45067a30918ebb4942120892963e2311330af)
1 /*******************************************************************
2  * This file is part of the Emulex Linux Device Driver for         *
3  * Fibre Channel Host Bus Adapters.                                *
4  * Copyright (C) 2017-2024 Broadcom. All Rights Reserved. The term *
5  * “Broadcom” refers to Broadcom Inc. and/or its subsidiaries.     *
6  * Copyright (C) 2010-2015 Emulex.  All rights reserved.           *
7  * EMULEX and SLI are trademarks of Emulex.                        *
8  * www.broadcom.com                                                *
9  *                                                                 *
10  * This program is free software; you can redistribute it and/or   *
11  * modify it under the terms of version 2 of the GNU General       *
12  * Public License as published by the Free Software Foundation.    *
13  * This program is distributed in the hope that it will be useful. *
14  * ALL EXPRESS OR IMPLIED CONDITIONS, REPRESENTATIONS AND          *
15  * WARRANTIES, INCLUDING ANY IMPLIED WARRANTY OF MERCHANTABILITY,  *
16  * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT, ARE      *
17  * DISCLAIMED, EXCEPT TO THE EXTENT THAT SUCH DISCLAIMERS ARE HELD *
18  * TO BE LEGALLY INVALID.  See the GNU General Public License for  *
19  * more details, a copy of which can be found in the file COPYING  *
20  * included with this package.                                     *
21  *******************************************************************/
22 /* bsg definitions
23  * No pointers to user data are allowed, all application buffers and sizes will
24  * derived through the bsg interface.
25  *
26  * These are the vendor unique structures passed in using the bsg
27  * FC_BSG_HST_VENDOR message code type.
28  */
29 #define LPFC_BSG_VENDOR_SET_CT_EVENT		1
30 #define LPFC_BSG_VENDOR_GET_CT_EVENT		2
31 #define LPFC_BSG_VENDOR_SEND_MGMT_RESP		3
32 #define LPFC_BSG_VENDOR_DIAG_MODE		4
33 #define LPFC_BSG_VENDOR_DIAG_RUN_LOOPBACK	5
34 #define LPFC_BSG_VENDOR_GET_MGMT_REV		6
35 #define LPFC_BSG_VENDOR_MBOX			7
36 #define LPFC_BSG_VENDOR_DIAG_MODE_END		10
37 #define LPFC_BSG_VENDOR_LINK_DIAG_TEST		11
38 #define LPFC_BSG_VENDOR_FORCED_LINK_SPEED	14
39 #define LPFC_BSG_VENDOR_RAS_GET_LWPD		16
40 #define LPFC_BSG_VENDOR_RAS_GET_FWLOG		17
41 #define LPFC_BSG_VENDOR_RAS_GET_CONFIG		18
42 #define LPFC_BSG_VENDOR_RAS_SET_CONFIG		19
43 #define LPFC_BSG_VENDOR_GET_TRUNK_INFO		20
44 #define LPFC_BSG_VENDOR_GET_CGNBUF_INFO		21
45 
46 struct set_ct_event {
47 	uint32_t command;
48 	uint32_t type_mask;
49 	uint32_t ev_req_id;
50 	uint32_t ev_reg_id;
51 };
52 
53 struct get_ct_event {
54 	uint32_t command;
55 	uint32_t ev_reg_id;
56 	uint32_t ev_req_id;
57 };
58 
59 struct get_ct_event_reply {
60 	uint32_t immed_data;
61 	uint32_t type;
62 };
63 
64 struct send_mgmt_resp {
65 	uint32_t command;
66 	uint32_t tag;
67 };
68 
69 
70 #define DISABLE_LOOP_BACK  0x0 /* disables loop back */
71 #define INTERNAL_LOOP_BACK 0x1 /* adapter short cuts the loop internally */
72 #define EXTERNAL_LOOP_BACK 0x2 /* requires an external loopback plug */
73 
74 struct diag_mode_set {
75 	uint32_t command;
76 	uint32_t type;
77 	uint32_t timeout;
78 	uint32_t physical_link;
79 };
80 
81 struct sli4_link_diag {
82 	uint32_t command;
83 	uint32_t timeout;
84 	uint32_t test_id;
85 	uint32_t loops;
86 	uint32_t test_version;
87 	uint32_t error_action;
88 };
89 
90 struct diag_mode_test {
91 	uint32_t command;
92 };
93 
94 struct diag_status {
95 	uint32_t mbox_status;
96 	uint32_t shdr_status;
97 	uint32_t shdr_add_status;
98 };
99 
100 #define LPFC_WWNN_TYPE		0
101 #define LPFC_WWPN_TYPE		1
102 
103 struct get_mgmt_rev {
104 	uint32_t command;
105 };
106 
107 #define MANAGEMENT_MAJOR_REV   1
108 #define MANAGEMENT_MINOR_REV   1
109 
110 /* the MgmtRevInfo structure */
111 struct MgmtRevInfo {
112 	uint32_t a_Major;
113 	uint32_t a_Minor;
114 };
115 
116 struct get_mgmt_rev_reply {
117 	struct MgmtRevInfo info;
118 };
119 
120 #define BSG_MBOX_SIZE 4096 /* mailbox command plus extended data */
121 
122 /* BSG mailbox request header */
123 struct dfc_mbox_req {
124 	uint32_t command;
125 	uint32_t mbOffset;
126 	uint32_t inExtWLen;
127 	uint32_t outExtWLen;
128 	uint32_t extMboxTag;
129 	uint32_t extSeqNum;
130 };
131 
132 /*
133  * macros and data structures for handling sli-config mailbox command
134  * pass-through support, this header file is shared between user and
135  * kernel spaces, note the set of macros are duplicates from lpfc_hw4.h,
136  * with macro names prefixed with bsg_, as the macros defined in
137  * lpfc_hw4.h are not accessible from user space.
138  */
139 
140 /* Macros to deal with bit fields. Each bit field must have 3 #defines
141  * associated with it (_SHIFT, _MASK, and _WORD).
142  * EG. For a bit field that is in the 7th bit of the "field4" field of a
143  * structure and is 2 bits in size the following #defines must exist:
144  *      struct temp {
145  *              uint32_t        field1;
146  *              uint32_t        field2;
147  *              uint32_t        field3;
148  *              uint32_t        field4;
149  *      #define example_bit_field_SHIFT         7
150  *      #define example_bit_field_MASK          0x03
151  *      #define example_bit_field_WORD          field4
152  *              uint32_t        field5;
153  *      };
154  * Then the macros below may be used to get or set the value of that field.
155  * EG. To get the value of the bit field from the above example:
156  *      struct temp t1;
157  *      value = bsg_bf_get(example_bit_field, &t1);
158  * And then to set that bit field:
159  *      bsg_bf_set(example_bit_field, &t1, 2);
160  * Or clear that bit field:
161  *      bsg_bf_set(example_bit_field, &t1, 0);
162  */
163 #define bsg_bf_get_le32(name, ptr) \
164 	((le32_to_cpu((ptr)->name##_WORD) >> name##_SHIFT) & name##_MASK)
165 #define bsg_bf_get(name, ptr) \
166 	(((ptr)->name##_WORD >> name##_SHIFT) & name##_MASK)
167 #define bsg_bf_set_le32(name, ptr, value) \
168 	((ptr)->name##_WORD = cpu_to_le32(((((value) & \
169 	name##_MASK) << name##_SHIFT) | (le32_to_cpu((ptr)->name##_WORD) & \
170 	~(name##_MASK << name##_SHIFT)))))
171 #define bsg_bf_set(name, ptr, value) \
172 	((ptr)->name##_WORD = ((((value) & name##_MASK) << name##_SHIFT) | \
173 	((ptr)->name##_WORD & ~(name##_MASK << name##_SHIFT))))
174 
175 /*
176  * The sli_config structure specified here is based on the following
177  * restriction:
178  *
179  * -- SLI_CONFIG EMB=0, carrying MSEs, will carry subcommands without
180  *    carrying HBD.
181  * -- SLI_CONFIG EMB=1, not carrying MSE, will carry subcommands with or
182  *    without carrying HBDs.
183  */
184 
185 struct lpfc_sli_config_mse {
186 	uint32_t pa_lo;
187 	uint32_t pa_hi;
188 	uint32_t buf_len;
189 #define lpfc_mbox_sli_config_mse_len_SHIFT	0
190 #define lpfc_mbox_sli_config_mse_len_MASK	0xffffff
191 #define lpfc_mbox_sli_config_mse_len_WORD	buf_len
192 };
193 
194 struct lpfc_sli_config_hbd {
195 	uint32_t buf_len;
196 #define lpfc_mbox_sli_config_ecmn_hbd_len_SHIFT	0
197 #define lpfc_mbox_sli_config_ecmn_hbd_len_MASK	0xffffff
198 #define lpfc_mbox_sli_config_ecmn_hbd_len_WORD	buf_len
199 	uint32_t pa_lo;
200 	uint32_t pa_hi;
201 };
202 
203 struct lpfc_sli_config_hdr {
204 	uint32_t word1;
205 #define lpfc_mbox_hdr_emb_SHIFT		0
206 #define lpfc_mbox_hdr_emb_MASK		0x00000001
207 #define lpfc_mbox_hdr_emb_WORD		word1
208 #define lpfc_mbox_hdr_mse_cnt_SHIFT	3
209 #define lpfc_mbox_hdr_mse_cnt_MASK	0x0000001f
210 #define lpfc_mbox_hdr_mse_cnt_WORD	word1
211 	uint32_t payload_length;
212 	uint32_t tag_lo;
213 	uint32_t tag_hi;
214 	uint32_t reserved5;
215 };
216 
217 #define LPFC_CSF_BOOT_DEV		0x1D
218 #define LPFC_CSF_QUERY			0
219 #define LPFC_CSF_SAVE			1
220 
221 struct lpfc_sli_config_emb0_subsys {
222 	struct lpfc_sli_config_hdr	sli_config_hdr;
223 #define LPFC_MBX_SLI_CONFIG_MAX_MSE     19
224 	struct lpfc_sli_config_mse	mse[LPFC_MBX_SLI_CONFIG_MAX_MSE];
225 	uint32_t padding;
226 	uint32_t word64;
227 #define lpfc_emb0_subcmnd_opcode_SHIFT	0
228 #define lpfc_emb0_subcmnd_opcode_MASK	0xff
229 #define lpfc_emb0_subcmnd_opcode_WORD	word64
230 #define lpfc_emb0_subcmnd_subsys_SHIFT	8
231 #define lpfc_emb0_subcmnd_subsys_MASK	0xff
232 #define lpfc_emb0_subcmnd_subsys_WORD	word64
233 /* Subsystem FCOE (0x0C) OpCodes */
234 #define SLI_CONFIG_SUBSYS_FCOE		0x0C
235 #define FCOE_OPCODE_READ_FCF		0x08
236 #define FCOE_OPCODE_ADD_FCF		0x09
237 #define FCOE_OPCODE_SET_DPORT_MODE	0x27
238 #define FCOE_OPCODE_GET_DPORT_RESULTS	0x28
239 	uint32_t timeout;		/* comn_set_feature timeout */
240 	uint32_t request_length;	/* comn_set_feature request len */
241 	uint32_t version;		/* comn_set_feature version */
242 	uint32_t word68;		/* comn_set_feature feature */
243 #define lpfc_emb0_subcmnd_csf_feat_SHIFT		0
244 #define lpfc_emb0_subcmnd_csf_feat_MASK			0xffffffff
245 #define lpfc_emb0_subcmnd_csf_feat_WORD			word68
246 #define lpfc_emb0_subcmnd_rd_obj_des_rd_len_SHIFT	0
247 #define lpfc_emb0_subcmnd_rd_obj_des_rd_len_MASK	0x00ffffff
248 #define lpfc_emb0_subcmnd_rd_obj_des_rd_len_WORD	word68
249 	uint32_t word69;		/* comn_set_feature parameter len */
250 	uint32_t word70;		/* comn_set_feature parameter val0 */
251 #define lpfc_emb0_subcmnd_csf_p0_SHIFT	0
252 #define lpfc_emb0_subcmnd_csf_p0_MASK	0x3
253 #define lpfc_emb0_subcmnd_csf_p0_WORD	word70
254 	uint32_t reserved71[25];
255 	uint32_t word96;		/* rd_obj hbd_count */
256 #define lpfc_emb0_subcmnd_rd_obj_hbd_cnt_SHIFT	0
257 #define lpfc_emb0_subcmnd_rd_obj_hbd_cnt_MASK	0xffffffff
258 #define lpfc_emb0_subcmnd_rd_obj_hbd_cnt_WORD	word96
259 #define LPFC_EMB0_MAX_RD_OBJ_HBD_CNT		31
260 	struct lpfc_sli_config_hbd hbd[LPFC_EMB0_MAX_RD_OBJ_HBD_CNT];
261 	uint32_t word190;
262 	uint32_t word191;
263 };
264 
265 struct lpfc_sli_config_emb1_subsys {
266 	struct lpfc_sli_config_hdr	sli_config_hdr;
267 	uint32_t word6;
268 #define lpfc_emb1_subcmnd_opcode_SHIFT	0
269 #define lpfc_emb1_subcmnd_opcode_MASK	0xff
270 #define lpfc_emb1_subcmnd_opcode_WORD	word6
271 #define lpfc_emb1_subcmnd_subsys_SHIFT	8
272 #define lpfc_emb1_subcmnd_subsys_MASK	0xff
273 #define lpfc_emb1_subcmnd_subsys_WORD	word6
274 /* Subsystem COMN (0x01) OpCodes */
275 #define SLI_CONFIG_SUBSYS_COMN		0x01
276 #define COMN_OPCODE_GET_PROFILE_CONFIG	0xA4
277 #define COMN_OPCODE_READ_OBJECT		0xAB
278 #define COMN_OPCODE_WRITE_OBJECT	0xAC
279 #define COMN_OPCODE_READ_OBJECT_LIST	0xAD
280 #define COMN_OPCODE_DELETE_OBJECT	0xAE
281 #define COMN_OPCODE_SET_FEATURES	0xBF
282 #define COMN_OPCODE_GET_CNTL_ADDL_ATTRIBUTES	0x79
283 #define COMN_OPCODE_GET_CNTL_ATTRIBUTES	0x20
284 	uint32_t timeout;
285 	uint32_t request_length;
286 	uint32_t word9;
287 #define lpfc_subcmnd_version_SHIFT	0
288 #define lpfc_subcmnd_version_MASK	0xff
289 #define lpfc_subcmnd_version_WORD	word9
290 	uint32_t word10;
291 #define lpfc_subcmnd_ask_rd_len_SHIFT	0
292 #define lpfc_subcmnd_ask_rd_len_MASK	0xffffff
293 #define lpfc_subcmnd_ask_rd_len_WORD	word10
294 	uint32_t rd_offset;
295 	uint32_t obj_name[26];
296 	uint32_t hbd_count;
297 #define LPFC_MBX_SLI_CONFIG_MAX_HBD	8
298 	struct lpfc_sli_config_hbd	hbd[LPFC_MBX_SLI_CONFIG_MAX_HBD];
299 };
300 
301 struct lpfc_sli_config_mbox {
302 	uint32_t word0;
303 #define lpfc_mqe_status_SHIFT		16
304 #define lpfc_mqe_status_MASK		0x0000FFFF
305 #define lpfc_mqe_status_WORD		word0
306 #define lpfc_mqe_command_SHIFT		8
307 #define lpfc_mqe_command_MASK		0x000000FF
308 #define lpfc_mqe_command_WORD		word0
309 	union {
310 		struct lpfc_sli_config_emb0_subsys sli_config_emb0_subsys;
311 		struct lpfc_sli_config_emb1_subsys sli_config_emb1_subsys;
312 	} un;
313 };
314 
315 #define LPFC_FORCED_LINK_SPEED_NOT_SUPPORTED	0
316 #define LPFC_FORCED_LINK_SPEED_SUPPORTED	1
317 struct get_forced_link_speed_support {
318 	uint32_t command;
319 };
320 struct forced_link_speed_support_reply {
321 	uint8_t supported;
322 };
323 
324 struct lpfc_bsg_ras_req {
325 	uint32_t command;
326 };
327 
328 struct lpfc_bsg_get_fwlog_req {
329 	uint32_t command;
330 	uint32_t read_size;
331 	uint32_t read_offset;
332 };
333 
334 struct lpfc_bsg_get_ras_lwpd {
335 	uint32_t offset;
336 	uint32_t wrap_count;
337 };
338 
339 struct lpfc_bsg_set_ras_config_req {
340 	uint32_t command;
341 	uint8_t action;
342 #define LPFC_RASACTION_STOP_LOGGING     0x00
343 #define LPFC_RASACTION_START_LOGGING    0x01
344 	uint8_t log_level;
345 };
346 
347 struct lpfc_bsg_get_ras_config_reply {
348 	uint8_t state;
349 #define LPFC_RASLOG_STATE_STOPPED 0x00
350 #define LPFC_RASLOG_STATE_RUNNING 0x01
351 	uint8_t log_level;
352 	uint32_t log_buff_sz;
353 };
354 
355 struct lpfc_trunk_info {
356 	uint32_t word0;
357 #define lpfc_trunk_info_link_status_SHIFT      0
358 #define lpfc_trunk_info_link_status_MASK       1
359 #define lpfc_trunk_info_link_status_WORD       word0
360 #define lpfc_trunk_info_trunk_active0_SHIFT    8
361 #define lpfc_trunk_info_trunk_active0_MASK     1
362 #define lpfc_trunk_info_trunk_active0_WORD     word0
363 #define lpfc_trunk_info_trunk_active1_SHIFT    9
364 #define lpfc_trunk_info_trunk_active1_MASK     1
365 #define lpfc_trunk_info_trunk_active1_WORD     word0
366 #define lpfc_trunk_info_trunk_active2_SHIFT    10
367 #define lpfc_trunk_info_trunk_active2_MASK     1
368 #define lpfc_trunk_info_trunk_active2_WORD     word0
369 #define lpfc_trunk_info_trunk_active3_SHIFT    11
370 #define lpfc_trunk_info_trunk_active3_MASK     1
371 #define lpfc_trunk_info_trunk_active3_WORD     word0
372 #define lpfc_trunk_info_trunk_config0_SHIFT    12
373 #define lpfc_trunk_info_trunk_config0_MASK     1
374 #define lpfc_trunk_info_trunk_config0_WORD     word0
375 #define lpfc_trunk_info_trunk_config1_SHIFT    13
376 #define lpfc_trunk_info_trunk_config1_MASK     1
377 #define lpfc_trunk_info_trunk_config1_WORD     word0
378 #define lpfc_trunk_info_trunk_config2_SHIFT    14
379 #define lpfc_trunk_info_trunk_config2_MASK     1
380 #define lpfc_trunk_info_trunk_config2_WORD     word0
381 #define lpfc_trunk_info_trunk_config3_SHIFT    15
382 #define lpfc_trunk_info_trunk_config3_MASK     1
383 #define lpfc_trunk_info_trunk_config3_WORD     word0
384 	uint16_t    port_speed;
385 	uint16_t    logical_speed;
386 	uint32_t    reserved3;
387 };
388 
389 struct get_trunk_info_req {
390 	uint32_t command;
391 };
392 
393 struct get_cgnbuf_info_req {
394 	uint32_t command;
395 	uint32_t read_size;
396 	uint32_t reset;
397 #define LPFC_BSG_CGN_RESET_STAT		1
398 };
399 
400 /* driver only */
401 #define SLI_CONFIG_NOT_HANDLED		0
402 #define SLI_CONFIG_HANDLED		1
403