1 /* SPDX-License-Identifier: MIT */ 2 /* 3 * Copyright © 2023-2024 Intel Corporation 4 */ 5 6 #ifndef _XE_OA_TYPES_H_ 7 #define _XE_OA_TYPES_H_ 8 9 #include <linux/bitops.h> 10 #include <linux/idr.h> 11 #include <linux/mutex.h> 12 #include <linux/types.h> 13 14 #include <uapi/drm/xe_drm.h> 15 #include "regs/xe_reg_defs.h" 16 #include "xe_hw_engine_types.h" 17 18 struct drm_syncobj; 19 20 #define DEFAULT_XE_OA_BUFFER_SIZE SZ_16M 21 22 enum xe_oa_report_header { 23 HDR_32_BIT = 0, 24 HDR_64_BIT, 25 }; 26 27 enum xe_oa_format_name { 28 XE_OA_FORMAT_C4_B8, 29 30 /* Gen8+ */ 31 XE_OA_FORMAT_A12, 32 XE_OA_FORMAT_A12_B8_C8, 33 XE_OA_FORMAT_A32u40_A4u32_B8_C8, 34 35 /* DG2 */ 36 XE_OAR_FORMAT_A32u40_A4u32_B8_C8, 37 XE_OA_FORMAT_A24u40_A14u32_B8_C8, 38 39 /* DG2/MTL OAC */ 40 XE_OAC_FORMAT_A24u64_B8_C8, 41 XE_OAC_FORMAT_A22u32_R2u32_B8_C8, 42 43 /* MTL OAM */ 44 XE_OAM_FORMAT_MPEC8u64_B8_C8, 45 XE_OAM_FORMAT_MPEC8u32_B8_C8, 46 47 /* Xe2+ */ 48 XE_OA_FORMAT_PEC64u64, 49 XE_OA_FORMAT_PEC64u64_B8_C8, 50 XE_OA_FORMAT_PEC64u32, 51 XE_OA_FORMAT_PEC32u64_G1, 52 XE_OA_FORMAT_PEC32u32_G1, 53 XE_OA_FORMAT_PEC32u64_G2, 54 XE_OA_FORMAT_PEC32u32_G2, 55 XE_OA_FORMAT_PEC36u64_G1_32_G2_4, 56 XE_OA_FORMAT_PEC36u64_G1_4_G2_32, 57 58 __XE_OA_FORMAT_MAX, 59 }; 60 61 /** 62 * struct xe_oa_format - Format fields for supported OA formats. OA format 63 * properties are specified in PRM/Bspec 52198 and 60942 64 */ 65 struct xe_oa_format { 66 /** @counter_select: counter select value (see Bspec 52198/60942) */ 67 u32 counter_select; 68 /** @size: record size as written by HW (multiple of 64 byte cachelines) */ 69 int size; 70 /** @type: of enum drm_xe_oa_format_type */ 71 int type; 72 /** @header: 32 or 64 bit report headers */ 73 enum xe_oa_report_header header; 74 /** @counter_size: counter size value (see Bspec 60942) */ 75 u16 counter_size; 76 /** @bc_report: BC report value (see Bspec 60942) */ 77 u16 bc_report; 78 }; 79 80 /** struct xe_oa_regs - Registers for each OA unit */ 81 struct xe_oa_regs { 82 u32 base; 83 struct xe_reg oa_head_ptr; 84 struct xe_reg oa_tail_ptr; 85 struct xe_reg oa_buffer; 86 struct xe_reg oa_ctx_ctrl; 87 struct xe_reg oa_ctrl; 88 struct xe_reg oa_debug; 89 struct xe_reg oa_status; 90 struct xe_reg oa_mmio_trg; 91 u32 oa_ctrl_counter_select_mask; 92 }; 93 94 /** 95 * struct xe_oa_unit - Hardware OA unit 96 */ 97 struct xe_oa_unit { 98 /** @oa_unit_id: identifier for the OA unit */ 99 u16 oa_unit_id; 100 101 /** @gt: gt associated with the OA unit */ 102 struct xe_gt *gt; 103 104 /** @type: Type of OA unit - OAM, OAG etc. */ 105 enum drm_xe_oa_unit_type type; 106 107 /** @regs: OA registers for programming the OA unit */ 108 struct xe_oa_regs regs; 109 110 /** @num_engines: number of engines attached to this OA unit */ 111 u32 num_engines; 112 113 /** @exclusive_stream: The stream currently using the OA unit */ 114 struct xe_oa_stream *exclusive_stream; 115 }; 116 117 /** 118 * struct xe_oa_gt - OA per-gt information 119 */ 120 struct xe_oa_gt { 121 /** @gt_lock: lock protecting create/destroy OA streams */ 122 struct mutex gt_lock; 123 124 /** @num_oa_units: number of oa units for each gt */ 125 u32 num_oa_units; 126 127 /** @oa_unit: array of oa_units */ 128 struct xe_oa_unit *oa_unit; 129 130 /** @whitelist_count: number of open streams for which oa registers are whitelisted */ 131 u32 whitelist_count; 132 }; 133 134 /** 135 * struct xe_oa - OA device level information 136 */ 137 struct xe_oa { 138 /** @xe: back pointer to xe device */ 139 struct xe_device *xe; 140 141 /** @metrics_kobj: kobj for metrics sysfs */ 142 struct kobject *metrics_kobj; 143 144 /** @metrics_lock: lock protecting add/remove configs */ 145 struct mutex metrics_lock; 146 147 /** @metrics_idr: List of dynamic configurations (struct xe_oa_config) */ 148 struct idr metrics_idr; 149 150 /** @oa_formats: tracks all OA formats across platforms */ 151 const struct xe_oa_format *oa_formats; 152 153 /** @format_mask: tracks valid OA formats for a platform */ 154 unsigned long format_mask[BITS_TO_LONGS(__XE_OA_FORMAT_MAX)]; 155 156 /** @oa_unit_ids: tracks oa unit ids assigned across gt's */ 157 u16 oa_unit_ids; 158 }; 159 160 /** 161 * struct xe_oa_buffer - State of the stream OA buffer 162 */ 163 struct xe_oa_buffer { 164 /** @format: data format */ 165 const struct xe_oa_format *format; 166 167 /** @bo: xe_bo backing the OA buffer */ 168 struct xe_bo *bo; 169 170 /** @bounce: bounce buffer used with xe_map layer */ 171 void *bounce; 172 173 /** @ptr_lock: Lock protecting reads/writes to head/tail pointers */ 174 spinlock_t ptr_lock; 175 176 /** @head: Cached head to read from */ 177 u32 head; 178 179 /** @tail: The last verified cached tail where HW has completed writing */ 180 u32 tail; 181 182 /** @circ_size: The effective circular buffer size, for Xe2+ */ 183 u32 circ_size; 184 }; 185 186 /** 187 * struct xe_oa_stream - state for a single open stream FD 188 */ 189 struct xe_oa_stream { 190 /** @oa: xe_oa backpointer */ 191 struct xe_oa *oa; 192 193 /** @gt: gt associated with the oa stream */ 194 struct xe_gt *gt; 195 196 /** @oa_unit: oa unit for this stream */ 197 struct xe_oa_unit *oa_unit; 198 199 /** @hwe: hardware engine associated with this oa stream */ 200 struct xe_hw_engine *hwe; 201 202 /** @stream_lock: Lock serializing stream operations */ 203 struct mutex stream_lock; 204 205 /** @sample: true if DRM_XE_OA_PROP_SAMPLE_OA is provided */ 206 bool sample; 207 208 /** @exec_q: Exec queue corresponding to DRM_XE_OA_PROPERTY_EXEC_QUEUE_ID */ 209 struct xe_exec_queue *exec_q; 210 211 /** @k_exec_q: kernel exec_q used for OA programming batch submissions */ 212 struct xe_exec_queue *k_exec_q; 213 214 /** @enabled: Whether the stream is currently enabled */ 215 bool enabled; 216 217 /** @oa_config: OA configuration used by the stream */ 218 struct xe_oa_config *oa_config; 219 220 /** @oa_config_bos: List of struct @xe_oa_config_bo's */ 221 struct llist_head oa_config_bos; 222 223 /** @poll_check_timer: Timer to periodically check for data in the OA buffer */ 224 struct hrtimer poll_check_timer; 225 226 /** @poll_wq: Wait queue for waiting for OA data to be available */ 227 wait_queue_head_t poll_wq; 228 229 /** @pollin: Whether there is data available to read */ 230 bool pollin; 231 232 /** @wait_num_reports: Number of reports to wait for before signalling pollin */ 233 int wait_num_reports; 234 235 /** @periodic: Whether periodic sampling is currently enabled */ 236 bool periodic; 237 238 /** @period_exponent: OA unit sampling frequency is derived from this */ 239 int period_exponent; 240 241 /** @oa_buffer: OA buffer for the stream */ 242 struct xe_oa_buffer oa_buffer; 243 244 /** @poll_period_ns: hrtimer period for checking OA buffer for available data */ 245 u64 poll_period_ns; 246 247 /** @oa_status: temporary storage for oa_status register value */ 248 u32 oa_status; 249 250 /** @no_preempt: Whether preemption and timeslicing is disabled for stream exec_q */ 251 u32 no_preempt; 252 253 /** @xef: xe_file with which the stream was opened */ 254 struct xe_file *xef; 255 256 /** @ufence_syncobj: User fence syncobj */ 257 struct drm_syncobj *ufence_syncobj; 258 259 /** @ufence_timeline_value: User fence timeline value */ 260 u64 ufence_timeline_value; 261 262 /** @last_fence: fence to use in stream destroy when needed */ 263 struct dma_fence *last_fence; 264 265 /** @num_syncs: size of @syncs array */ 266 u32 num_syncs; 267 268 /** @syncs: syncs to wait on and to signal */ 269 struct xe_sync_entry *syncs; 270 271 /** @fw_ref: Forcewake reference */ 272 unsigned int fw_ref; 273 }; 274 #endif 275