1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (c) 2023, Linaro Limited
4 */
5
6 #include <linux/module.h>
7 #include <linux/slab.h>
8 #include <linux/platform_device.h>
9 #include <linux/device.h>
10 #include <linux/kernel.h>
11 #include <linux/component.h>
12 #include <linux/pm_runtime.h>
13 #include <linux/irq.h>
14 #include <linux/irqdomain.h>
15 #include <linux/of.h>
16 #include <linux/soundwire/sdw.h>
17 #include <linux/soundwire/sdw_type.h>
18 #include <linux/soundwire/sdw_registers.h>
19 #include <linux/regmap.h>
20 #include <sound/soc.h>
21 #include <sound/soc-dapm.h>
22 #include "wcd939x.h"
23
24 #define SWRS_SCP_HOST_CLK_DIV2_CTL_BANK(m) (0xE0 + 0x10 * (m))
25
26 static const struct wcd939x_sdw_ch_info wcd939x_sdw_rx_ch_info[] = {
27 WCD_SDW_CH(WCD939X_HPH_L, WCD939X_HPH_PORT, BIT(0)),
28 WCD_SDW_CH(WCD939X_HPH_R, WCD939X_HPH_PORT, BIT(1)),
29 WCD_SDW_CH(WCD939X_CLSH, WCD939X_CLSH_PORT, BIT(0)),
30 WCD_SDW_CH(WCD939X_COMP_L, WCD939X_COMP_PORT, BIT(0)),
31 WCD_SDW_CH(WCD939X_COMP_R, WCD939X_COMP_PORT, BIT(1)),
32 WCD_SDW_CH(WCD939X_LO, WCD939X_LO_PORT, BIT(0)),
33 WCD_SDW_CH(WCD939X_DSD_L, WCD939X_DSD_PORT, BIT(0)),
34 WCD_SDW_CH(WCD939X_DSD_R, WCD939X_DSD_PORT, BIT(1)),
35 WCD_SDW_CH(WCD939X_HIFI_PCM_L, WCD939X_HIFI_PCM_PORT, BIT(0)),
36 WCD_SDW_CH(WCD939X_HIFI_PCM_R, WCD939X_HIFI_PCM_PORT, BIT(1)),
37 };
38
39 static const struct wcd939x_sdw_ch_info wcd939x_sdw_tx_ch_info[] = {
40 WCD_SDW_CH(WCD939X_ADC1, WCD939X_ADC_1_4_PORT, BIT(0)),
41 WCD_SDW_CH(WCD939X_ADC2, WCD939X_ADC_1_4_PORT, BIT(1)),
42 WCD_SDW_CH(WCD939X_ADC3, WCD939X_ADC_1_4_PORT, BIT(2)),
43 WCD_SDW_CH(WCD939X_ADC4, WCD939X_ADC_1_4_PORT, BIT(3)),
44 WCD_SDW_CH(WCD939X_DMIC0, WCD939X_DMIC_0_3_MBHC_PORT, BIT(0)),
45 WCD_SDW_CH(WCD939X_DMIC1, WCD939X_DMIC_0_3_MBHC_PORT, BIT(1)),
46 WCD_SDW_CH(WCD939X_MBHC, WCD939X_DMIC_0_3_MBHC_PORT, BIT(2)),
47 WCD_SDW_CH(WCD939X_DMIC2, WCD939X_DMIC_0_3_MBHC_PORT, BIT(2)),
48 WCD_SDW_CH(WCD939X_DMIC3, WCD939X_DMIC_0_3_MBHC_PORT, BIT(3)),
49 WCD_SDW_CH(WCD939X_DMIC4, WCD939X_DMIC_3_7_PORT, BIT(0)),
50 WCD_SDW_CH(WCD939X_DMIC5, WCD939X_DMIC_3_7_PORT, BIT(1)),
51 WCD_SDW_CH(WCD939X_DMIC6, WCD939X_DMIC_3_7_PORT, BIT(2)),
52 WCD_SDW_CH(WCD939X_DMIC7, WCD939X_DMIC_3_7_PORT, BIT(3)),
53 };
54
55 static struct sdw_dpn_prop wcd939x_rx_dpn_prop[WCD939X_MAX_RX_SWR_PORTS] = {
56 {
57 .num = WCD939X_HPH_PORT,
58 .type = SDW_DPN_SIMPLE,
59 .min_ch = 1,
60 .max_ch = 2,
61 .simple_ch_prep_sm = true,
62 },
63 {
64 .num = WCD939X_CLSH_PORT,
65 .type = SDW_DPN_SIMPLE,
66 .min_ch = 1,
67 .max_ch = 1,
68 .simple_ch_prep_sm = true,
69 },
70 {
71 .num = WCD939X_COMP_PORT,
72 .type = SDW_DPN_SIMPLE,
73 .min_ch = 1,
74 .max_ch = 2,
75 .simple_ch_prep_sm = true,
76 },
77 {
78 .num = WCD939X_LO_PORT,
79 .type = SDW_DPN_SIMPLE,
80 .min_ch = 1,
81 .max_ch = 1,
82 .simple_ch_prep_sm = true,
83 },
84 {
85 .num = WCD939X_DSD_PORT,
86 .type = SDW_DPN_SIMPLE,
87 .min_ch = 1,
88 .max_ch = 2,
89 .simple_ch_prep_sm = true,
90 },
91 {
92 .num = WCD939X_HIFI_PCM_PORT,
93 .type = SDW_DPN_SIMPLE,
94 .min_ch = 1,
95 .max_ch = 2,
96 .simple_ch_prep_sm = true,
97 }
98 };
99
100 static struct sdw_dpn_prop wcd939x_tx_dpn_prop[WCD939X_MAX_TX_SWR_PORTS] = {
101 {
102 .num = WCD939X_ADC_1_4_PORT,
103 .type = SDW_DPN_SIMPLE,
104 .min_ch = 1,
105 .max_ch = 4,
106 .simple_ch_prep_sm = true,
107 },
108 {
109 .num = WCD939X_ADC_DMIC_1_2_PORT,
110 .type = SDW_DPN_SIMPLE,
111 .min_ch = 1,
112 .max_ch = 4,
113 .simple_ch_prep_sm = true,
114 },
115 {
116 .num = WCD939X_DMIC_0_3_MBHC_PORT,
117 .type = SDW_DPN_SIMPLE,
118 .min_ch = 1,
119 .max_ch = 4,
120 .simple_ch_prep_sm = true,
121 },
122 {
123 .num = WCD939X_DMIC_3_7_PORT,
124 .type = SDW_DPN_SIMPLE,
125 .min_ch = 1,
126 .max_ch = 4,
127 .simple_ch_prep_sm = true,
128 }
129 };
130
wcd939x_sdw_device_get(struct device_node * np)131 struct device *wcd939x_sdw_device_get(struct device_node *np)
132 {
133 return bus_find_device_by_of_node(&sdw_bus_type, np);
134 }
135 EXPORT_SYMBOL_GPL(wcd939x_sdw_device_get);
136
wcd939x_swr_get_current_bank(struct sdw_slave * sdev)137 unsigned int wcd939x_swr_get_current_bank(struct sdw_slave *sdev)
138 {
139 return FIELD_GET(SDW_SCP_STAT_CURR_BANK,
140 sdw_read(sdev, SDW_SCP_CTRL));
141 }
142 EXPORT_SYMBOL_GPL(wcd939x_swr_get_current_bank);
143
wcd939x_sdw_hw_params(struct wcd939x_sdw_priv * wcd,struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)144 int wcd939x_sdw_hw_params(struct wcd939x_sdw_priv *wcd,
145 struct snd_pcm_substream *substream,
146 struct snd_pcm_hw_params *params,
147 struct snd_soc_dai *dai)
148 {
149 struct sdw_port_config port_config[WCD939X_MAX_SWR_PORTS];
150 unsigned long ch_mask;
151 int i, j;
152
153 wcd->sconfig.ch_count = 1;
154 wcd->active_ports = 0;
155 for (i = 0; i < WCD939X_MAX_SWR_PORTS; i++) {
156 ch_mask = wcd->port_config[i].ch_mask;
157
158 if (!ch_mask)
159 continue;
160
161 for_each_set_bit(j, &ch_mask, 4)
162 wcd->sconfig.ch_count++;
163
164 port_config[wcd->active_ports] = wcd->port_config[i];
165 wcd->active_ports++;
166 }
167
168 wcd->sconfig.bps = 1;
169 wcd->sconfig.frame_rate = params_rate(params);
170 if (wcd->is_tx)
171 wcd->sconfig.direction = SDW_DATA_DIR_TX;
172 else
173 wcd->sconfig.direction = SDW_DATA_DIR_RX;
174
175 wcd->sconfig.type = SDW_STREAM_PCM;
176
177 return sdw_stream_add_slave(wcd->sdev, &wcd->sconfig, &port_config[0],
178 wcd->active_ports, wcd->sruntime);
179 }
180 EXPORT_SYMBOL_GPL(wcd939x_sdw_hw_params);
181
wcd939x_sdw_free(struct wcd939x_sdw_priv * wcd,struct snd_pcm_substream * substream,struct snd_soc_dai * dai)182 int wcd939x_sdw_free(struct wcd939x_sdw_priv *wcd,
183 struct snd_pcm_substream *substream,
184 struct snd_soc_dai *dai)
185 {
186 sdw_stream_remove_slave(wcd->sdev, wcd->sruntime);
187
188 return 0;
189 }
190 EXPORT_SYMBOL_GPL(wcd939x_sdw_free);
191
wcd939x_sdw_set_sdw_stream(struct wcd939x_sdw_priv * wcd,struct snd_soc_dai * dai,void * stream,int direction)192 int wcd939x_sdw_set_sdw_stream(struct wcd939x_sdw_priv *wcd,
193 struct snd_soc_dai *dai, void *stream,
194 int direction)
195 {
196 wcd->sruntime = stream;
197
198 return 0;
199 }
200 EXPORT_SYMBOL_GPL(wcd939x_sdw_set_sdw_stream);
201
wcd939x_swr_get_regmap(struct wcd939x_sdw_priv * wcd)202 struct regmap *wcd939x_swr_get_regmap(struct wcd939x_sdw_priv *wcd)
203 {
204 if (wcd->regmap)
205 return wcd->regmap;
206
207 return ERR_PTR(-EINVAL);
208 }
209 EXPORT_SYMBOL_GPL(wcd939x_swr_get_regmap);
210
wcd9390_update_status(struct sdw_slave * slave,enum sdw_slave_status status)211 static int wcd9390_update_status(struct sdw_slave *slave,
212 enum sdw_slave_status status)
213 {
214 struct wcd939x_sdw_priv *wcd = dev_get_drvdata(&slave->dev);
215
216 if (wcd->regmap && status == SDW_SLAVE_ATTACHED) {
217 /* Write out any cached changes that happened between probe and attach */
218 regcache_cache_only(wcd->regmap, false);
219 return regcache_sync(wcd->regmap);
220 }
221
222 return 0;
223 }
224
wcd9390_bus_config(struct sdw_slave * slave,struct sdw_bus_params * params)225 static int wcd9390_bus_config(struct sdw_slave *slave,
226 struct sdw_bus_params *params)
227 {
228 sdw_write(slave, SWRS_SCP_HOST_CLK_DIV2_CTL_BANK(params->next_bank),
229 0x01);
230
231 return 0;
232 }
233
234 /*
235 * Handle Soundwire out-of-band interrupt event by triggering
236 * the first irq of the slave_irq irq domain, which then will
237 * be handled by the regmap_irq threaded irq.
238 * Looping is to ensure no interrupts were missed in the process.
239 */
wcd9390_interrupt_callback(struct sdw_slave * slave,struct sdw_slave_intr_status * status)240 static int wcd9390_interrupt_callback(struct sdw_slave *slave,
241 struct sdw_slave_intr_status *status)
242 {
243 struct wcd939x_sdw_priv *wcd = dev_get_drvdata(&slave->dev);
244 struct irq_domain *slave_irq = wcd->slave_irq;
245 u32 sts1, sts2, sts3;
246
247 do {
248 handle_nested_irq(irq_find_mapping(slave_irq, 0));
249 regmap_read(wcd->regmap, WCD939X_DIGITAL_INTR_STATUS_0, &sts1);
250 regmap_read(wcd->regmap, WCD939X_DIGITAL_INTR_STATUS_1, &sts2);
251 regmap_read(wcd->regmap, WCD939X_DIGITAL_INTR_STATUS_2, &sts3);
252
253 } while (sts1 || sts2 || sts3);
254
255 return IRQ_HANDLED;
256 }
257
258 static const struct reg_default wcd939x_defaults[] = {
259 /* Default values except for Read-Only & Volatile registers */
260 { WCD939X_ANA_PAGE, 0x00 },
261 { WCD939X_ANA_BIAS, 0x00 },
262 { WCD939X_ANA_RX_SUPPLIES, 0x00 },
263 { WCD939X_ANA_HPH, 0x0c },
264 { WCD939X_ANA_EAR, 0x00 },
265 { WCD939X_ANA_EAR_COMPANDER_CTL, 0x02 },
266 { WCD939X_ANA_TX_CH1, 0x20 },
267 { WCD939X_ANA_TX_CH2, 0x00 },
268 { WCD939X_ANA_TX_CH3, 0x20 },
269 { WCD939X_ANA_TX_CH4, 0x00 },
270 { WCD939X_ANA_MICB1_MICB2_DSP_EN_LOGIC, 0x00 },
271 { WCD939X_ANA_MICB3_DSP_EN_LOGIC, 0x00 },
272 { WCD939X_ANA_MBHC_MECH, 0x39 },
273 { WCD939X_ANA_MBHC_ELECT, 0x08 },
274 { WCD939X_ANA_MBHC_ZDET, 0x00 },
275 { WCD939X_ANA_MBHC_BTN0, 0x00 },
276 { WCD939X_ANA_MBHC_BTN1, 0x10 },
277 { WCD939X_ANA_MBHC_BTN2, 0x20 },
278 { WCD939X_ANA_MBHC_BTN3, 0x30 },
279 { WCD939X_ANA_MBHC_BTN4, 0x40 },
280 { WCD939X_ANA_MBHC_BTN5, 0x50 },
281 { WCD939X_ANA_MBHC_BTN6, 0x60 },
282 { WCD939X_ANA_MBHC_BTN7, 0x70 },
283 { WCD939X_ANA_MICB1, 0x10 },
284 { WCD939X_ANA_MICB2, 0x10 },
285 { WCD939X_ANA_MICB2_RAMP, 0x00 },
286 { WCD939X_ANA_MICB3, 0x00 },
287 { WCD939X_ANA_MICB4, 0x00 },
288 { WCD939X_BIAS_CTL, 0x2a },
289 { WCD939X_BIAS_VBG_FINE_ADJ, 0x55 },
290 { WCD939X_LDOL_VDDCX_ADJUST, 0x01 },
291 { WCD939X_LDOL_DISABLE_LDOL, 0x00 },
292 { WCD939X_MBHC_CTL_CLK, 0x00 },
293 { WCD939X_MBHC_CTL_ANA, 0x00 },
294 { WCD939X_MBHC_ZDET_VNEG_CTL, 0x00 },
295 { WCD939X_MBHC_ZDET_BIAS_CTL, 0x46 },
296 { WCD939X_MBHC_CTL_BCS, 0x00 },
297 { WCD939X_MBHC_TEST_CTL, 0x00 },
298 { WCD939X_LDOH_MODE, 0x2b },
299 { WCD939X_LDOH_BIAS, 0x68 },
300 { WCD939X_LDOH_STB_LOADS, 0x00 },
301 { WCD939X_LDOH_SLOWRAMP, 0x50 },
302 { WCD939X_MICB1_TEST_CTL_1, 0x1a },
303 { WCD939X_MICB1_TEST_CTL_2, 0x00 },
304 { WCD939X_MICB1_TEST_CTL_3, 0xa4 },
305 { WCD939X_MICB2_TEST_CTL_1, 0x1a },
306 { WCD939X_MICB2_TEST_CTL_2, 0x00 },
307 { WCD939X_MICB2_TEST_CTL_3, 0x24 },
308 { WCD939X_MICB3_TEST_CTL_1, 0x9a },
309 { WCD939X_MICB3_TEST_CTL_2, 0x80 },
310 { WCD939X_MICB3_TEST_CTL_3, 0x24 },
311 { WCD939X_MICB4_TEST_CTL_1, 0x1a },
312 { WCD939X_MICB4_TEST_CTL_2, 0x80 },
313 { WCD939X_MICB4_TEST_CTL_3, 0x24 },
314 { WCD939X_TX_COM_ADC_VCM, 0x39 },
315 { WCD939X_TX_COM_BIAS_ATEST, 0xe0 },
316 { WCD939X_TX_COM_SPARE1, 0x00 },
317 { WCD939X_TX_COM_SPARE2, 0x00 },
318 { WCD939X_TX_COM_TXFE_DIV_CTL, 0x22 },
319 { WCD939X_TX_COM_TXFE_DIV_START, 0x00 },
320 { WCD939X_TX_COM_SPARE3, 0x00 },
321 { WCD939X_TX_COM_SPARE4, 0x00 },
322 { WCD939X_TX_1_2_TEST_EN, 0xcc },
323 { WCD939X_TX_1_2_ADC_IB, 0xe9 },
324 { WCD939X_TX_1_2_ATEST_REFCTL, 0x0b },
325 { WCD939X_TX_1_2_TEST_CTL, 0x38 },
326 { WCD939X_TX_1_2_TEST_BLK_EN1, 0xff },
327 { WCD939X_TX_1_2_TXFE1_CLKDIV, 0x00 },
328 { WCD939X_TX_3_4_TEST_EN, 0xcc },
329 { WCD939X_TX_3_4_ADC_IB, 0xe9 },
330 { WCD939X_TX_3_4_ATEST_REFCTL, 0x0b },
331 { WCD939X_TX_3_4_TEST_CTL, 0x38 },
332 { WCD939X_TX_3_4_TEST_BLK_EN3, 0xff },
333 { WCD939X_TX_3_4_TXFE3_CLKDIV, 0x00 },
334 { WCD939X_TX_3_4_TEST_BLK_EN2, 0xfb },
335 { WCD939X_TX_3_4_TXFE2_CLKDIV, 0x00 },
336 { WCD939X_TX_3_4_SPARE1, 0x00 },
337 { WCD939X_TX_3_4_TEST_BLK_EN4, 0xfb },
338 { WCD939X_TX_3_4_TXFE4_CLKDIV, 0x00 },
339 { WCD939X_TX_3_4_SPARE2, 0x00 },
340 { WCD939X_CLASSH_MODE_1, 0x40 },
341 { WCD939X_CLASSH_MODE_2, 0x3a },
342 { WCD939X_CLASSH_MODE_3, 0xf0 },
343 { WCD939X_CLASSH_CTRL_VCL_1, 0x7c },
344 { WCD939X_CLASSH_CTRL_VCL_2, 0x82 },
345 { WCD939X_CLASSH_CTRL_CCL_1, 0x31 },
346 { WCD939X_CLASSH_CTRL_CCL_2, 0x80 },
347 { WCD939X_CLASSH_CTRL_CCL_3, 0x80 },
348 { WCD939X_CLASSH_CTRL_CCL_4, 0x51 },
349 { WCD939X_CLASSH_CTRL_CCL_5, 0x00 },
350 { WCD939X_CLASSH_BUCK_TMUX_A_D, 0x00 },
351 { WCD939X_CLASSH_BUCK_SW_DRV_CNTL, 0x77 },
352 { WCD939X_CLASSH_SPARE, 0x80 },
353 { WCD939X_FLYBACK_EN, 0x4e },
354 { WCD939X_FLYBACK_VNEG_CTRL_1, 0x0b },
355 { WCD939X_FLYBACK_VNEG_CTRL_2, 0x45 },
356 { WCD939X_FLYBACK_VNEG_CTRL_3, 0x14 },
357 { WCD939X_FLYBACK_VNEG_CTRL_4, 0xdb },
358 { WCD939X_FLYBACK_VNEG_CTRL_5, 0x83 },
359 { WCD939X_FLYBACK_VNEG_CTRL_6, 0x98 },
360 { WCD939X_FLYBACK_VNEG_CTRL_7, 0xa9 },
361 { WCD939X_FLYBACK_VNEG_CTRL_8, 0x68 },
362 { WCD939X_FLYBACK_VNEG_CTRL_9, 0x66 },
363 { WCD939X_FLYBACK_VNEGDAC_CTRL_1, 0xed },
364 { WCD939X_FLYBACK_VNEGDAC_CTRL_2, 0xf8 },
365 { WCD939X_FLYBACK_VNEGDAC_CTRL_3, 0xa6 },
366 { WCD939X_FLYBACK_CTRL_1, 0x65 },
367 { WCD939X_FLYBACK_TEST_CTL, 0x02 },
368 { WCD939X_RX_AUX_SW_CTL, 0x00 },
369 { WCD939X_RX_PA_AUX_IN_CONN, 0x01 },
370 { WCD939X_RX_TIMER_DIV, 0x32 },
371 { WCD939X_RX_OCP_CTL, 0x1f },
372 { WCD939X_RX_OCP_COUNT, 0x77 },
373 { WCD939X_RX_BIAS_EAR_DAC, 0xa0 },
374 { WCD939X_RX_BIAS_EAR_AMP, 0xaa },
375 { WCD939X_RX_BIAS_HPH_LDO, 0xa9 },
376 { WCD939X_RX_BIAS_HPH_PA, 0xaa },
377 { WCD939X_RX_BIAS_HPH_RDACBUFF_CNP2, 0xca },
378 { WCD939X_RX_BIAS_HPH_RDAC_LDO, 0x88 },
379 { WCD939X_RX_BIAS_HPH_CNP1, 0x82 },
380 { WCD939X_RX_BIAS_HPH_LOWPOWER, 0x82 },
381 { WCD939X_RX_BIAS_AUX_DAC, 0xa0 },
382 { WCD939X_RX_BIAS_AUX_AMP, 0xaa },
383 { WCD939X_RX_BIAS_VNEGDAC_BLEEDER, 0x50 },
384 { WCD939X_RX_BIAS_MISC, 0x00 },
385 { WCD939X_RX_BIAS_BUCK_RST, 0x08 },
386 { WCD939X_RX_BIAS_BUCK_VREF_ERRAMP, 0x44 },
387 { WCD939X_RX_BIAS_FLYB_ERRAMP, 0x40 },
388 { WCD939X_RX_BIAS_FLYB_BUFF, 0xaa },
389 { WCD939X_RX_BIAS_FLYB_MID_RST, 0x14 },
390 { WCD939X_HPH_CNP_EN, 0x80 },
391 { WCD939X_HPH_CNP_WG_CTL, 0x9a },
392 { WCD939X_HPH_CNP_WG_TIME, 0x14 },
393 { WCD939X_HPH_OCP_CTL, 0x28 },
394 { WCD939X_HPH_AUTO_CHOP, 0x56 },
395 { WCD939X_HPH_CHOP_CTL, 0x83 },
396 { WCD939X_HPH_PA_CTL1, 0x46 },
397 { WCD939X_HPH_PA_CTL2, 0x50 },
398 { WCD939X_HPH_L_EN, 0x80 },
399 { WCD939X_HPH_L_TEST, 0xe0 },
400 { WCD939X_HPH_L_ATEST, 0x50 },
401 { WCD939X_HPH_R_EN, 0x80 },
402 { WCD939X_HPH_R_TEST, 0xe0 },
403 { WCD939X_HPH_R_ATEST, 0x50 },
404 { WCD939X_HPH_RDAC_CLK_CTL1, 0x80 },
405 { WCD939X_HPH_RDAC_CLK_CTL2, 0x0b },
406 { WCD939X_HPH_RDAC_LDO_CTL, 0x33 },
407 { WCD939X_HPH_RDAC_CHOP_CLK_LP_CTL, 0x00 },
408 { WCD939X_HPH_REFBUFF_UHQA_CTL, 0x00 },
409 { WCD939X_HPH_REFBUFF_LP_CTL, 0x8e },
410 { WCD939X_HPH_L_DAC_CTL, 0x20 },
411 { WCD939X_HPH_R_DAC_CTL, 0x20 },
412 { WCD939X_HPH_SURGE_COMP_SEL, 0x55 },
413 { WCD939X_HPH_SURGE_EN, 0x19 },
414 { WCD939X_HPH_SURGE_MISC1, 0xa0 },
415 { WCD939X_EAR_EN, 0x22 },
416 { WCD939X_EAR_PA_CON, 0x44 },
417 { WCD939X_EAR_SP_CON, 0xdb },
418 { WCD939X_EAR_DAC_CON, 0x80 },
419 { WCD939X_EAR_CNP_FSM_CON, 0xb2 },
420 { WCD939X_EAR_TEST_CTL, 0x00 },
421 { WCD939X_FLYBACK_NEW_CTRL_2, 0x00 },
422 { WCD939X_FLYBACK_NEW_CTRL_3, 0x00 },
423 { WCD939X_FLYBACK_NEW_CTRL_4, 0x44 },
424 { WCD939X_ANA_NEW_PAGE, 0x00 },
425 { WCD939X_HPH_NEW_ANA_HPH2, 0x00 },
426 { WCD939X_HPH_NEW_ANA_HPH3, 0x00 },
427 { WCD939X_SLEEP_CTL, 0x18 },
428 { WCD939X_SLEEP_WATCHDOG_CTL, 0x00 },
429 { WCD939X_MBHC_NEW_ELECT_REM_CLAMP_CTL, 0x00 },
430 { WCD939X_MBHC_NEW_CTL_1, 0x02 },
431 { WCD939X_MBHC_NEW_CTL_2, 0x05 },
432 { WCD939X_MBHC_NEW_PLUG_DETECT_CTL, 0xe9 },
433 { WCD939X_MBHC_NEW_ZDET_ANA_CTL, 0x0f },
434 { WCD939X_MBHC_NEW_ZDET_RAMP_CTL, 0x00 },
435 { WCD939X_TX_NEW_CH12_MUX, 0x11 },
436 { WCD939X_TX_NEW_CH34_MUX, 0x23 },
437 { WCD939X_DIE_CRACK_DET_EN, 0x00 },
438 { WCD939X_HPH_NEW_INT_RDAC_GAIN_CTL, 0x00 },
439 { WCD939X_HPH_NEW_INT_PA_GAIN_CTL_L, 0x00 },
440 { WCD939X_HPH_NEW_INT_RDAC_VREF_CTL, 0x08 },
441 { WCD939X_HPH_NEW_INT_RDAC_OVERRIDE_CTL, 0x00 },
442 { WCD939X_HPH_NEW_INT_PA_GAIN_CTL_R, 0x00 },
443 { WCD939X_HPH_NEW_INT_PA_MISC1, 0x32 },
444 { WCD939X_HPH_NEW_INT_PA_MISC2, 0x00 },
445 { WCD939X_HPH_NEW_INT_PA_RDAC_MISC, 0x00 },
446 { WCD939X_HPH_NEW_INT_TIMER1, 0xfe },
447 { WCD939X_HPH_NEW_INT_TIMER2, 0x02 },
448 { WCD939X_HPH_NEW_INT_TIMER3, 0x4e },
449 { WCD939X_HPH_NEW_INT_TIMER4, 0x54 },
450 { WCD939X_HPH_NEW_INT_PA_RDAC_MISC2, 0x0b },
451 { WCD939X_HPH_NEW_INT_PA_RDAC_MISC3, 0x00 },
452 { WCD939X_HPH_NEW_INT_RDAC_HD2_CTL_L, 0xa0 },
453 { WCD939X_HPH_NEW_INT_RDAC_HD2_CTL_R, 0xa0 },
454 { WCD939X_RX_NEW_INT_HPH_RDAC_BIAS_LOHIFI, 0x64 },
455 { WCD939X_RX_NEW_INT_HPH_RDAC_BIAS_ULP, 0x01 },
456 { WCD939X_RX_NEW_INT_HPH_RDAC_LDO_LP, 0x11 },
457 { WCD939X_MBHC_NEW_INT_MOISTURE_DET_DC_CTRL, 0x57 },
458 { WCD939X_MBHC_NEW_INT_MOISTURE_DET_POLLING_CTRL, 0x01 },
459 { WCD939X_MBHC_NEW_INT_MECH_DET_CURRENT, 0x00 },
460 { WCD939X_MBHC_NEW_INT_ZDET_CLK_AND_MOISTURE_CTL_NEW, 0x47 },
461 { WCD939X_EAR_INT_NEW_CHOPPER_CON, 0xa8 },
462 { WCD939X_EAR_INT_NEW_CNP_VCM_CON1, 0x42 },
463 { WCD939X_EAR_INT_NEW_CNP_VCM_CON2, 0x22 },
464 { WCD939X_EAR_INT_NEW_DYNAMIC_BIAS, 0x00 },
465 { WCD939X_SLEEP_INT_WATCHDOG_CTL_1, 0x0a },
466 { WCD939X_SLEEP_INT_WATCHDOG_CTL_2, 0x0a },
467 { WCD939X_DIE_CRACK_INT_DET_INT1, 0x02 },
468 { WCD939X_DIE_CRACK_INT_DET_INT2, 0x60 },
469 { WCD939X_TX_COM_NEW_INT_FE_DIVSTOP_L2, 0xff },
470 { WCD939X_TX_COM_NEW_INT_FE_DIVSTOP_L1, 0x7f },
471 { WCD939X_TX_COM_NEW_INT_FE_DIVSTOP_L0, 0x3f },
472 { WCD939X_TX_COM_NEW_INT_FE_DIVSTOP_ULP1P2M, 0x1f },
473 { WCD939X_TX_COM_NEW_INT_FE_DIVSTOP_ULP0P6M, 0x0f },
474 { WCD939X_TX_COM_NEW_INT_FE_ICTRL_STG1_L2L1, 0xd7 },
475 { WCD939X_TX_COM_NEW_INT_FE_ICTRL_STG1_L0, 0xc8 },
476 { WCD939X_TX_COM_NEW_INT_FE_ICTRL_STG1_ULP, 0xc6 },
477 { WCD939X_TX_COM_NEW_INT_FE_ICTRL_STG2MAIN_L2L1, 0x95 },
478 { WCD939X_TX_COM_NEW_INT_FE_ICTRL_STG2MAIN_L0, 0x6a },
479 { WCD939X_TX_COM_NEW_INT_FE_ICTRL_STG2MAIN_ULP, 0x05 },
480 { WCD939X_TX_COM_NEW_INT_FE_ICTRL_STG2CASC_L2L1L0, 0xa5 },
481 { WCD939X_TX_COM_NEW_INT_FE_ICTRL_STG2CASC_ULP, 0x13 },
482 { WCD939X_TX_COM_NEW_INT_ADC_SCBIAS_L2L1, 0x88 },
483 { WCD939X_TX_COM_NEW_INT_ADC_SCBIAS_L0ULP, 0x42 },
484 { WCD939X_TX_COM_NEW_INT_ADC_INT_L2, 0xff },
485 { WCD939X_TX_COM_NEW_INT_ADC_INT_L1, 0x64 },
486 { WCD939X_TX_COM_NEW_INT_ADC_INT_L0, 0x64 },
487 { WCD939X_TX_COM_NEW_INT_ADC_INT_ULP, 0x77 },
488 { WCD939X_DIGITAL_PAGE, 0x00 },
489 { WCD939X_DIGITAL_SWR_TX_CLK_RATE, 0x00 },
490 { WCD939X_DIGITAL_CDC_RST_CTL, 0x03 },
491 { WCD939X_DIGITAL_TOP_CLK_CFG, 0x00 },
492 { WCD939X_DIGITAL_CDC_ANA_CLK_CTL, 0x00 },
493 { WCD939X_DIGITAL_CDC_DIG_CLK_CTL, 0xf0 },
494 { WCD939X_DIGITAL_SWR_RST_EN, 0x00 },
495 { WCD939X_DIGITAL_CDC_PATH_MODE, 0x55 },
496 { WCD939X_DIGITAL_CDC_RX_RST, 0x00 },
497 { WCD939X_DIGITAL_CDC_RX0_CTL, 0xfc },
498 { WCD939X_DIGITAL_CDC_RX1_CTL, 0xfc },
499 { WCD939X_DIGITAL_CDC_RX2_CTL, 0xfc },
500 { WCD939X_DIGITAL_CDC_TX_ANA_MODE_0_1, 0x00 },
501 { WCD939X_DIGITAL_CDC_TX_ANA_MODE_2_3, 0x00 },
502 { WCD939X_DIGITAL_CDC_COMP_CTL_0, 0x00 },
503 { WCD939X_DIGITAL_CDC_ANA_TX_CLK_CTL, 0x1e },
504 { WCD939X_DIGITAL_CDC_HPH_DSM_A1_0, 0x00 },
505 { WCD939X_DIGITAL_CDC_HPH_DSM_A1_1, 0x01 },
506 { WCD939X_DIGITAL_CDC_HPH_DSM_A2_0, 0x63 },
507 { WCD939X_DIGITAL_CDC_HPH_DSM_A2_1, 0x04 },
508 { WCD939X_DIGITAL_CDC_HPH_DSM_A3_0, 0xac },
509 { WCD939X_DIGITAL_CDC_HPH_DSM_A3_1, 0x04 },
510 { WCD939X_DIGITAL_CDC_HPH_DSM_A4_0, 0x1a },
511 { WCD939X_DIGITAL_CDC_HPH_DSM_A4_1, 0x03 },
512 { WCD939X_DIGITAL_CDC_HPH_DSM_A5_0, 0xbc },
513 { WCD939X_DIGITAL_CDC_HPH_DSM_A5_1, 0x02 },
514 { WCD939X_DIGITAL_CDC_HPH_DSM_A6_0, 0xc7 },
515 { WCD939X_DIGITAL_CDC_HPH_DSM_A7_0, 0xf8 },
516 { WCD939X_DIGITAL_CDC_HPH_DSM_C_0, 0x47 },
517 { WCD939X_DIGITAL_CDC_HPH_DSM_C_1, 0x43 },
518 { WCD939X_DIGITAL_CDC_HPH_DSM_C_2, 0xb1 },
519 { WCD939X_DIGITAL_CDC_HPH_DSM_C_3, 0x17 },
520 { WCD939X_DIGITAL_CDC_HPH_DSM_R1, 0x4d },
521 { WCD939X_DIGITAL_CDC_HPH_DSM_R2, 0x29 },
522 { WCD939X_DIGITAL_CDC_HPH_DSM_R3, 0x34 },
523 { WCD939X_DIGITAL_CDC_HPH_DSM_R4, 0x59 },
524 { WCD939X_DIGITAL_CDC_HPH_DSM_R5, 0x66 },
525 { WCD939X_DIGITAL_CDC_HPH_DSM_R6, 0x87 },
526 { WCD939X_DIGITAL_CDC_HPH_DSM_R7, 0x64 },
527 { WCD939X_DIGITAL_CDC_EAR_DSM_A1_0, 0x00 },
528 { WCD939X_DIGITAL_CDC_EAR_DSM_A1_1, 0x01 },
529 { WCD939X_DIGITAL_CDC_EAR_DSM_A2_0, 0x96 },
530 { WCD939X_DIGITAL_CDC_EAR_DSM_A2_1, 0x09 },
531 { WCD939X_DIGITAL_CDC_EAR_DSM_A3_0, 0xab },
532 { WCD939X_DIGITAL_CDC_EAR_DSM_A3_1, 0x05 },
533 { WCD939X_DIGITAL_CDC_EAR_DSM_A4_0, 0x1c },
534 { WCD939X_DIGITAL_CDC_EAR_DSM_A4_1, 0x02 },
535 { WCD939X_DIGITAL_CDC_EAR_DSM_A5_0, 0x17 },
536 { WCD939X_DIGITAL_CDC_EAR_DSM_A5_1, 0x02 },
537 { WCD939X_DIGITAL_CDC_EAR_DSM_A6_0, 0xaa },
538 { WCD939X_DIGITAL_CDC_EAR_DSM_A7_0, 0xe3 },
539 { WCD939X_DIGITAL_CDC_EAR_DSM_C_0, 0x69 },
540 { WCD939X_DIGITAL_CDC_EAR_DSM_C_1, 0x54 },
541 { WCD939X_DIGITAL_CDC_EAR_DSM_C_2, 0x02 },
542 { WCD939X_DIGITAL_CDC_EAR_DSM_C_3, 0x15 },
543 { WCD939X_DIGITAL_CDC_EAR_DSM_R1, 0xa4 },
544 { WCD939X_DIGITAL_CDC_EAR_DSM_R2, 0xb5 },
545 { WCD939X_DIGITAL_CDC_EAR_DSM_R3, 0x86 },
546 { WCD939X_DIGITAL_CDC_EAR_DSM_R4, 0x85 },
547 { WCD939X_DIGITAL_CDC_EAR_DSM_R5, 0xaa },
548 { WCD939X_DIGITAL_CDC_EAR_DSM_R6, 0xe2 },
549 { WCD939X_DIGITAL_CDC_EAR_DSM_R7, 0x62 },
550 { WCD939X_DIGITAL_CDC_HPH_GAIN_RX_0, 0x55 },
551 { WCD939X_DIGITAL_CDC_HPH_GAIN_RX_1, 0xa9 },
552 { WCD939X_DIGITAL_CDC_HPH_GAIN_DSD_0, 0x3d },
553 { WCD939X_DIGITAL_CDC_HPH_GAIN_DSD_1, 0x2e },
554 { WCD939X_DIGITAL_CDC_HPH_GAIN_DSD_2, 0x01 },
555 { WCD939X_DIGITAL_CDC_EAR_GAIN_DSD_0, 0x00 },
556 { WCD939X_DIGITAL_CDC_EAR_GAIN_DSD_1, 0xfc },
557 { WCD939X_DIGITAL_CDC_EAR_GAIN_DSD_2, 0x01 },
558 { WCD939X_DIGITAL_CDC_HPH_GAIN_CTL, 0x00 },
559 { WCD939X_DIGITAL_CDC_EAR_GAIN_CTL, 0x00 },
560 { WCD939X_DIGITAL_CDC_EAR_PATH_CTL, 0x00 },
561 { WCD939X_DIGITAL_CDC_SWR_CLH, 0x00 },
562 { WCD939X_DIGITAL_SWR_CLH_BYP, 0x00 },
563 { WCD939X_DIGITAL_CDC_TX0_CTL, 0x68 },
564 { WCD939X_DIGITAL_CDC_TX1_CTL, 0x68 },
565 { WCD939X_DIGITAL_CDC_TX2_CTL, 0x68 },
566 { WCD939X_DIGITAL_CDC_TX_RST, 0x00 },
567 { WCD939X_DIGITAL_CDC_REQ_CTL, 0x01 },
568 { WCD939X_DIGITAL_CDC_RST, 0x00 },
569 { WCD939X_DIGITAL_CDC_AMIC_CTL, 0x0f },
570 { WCD939X_DIGITAL_CDC_DMIC_CTL, 0x04 },
571 { WCD939X_DIGITAL_CDC_DMIC1_CTL, 0x01 },
572 { WCD939X_DIGITAL_CDC_DMIC2_CTL, 0x01 },
573 { WCD939X_DIGITAL_CDC_DMIC3_CTL, 0x01 },
574 { WCD939X_DIGITAL_CDC_DMIC4_CTL, 0x01 },
575 { WCD939X_DIGITAL_EFUSE_PRG_CTL, 0x00 },
576 { WCD939X_DIGITAL_EFUSE_CTL, 0x2b },
577 { WCD939X_DIGITAL_CDC_DMIC_RATE_1_2, 0x11 },
578 { WCD939X_DIGITAL_CDC_DMIC_RATE_3_4, 0x11 },
579 { WCD939X_DIGITAL_PDM_WD_CTL0, 0x00 },
580 { WCD939X_DIGITAL_PDM_WD_CTL1, 0x00 },
581 { WCD939X_DIGITAL_PDM_WD_CTL2, 0x00 },
582 { WCD939X_DIGITAL_INTR_MODE, 0x00 },
583 { WCD939X_DIGITAL_INTR_MASK_0, 0xff },
584 { WCD939X_DIGITAL_INTR_MASK_1, 0xe7 },
585 { WCD939X_DIGITAL_INTR_MASK_2, 0x0e },
586 { WCD939X_DIGITAL_INTR_CLEAR_0, 0x00 },
587 { WCD939X_DIGITAL_INTR_CLEAR_1, 0x00 },
588 { WCD939X_DIGITAL_INTR_CLEAR_2, 0x00 },
589 { WCD939X_DIGITAL_INTR_LEVEL_0, 0x00 },
590 { WCD939X_DIGITAL_INTR_LEVEL_1, 0x00 },
591 { WCD939X_DIGITAL_INTR_LEVEL_2, 0x00 },
592 { WCD939X_DIGITAL_INTR_SET_0, 0x00 },
593 { WCD939X_DIGITAL_INTR_SET_1, 0x00 },
594 { WCD939X_DIGITAL_INTR_SET_2, 0x00 },
595 { WCD939X_DIGITAL_INTR_TEST_0, 0x00 },
596 { WCD939X_DIGITAL_INTR_TEST_1, 0x00 },
597 { WCD939X_DIGITAL_INTR_TEST_2, 0x00 },
598 { WCD939X_DIGITAL_TX_MODE_DBG_EN, 0x00 },
599 { WCD939X_DIGITAL_TX_MODE_DBG_0_1, 0x00 },
600 { WCD939X_DIGITAL_TX_MODE_DBG_2_3, 0x00 },
601 { WCD939X_DIGITAL_LB_IN_SEL_CTL, 0x00 },
602 { WCD939X_DIGITAL_LOOP_BACK_MODE, 0x00 },
603 { WCD939X_DIGITAL_SWR_DAC_TEST, 0x00 },
604 { WCD939X_DIGITAL_SWR_HM_TEST_RX_0, 0x40 },
605 { WCD939X_DIGITAL_SWR_HM_TEST_TX_0, 0x40 },
606 { WCD939X_DIGITAL_SWR_HM_TEST_RX_1, 0x00 },
607 { WCD939X_DIGITAL_SWR_HM_TEST_TX_1, 0x00 },
608 { WCD939X_DIGITAL_SWR_HM_TEST_TX_2, 0x00 },
609 { WCD939X_DIGITAL_PAD_CTL_SWR_0, 0x8f },
610 { WCD939X_DIGITAL_PAD_CTL_SWR_1, 0x06 },
611 { WCD939X_DIGITAL_I2C_CTL, 0x00 },
612 { WCD939X_DIGITAL_CDC_TX_TANGGU_SW_MODE, 0x00 },
613 { WCD939X_DIGITAL_EFUSE_TEST_CTL_0, 0x00 },
614 { WCD939X_DIGITAL_EFUSE_TEST_CTL_1, 0x00 },
615 { WCD939X_DIGITAL_PAD_CTL_PDM_RX0, 0xf1 },
616 { WCD939X_DIGITAL_PAD_CTL_PDM_RX1, 0xf1 },
617 { WCD939X_DIGITAL_PAD_CTL_PDM_TX0, 0xf1 },
618 { WCD939X_DIGITAL_PAD_CTL_PDM_TX1, 0xf1 },
619 { WCD939X_DIGITAL_PAD_CTL_PDM_TX2, 0xf1 },
620 { WCD939X_DIGITAL_PAD_INP_DIS_0, 0x00 },
621 { WCD939X_DIGITAL_PAD_INP_DIS_1, 0x00 },
622 { WCD939X_DIGITAL_DRIVE_STRENGTH_0, 0x00 },
623 { WCD939X_DIGITAL_DRIVE_STRENGTH_1, 0x00 },
624 { WCD939X_DIGITAL_DRIVE_STRENGTH_2, 0x00 },
625 { WCD939X_DIGITAL_RX_DATA_EDGE_CTL, 0x1f },
626 { WCD939X_DIGITAL_TX_DATA_EDGE_CTL, 0x80 },
627 { WCD939X_DIGITAL_GPIO_MODE, 0x00 },
628 { WCD939X_DIGITAL_PIN_CTL_OE, 0x00 },
629 { WCD939X_DIGITAL_PIN_CTL_DATA_0, 0x00 },
630 { WCD939X_DIGITAL_PIN_CTL_DATA_1, 0x00 },
631 { WCD939X_DIGITAL_DIG_DEBUG_CTL, 0x00 },
632 { WCD939X_DIGITAL_DIG_DEBUG_EN, 0x00 },
633 { WCD939X_DIGITAL_ANA_CSR_DBG_ADD, 0x00 },
634 { WCD939X_DIGITAL_ANA_CSR_DBG_CTL, 0x48 },
635 { WCD939X_DIGITAL_SSP_DBG, 0x00 },
636 { WCD939X_DIGITAL_SPARE_0, 0x00 },
637 { WCD939X_DIGITAL_SPARE_1, 0x00 },
638 { WCD939X_DIGITAL_SPARE_2, 0x00 },
639 { WCD939X_DIGITAL_TX_REQ_FB_CTL_0, 0x88 },
640 { WCD939X_DIGITAL_TX_REQ_FB_CTL_1, 0x88 },
641 { WCD939X_DIGITAL_TX_REQ_FB_CTL_2, 0x88 },
642 { WCD939X_DIGITAL_TX_REQ_FB_CTL_3, 0x88 },
643 { WCD939X_DIGITAL_TX_REQ_FB_CTL_4, 0x88 },
644 { WCD939X_DIGITAL_DEM_BYPASS_DATA0, 0x55 },
645 { WCD939X_DIGITAL_DEM_BYPASS_DATA1, 0x55 },
646 { WCD939X_DIGITAL_DEM_BYPASS_DATA2, 0x55 },
647 { WCD939X_DIGITAL_DEM_BYPASS_DATA3, 0x01 },
648 { WCD939X_DIGITAL_DEM_SECOND_ORDER, 0x03 },
649 { WCD939X_DIGITAL_DSM_CTRL, 0x00 },
650 { WCD939X_DIGITAL_DSM_0_STATIC_DATA_0, 0x00 },
651 { WCD939X_DIGITAL_DSM_0_STATIC_DATA_1, 0x00 },
652 { WCD939X_DIGITAL_DSM_0_STATIC_DATA_2, 0x00 },
653 { WCD939X_DIGITAL_DSM_0_STATIC_DATA_3, 0x00 },
654 { WCD939X_DIGITAL_DSM_1_STATIC_DATA_0, 0x00 },
655 { WCD939X_DIGITAL_DSM_1_STATIC_DATA_1, 0x00 },
656 { WCD939X_DIGITAL_DSM_1_STATIC_DATA_2, 0x00 },
657 { WCD939X_DIGITAL_DSM_1_STATIC_DATA_3, 0x00 },
658 { WCD939X_RX_TOP_PAGE, 0x00 },
659 { WCD939X_RX_TOP_TOP_CFG0, 0x00 },
660 { WCD939X_RX_TOP_HPHL_COMP_WR_LSB, 0x00 },
661 { WCD939X_RX_TOP_HPHL_COMP_WR_MSB, 0x00 },
662 { WCD939X_RX_TOP_HPHL_COMP_LUT, 0x00 },
663 { WCD939X_RX_TOP_HPHR_COMP_WR_LSB, 0x00 },
664 { WCD939X_RX_TOP_HPHR_COMP_WR_MSB, 0x00 },
665 { WCD939X_RX_TOP_HPHR_COMP_LUT, 0x00 },
666 { WCD939X_RX_TOP_DSD0_DEBUG_CFG1, 0x05 },
667 { WCD939X_RX_TOP_DSD0_DEBUG_CFG2, 0x08 },
668 { WCD939X_RX_TOP_DSD0_DEBUG_CFG3, 0x00 },
669 { WCD939X_RX_TOP_DSD0_DEBUG_CFG4, 0x00 },
670 { WCD939X_RX_TOP_DSD1_DEBUG_CFG1, 0x03 },
671 { WCD939X_RX_TOP_DSD1_DEBUG_CFG2, 0x08 },
672 { WCD939X_RX_TOP_DSD1_DEBUG_CFG3, 0x00 },
673 { WCD939X_RX_TOP_DSD1_DEBUG_CFG4, 0x00 },
674 { WCD939X_RX_TOP_HPHL_PATH_CFG0, 0x00 },
675 { WCD939X_RX_TOP_HPHL_PATH_CFG1, 0x00 },
676 { WCD939X_RX_TOP_HPHR_PATH_CFG0, 0x00 },
677 { WCD939X_RX_TOP_HPHR_PATH_CFG1, 0x00 },
678 { WCD939X_RX_TOP_PATH_CFG2, 0x00 },
679 { WCD939X_RX_TOP_HPHL_PATH_SEC0, 0x00 },
680 { WCD939X_RX_TOP_HPHL_PATH_SEC1, 0x00 },
681 { WCD939X_RX_TOP_HPHL_PATH_SEC2, 0x00 },
682 { WCD939X_RX_TOP_HPHL_PATH_SEC3, 0x00 },
683 { WCD939X_RX_TOP_HPHR_PATH_SEC0, 0x00 },
684 { WCD939X_RX_TOP_HPHR_PATH_SEC1, 0x00 },
685 { WCD939X_RX_TOP_HPHR_PATH_SEC2, 0x00 },
686 { WCD939X_RX_TOP_HPHR_PATH_SEC3, 0x00 },
687 { WCD939X_RX_TOP_PATH_SEC4, 0x00 },
688 { WCD939X_RX_TOP_PATH_SEC5, 0x00 },
689 { WCD939X_COMPANDER_HPHL_CTL0, 0x60 },
690 { WCD939X_COMPANDER_HPHL_CTL1, 0xdb },
691 { WCD939X_COMPANDER_HPHL_CTL2, 0xff },
692 { WCD939X_COMPANDER_HPHL_CTL3, 0x35 },
693 { WCD939X_COMPANDER_HPHL_CTL4, 0xff },
694 { WCD939X_COMPANDER_HPHL_CTL5, 0x00 },
695 { WCD939X_COMPANDER_HPHL_CTL7, 0x08 },
696 { WCD939X_COMPANDER_HPHL_CTL8, 0x00 },
697 { WCD939X_COMPANDER_HPHL_CTL9, 0x00 },
698 { WCD939X_COMPANDER_HPHL_CTL10, 0x06 },
699 { WCD939X_COMPANDER_HPHL_CTL11, 0x12 },
700 { WCD939X_COMPANDER_HPHL_CTL12, 0x1e },
701 { WCD939X_COMPANDER_HPHL_CTL13, 0x2a },
702 { WCD939X_COMPANDER_HPHL_CTL14, 0x36 },
703 { WCD939X_COMPANDER_HPHL_CTL15, 0x3c },
704 { WCD939X_COMPANDER_HPHL_CTL16, 0xc4 },
705 { WCD939X_COMPANDER_HPHL_CTL17, 0x00 },
706 { WCD939X_COMPANDER_HPHL_CTL18, 0x0c },
707 { WCD939X_COMPANDER_HPHL_CTL19, 0x16 },
708 { WCD939X_R_CTL0, 0x60 },
709 { WCD939X_R_CTL1, 0xdb },
710 { WCD939X_R_CTL2, 0xff },
711 { WCD939X_R_CTL3, 0x35 },
712 { WCD939X_R_CTL4, 0xff },
713 { WCD939X_R_CTL5, 0x00 },
714 { WCD939X_R_CTL7, 0x08 },
715 { WCD939X_R_CTL8, 0x00 },
716 { WCD939X_R_CTL9, 0x00 },
717 { WCD939X_R_CTL10, 0x06 },
718 { WCD939X_R_CTL11, 0x12 },
719 { WCD939X_R_CTL12, 0x1e },
720 { WCD939X_R_CTL13, 0x2a },
721 { WCD939X_R_CTL14, 0x36 },
722 { WCD939X_R_CTL15, 0x3c },
723 { WCD939X_R_CTL16, 0xc4 },
724 { WCD939X_R_CTL17, 0x00 },
725 { WCD939X_R_CTL18, 0x0c },
726 { WCD939X_R_CTL19, 0x16 },
727 { WCD939X_E_PATH_CTL, 0x00 },
728 { WCD939X_E_CFG0, 0x07 },
729 { WCD939X_E_CFG1, 0x3c },
730 { WCD939X_E_CFG2, 0x00 },
731 { WCD939X_E_CFG3, 0x00 },
732 { WCD939X_DSD_HPHL_PATH_CTL, 0x00 },
733 { WCD939X_DSD_HPHL_CFG0, 0x00 },
734 { WCD939X_DSD_HPHL_CFG1, 0x00 },
735 { WCD939X_DSD_HPHL_CFG2, 0x22 },
736 { WCD939X_DSD_HPHL_CFG3, 0x00 },
737 { WCD939X_DSD_HPHL_CFG4, 0x1a },
738 { WCD939X_DSD_HPHL_CFG5, 0x00 },
739 { WCD939X_DSD_HPHR_PATH_CTL, 0x00 },
740 { WCD939X_DSD_HPHR_CFG0, 0x00 },
741 { WCD939X_DSD_HPHR_CFG1, 0x00 },
742 { WCD939X_DSD_HPHR_CFG2, 0x22 },
743 { WCD939X_DSD_HPHR_CFG3, 0x00 },
744 { WCD939X_DSD_HPHR_CFG4, 0x1a },
745 { WCD939X_DSD_HPHR_CFG5, 0x00 },
746 };
747
wcd939x_rdwr_register(struct device * dev,unsigned int reg)748 static bool wcd939x_rdwr_register(struct device *dev, unsigned int reg)
749 {
750 switch (reg) {
751 case WCD939X_ANA_PAGE:
752 case WCD939X_ANA_BIAS:
753 case WCD939X_ANA_RX_SUPPLIES:
754 case WCD939X_ANA_HPH:
755 case WCD939X_ANA_EAR:
756 case WCD939X_ANA_EAR_COMPANDER_CTL:
757 case WCD939X_ANA_TX_CH1:
758 case WCD939X_ANA_TX_CH2:
759 case WCD939X_ANA_TX_CH3:
760 case WCD939X_ANA_TX_CH4:
761 case WCD939X_ANA_MICB1_MICB2_DSP_EN_LOGIC:
762 case WCD939X_ANA_MICB3_DSP_EN_LOGIC:
763 case WCD939X_ANA_MBHC_MECH:
764 case WCD939X_ANA_MBHC_ELECT:
765 case WCD939X_ANA_MBHC_ZDET:
766 case WCD939X_ANA_MBHC_BTN0:
767 case WCD939X_ANA_MBHC_BTN1:
768 case WCD939X_ANA_MBHC_BTN2:
769 case WCD939X_ANA_MBHC_BTN3:
770 case WCD939X_ANA_MBHC_BTN4:
771 case WCD939X_ANA_MBHC_BTN5:
772 case WCD939X_ANA_MBHC_BTN6:
773 case WCD939X_ANA_MBHC_BTN7:
774 case WCD939X_ANA_MICB1:
775 case WCD939X_ANA_MICB2:
776 case WCD939X_ANA_MICB2_RAMP:
777 case WCD939X_ANA_MICB3:
778 case WCD939X_ANA_MICB4:
779 case WCD939X_BIAS_CTL:
780 case WCD939X_BIAS_VBG_FINE_ADJ:
781 case WCD939X_LDOL_VDDCX_ADJUST:
782 case WCD939X_LDOL_DISABLE_LDOL:
783 case WCD939X_MBHC_CTL_CLK:
784 case WCD939X_MBHC_CTL_ANA:
785 case WCD939X_MBHC_ZDET_VNEG_CTL:
786 case WCD939X_MBHC_ZDET_BIAS_CTL:
787 case WCD939X_MBHC_CTL_BCS:
788 case WCD939X_MBHC_TEST_CTL:
789 case WCD939X_LDOH_MODE:
790 case WCD939X_LDOH_BIAS:
791 case WCD939X_LDOH_STB_LOADS:
792 case WCD939X_LDOH_SLOWRAMP:
793 case WCD939X_MICB1_TEST_CTL_1:
794 case WCD939X_MICB1_TEST_CTL_2:
795 case WCD939X_MICB1_TEST_CTL_3:
796 case WCD939X_MICB2_TEST_CTL_1:
797 case WCD939X_MICB2_TEST_CTL_2:
798 case WCD939X_MICB2_TEST_CTL_3:
799 case WCD939X_MICB3_TEST_CTL_1:
800 case WCD939X_MICB3_TEST_CTL_2:
801 case WCD939X_MICB3_TEST_CTL_3:
802 case WCD939X_MICB4_TEST_CTL_1:
803 case WCD939X_MICB4_TEST_CTL_2:
804 case WCD939X_MICB4_TEST_CTL_3:
805 case WCD939X_TX_COM_ADC_VCM:
806 case WCD939X_TX_COM_BIAS_ATEST:
807 case WCD939X_TX_COM_SPARE1:
808 case WCD939X_TX_COM_SPARE2:
809 case WCD939X_TX_COM_TXFE_DIV_CTL:
810 case WCD939X_TX_COM_TXFE_DIV_START:
811 case WCD939X_TX_COM_SPARE3:
812 case WCD939X_TX_COM_SPARE4:
813 case WCD939X_TX_1_2_TEST_EN:
814 case WCD939X_TX_1_2_ADC_IB:
815 case WCD939X_TX_1_2_ATEST_REFCTL:
816 case WCD939X_TX_1_2_TEST_CTL:
817 case WCD939X_TX_1_2_TEST_BLK_EN1:
818 case WCD939X_TX_1_2_TXFE1_CLKDIV:
819 case WCD939X_TX_3_4_TEST_EN:
820 case WCD939X_TX_3_4_ADC_IB:
821 case WCD939X_TX_3_4_ATEST_REFCTL:
822 case WCD939X_TX_3_4_TEST_CTL:
823 case WCD939X_TX_3_4_TEST_BLK_EN3:
824 case WCD939X_TX_3_4_TXFE3_CLKDIV:
825 case WCD939X_TX_3_4_TEST_BLK_EN2:
826 case WCD939X_TX_3_4_TXFE2_CLKDIV:
827 case WCD939X_TX_3_4_SPARE1:
828 case WCD939X_TX_3_4_TEST_BLK_EN4:
829 case WCD939X_TX_3_4_TXFE4_CLKDIV:
830 case WCD939X_TX_3_4_SPARE2:
831 case WCD939X_CLASSH_MODE_1:
832 case WCD939X_CLASSH_MODE_2:
833 case WCD939X_CLASSH_MODE_3:
834 case WCD939X_CLASSH_CTRL_VCL_1:
835 case WCD939X_CLASSH_CTRL_VCL_2:
836 case WCD939X_CLASSH_CTRL_CCL_1:
837 case WCD939X_CLASSH_CTRL_CCL_2:
838 case WCD939X_CLASSH_CTRL_CCL_3:
839 case WCD939X_CLASSH_CTRL_CCL_4:
840 case WCD939X_CLASSH_CTRL_CCL_5:
841 case WCD939X_CLASSH_BUCK_TMUX_A_D:
842 case WCD939X_CLASSH_BUCK_SW_DRV_CNTL:
843 case WCD939X_CLASSH_SPARE:
844 case WCD939X_FLYBACK_EN:
845 case WCD939X_FLYBACK_VNEG_CTRL_1:
846 case WCD939X_FLYBACK_VNEG_CTRL_2:
847 case WCD939X_FLYBACK_VNEG_CTRL_3:
848 case WCD939X_FLYBACK_VNEG_CTRL_4:
849 case WCD939X_FLYBACK_VNEG_CTRL_5:
850 case WCD939X_FLYBACK_VNEG_CTRL_6:
851 case WCD939X_FLYBACK_VNEG_CTRL_7:
852 case WCD939X_FLYBACK_VNEG_CTRL_8:
853 case WCD939X_FLYBACK_VNEG_CTRL_9:
854 case WCD939X_FLYBACK_VNEGDAC_CTRL_1:
855 case WCD939X_FLYBACK_VNEGDAC_CTRL_2:
856 case WCD939X_FLYBACK_VNEGDAC_CTRL_3:
857 case WCD939X_FLYBACK_CTRL_1:
858 case WCD939X_FLYBACK_TEST_CTL:
859 case WCD939X_RX_AUX_SW_CTL:
860 case WCD939X_RX_PA_AUX_IN_CONN:
861 case WCD939X_RX_TIMER_DIV:
862 case WCD939X_RX_OCP_CTL:
863 case WCD939X_RX_OCP_COUNT:
864 case WCD939X_RX_BIAS_EAR_DAC:
865 case WCD939X_RX_BIAS_EAR_AMP:
866 case WCD939X_RX_BIAS_HPH_LDO:
867 case WCD939X_RX_BIAS_HPH_PA:
868 case WCD939X_RX_BIAS_HPH_RDACBUFF_CNP2:
869 case WCD939X_RX_BIAS_HPH_RDAC_LDO:
870 case WCD939X_RX_BIAS_HPH_CNP1:
871 case WCD939X_RX_BIAS_HPH_LOWPOWER:
872 case WCD939X_RX_BIAS_AUX_DAC:
873 case WCD939X_RX_BIAS_AUX_AMP:
874 case WCD939X_RX_BIAS_VNEGDAC_BLEEDER:
875 case WCD939X_RX_BIAS_MISC:
876 case WCD939X_RX_BIAS_BUCK_RST:
877 case WCD939X_RX_BIAS_BUCK_VREF_ERRAMP:
878 case WCD939X_RX_BIAS_FLYB_ERRAMP:
879 case WCD939X_RX_BIAS_FLYB_BUFF:
880 case WCD939X_RX_BIAS_FLYB_MID_RST:
881 case WCD939X_HPH_CNP_EN:
882 case WCD939X_HPH_CNP_WG_CTL:
883 case WCD939X_HPH_CNP_WG_TIME:
884 case WCD939X_HPH_OCP_CTL:
885 case WCD939X_HPH_AUTO_CHOP:
886 case WCD939X_HPH_CHOP_CTL:
887 case WCD939X_HPH_PA_CTL1:
888 case WCD939X_HPH_PA_CTL2:
889 case WCD939X_HPH_L_EN:
890 case WCD939X_HPH_L_TEST:
891 case WCD939X_HPH_L_ATEST:
892 case WCD939X_HPH_R_EN:
893 case WCD939X_HPH_R_TEST:
894 case WCD939X_HPH_R_ATEST:
895 case WCD939X_HPH_RDAC_CLK_CTL1:
896 case WCD939X_HPH_RDAC_CLK_CTL2:
897 case WCD939X_HPH_RDAC_LDO_CTL:
898 case WCD939X_HPH_RDAC_CHOP_CLK_LP_CTL:
899 case WCD939X_HPH_REFBUFF_UHQA_CTL:
900 case WCD939X_HPH_REFBUFF_LP_CTL:
901 case WCD939X_HPH_L_DAC_CTL:
902 case WCD939X_HPH_R_DAC_CTL:
903 case WCD939X_HPH_SURGE_COMP_SEL:
904 case WCD939X_HPH_SURGE_EN:
905 case WCD939X_HPH_SURGE_MISC1:
906 case WCD939X_EAR_EN:
907 case WCD939X_EAR_PA_CON:
908 case WCD939X_EAR_SP_CON:
909 case WCD939X_EAR_DAC_CON:
910 case WCD939X_EAR_CNP_FSM_CON:
911 case WCD939X_EAR_TEST_CTL:
912 case WCD939X_FLYBACK_NEW_CTRL_2:
913 case WCD939X_FLYBACK_NEW_CTRL_3:
914 case WCD939X_FLYBACK_NEW_CTRL_4:
915 case WCD939X_ANA_NEW_PAGE:
916 case WCD939X_HPH_NEW_ANA_HPH2:
917 case WCD939X_HPH_NEW_ANA_HPH3:
918 case WCD939X_SLEEP_CTL:
919 case WCD939X_SLEEP_WATCHDOG_CTL:
920 case WCD939X_MBHC_NEW_ELECT_REM_CLAMP_CTL:
921 case WCD939X_MBHC_NEW_CTL_1:
922 case WCD939X_MBHC_NEW_CTL_2:
923 case WCD939X_MBHC_NEW_PLUG_DETECT_CTL:
924 case WCD939X_MBHC_NEW_ZDET_ANA_CTL:
925 case WCD939X_MBHC_NEW_ZDET_RAMP_CTL:
926 case WCD939X_TX_NEW_CH12_MUX:
927 case WCD939X_TX_NEW_CH34_MUX:
928 case WCD939X_DIE_CRACK_DET_EN:
929 case WCD939X_HPH_NEW_INT_RDAC_GAIN_CTL:
930 case WCD939X_HPH_NEW_INT_PA_GAIN_CTL_L:
931 case WCD939X_HPH_NEW_INT_RDAC_VREF_CTL:
932 case WCD939X_HPH_NEW_INT_RDAC_OVERRIDE_CTL:
933 case WCD939X_HPH_NEW_INT_PA_GAIN_CTL_R:
934 case WCD939X_HPH_NEW_INT_PA_MISC1:
935 case WCD939X_HPH_NEW_INT_PA_MISC2:
936 case WCD939X_HPH_NEW_INT_PA_RDAC_MISC:
937 case WCD939X_HPH_NEW_INT_TIMER1:
938 case WCD939X_HPH_NEW_INT_TIMER2:
939 case WCD939X_HPH_NEW_INT_TIMER3:
940 case WCD939X_HPH_NEW_INT_TIMER4:
941 case WCD939X_HPH_NEW_INT_PA_RDAC_MISC2:
942 case WCD939X_HPH_NEW_INT_PA_RDAC_MISC3:
943 case WCD939X_HPH_NEW_INT_RDAC_HD2_CTL_L:
944 case WCD939X_HPH_NEW_INT_RDAC_HD2_CTL_R:
945 case WCD939X_RX_NEW_INT_HPH_RDAC_BIAS_LOHIFI:
946 case WCD939X_RX_NEW_INT_HPH_RDAC_BIAS_ULP:
947 case WCD939X_RX_NEW_INT_HPH_RDAC_LDO_LP:
948 case WCD939X_MBHC_NEW_INT_MOISTURE_DET_DC_CTRL:
949 case WCD939X_MBHC_NEW_INT_MOISTURE_DET_POLLING_CTRL:
950 case WCD939X_MBHC_NEW_INT_MECH_DET_CURRENT:
951 case WCD939X_MBHC_NEW_INT_ZDET_CLK_AND_MOISTURE_CTL_NEW:
952 case WCD939X_EAR_INT_NEW_CHOPPER_CON:
953 case WCD939X_EAR_INT_NEW_CNP_VCM_CON1:
954 case WCD939X_EAR_INT_NEW_CNP_VCM_CON2:
955 case WCD939X_EAR_INT_NEW_DYNAMIC_BIAS:
956 case WCD939X_SLEEP_INT_WATCHDOG_CTL_1:
957 case WCD939X_SLEEP_INT_WATCHDOG_CTL_2:
958 case WCD939X_DIE_CRACK_INT_DET_INT1:
959 case WCD939X_DIE_CRACK_INT_DET_INT2:
960 case WCD939X_TX_COM_NEW_INT_FE_DIVSTOP_L2:
961 case WCD939X_TX_COM_NEW_INT_FE_DIVSTOP_L1:
962 case WCD939X_TX_COM_NEW_INT_FE_DIVSTOP_L0:
963 case WCD939X_TX_COM_NEW_INT_FE_DIVSTOP_ULP1P2M:
964 case WCD939X_TX_COM_NEW_INT_FE_DIVSTOP_ULP0P6M:
965 case WCD939X_TX_COM_NEW_INT_FE_ICTRL_STG1_L2L1:
966 case WCD939X_TX_COM_NEW_INT_FE_ICTRL_STG1_L0:
967 case WCD939X_TX_COM_NEW_INT_FE_ICTRL_STG1_ULP:
968 case WCD939X_TX_COM_NEW_INT_FE_ICTRL_STG2MAIN_L2L1:
969 case WCD939X_TX_COM_NEW_INT_FE_ICTRL_STG2MAIN_L0:
970 case WCD939X_TX_COM_NEW_INT_FE_ICTRL_STG2MAIN_ULP:
971 case WCD939X_TX_COM_NEW_INT_FE_ICTRL_STG2CASC_L2L1L0:
972 case WCD939X_TX_COM_NEW_INT_FE_ICTRL_STG2CASC_ULP:
973 case WCD939X_TX_COM_NEW_INT_ADC_SCBIAS_L2L1:
974 case WCD939X_TX_COM_NEW_INT_ADC_SCBIAS_L0ULP:
975 case WCD939X_TX_COM_NEW_INT_ADC_INT_L2:
976 case WCD939X_TX_COM_NEW_INT_ADC_INT_L1:
977 case WCD939X_TX_COM_NEW_INT_ADC_INT_L0:
978 case WCD939X_TX_COM_NEW_INT_ADC_INT_ULP:
979 case WCD939X_DIGITAL_PAGE:
980 case WCD939X_DIGITAL_SWR_TX_CLK_RATE:
981 case WCD939X_DIGITAL_CDC_RST_CTL:
982 case WCD939X_DIGITAL_TOP_CLK_CFG:
983 case WCD939X_DIGITAL_CDC_ANA_CLK_CTL:
984 case WCD939X_DIGITAL_CDC_DIG_CLK_CTL:
985 case WCD939X_DIGITAL_SWR_RST_EN:
986 case WCD939X_DIGITAL_CDC_PATH_MODE:
987 case WCD939X_DIGITAL_CDC_RX_RST:
988 case WCD939X_DIGITAL_CDC_RX0_CTL:
989 case WCD939X_DIGITAL_CDC_RX1_CTL:
990 case WCD939X_DIGITAL_CDC_RX2_CTL:
991 case WCD939X_DIGITAL_CDC_TX_ANA_MODE_0_1:
992 case WCD939X_DIGITAL_CDC_TX_ANA_MODE_2_3:
993 case WCD939X_DIGITAL_CDC_COMP_CTL_0:
994 case WCD939X_DIGITAL_CDC_ANA_TX_CLK_CTL:
995 case WCD939X_DIGITAL_CDC_HPH_DSM_A1_0:
996 case WCD939X_DIGITAL_CDC_HPH_DSM_A1_1:
997 case WCD939X_DIGITAL_CDC_HPH_DSM_A2_0:
998 case WCD939X_DIGITAL_CDC_HPH_DSM_A2_1:
999 case WCD939X_DIGITAL_CDC_HPH_DSM_A3_0:
1000 case WCD939X_DIGITAL_CDC_HPH_DSM_A3_1:
1001 case WCD939X_DIGITAL_CDC_HPH_DSM_A4_0:
1002 case WCD939X_DIGITAL_CDC_HPH_DSM_A4_1:
1003 case WCD939X_DIGITAL_CDC_HPH_DSM_A5_0:
1004 case WCD939X_DIGITAL_CDC_HPH_DSM_A5_1:
1005 case WCD939X_DIGITAL_CDC_HPH_DSM_A6_0:
1006 case WCD939X_DIGITAL_CDC_HPH_DSM_A7_0:
1007 case WCD939X_DIGITAL_CDC_HPH_DSM_C_0:
1008 case WCD939X_DIGITAL_CDC_HPH_DSM_C_1:
1009 case WCD939X_DIGITAL_CDC_HPH_DSM_C_2:
1010 case WCD939X_DIGITAL_CDC_HPH_DSM_C_3:
1011 case WCD939X_DIGITAL_CDC_HPH_DSM_R1:
1012 case WCD939X_DIGITAL_CDC_HPH_DSM_R2:
1013 case WCD939X_DIGITAL_CDC_HPH_DSM_R3:
1014 case WCD939X_DIGITAL_CDC_HPH_DSM_R4:
1015 case WCD939X_DIGITAL_CDC_HPH_DSM_R5:
1016 case WCD939X_DIGITAL_CDC_HPH_DSM_R6:
1017 case WCD939X_DIGITAL_CDC_HPH_DSM_R7:
1018 case WCD939X_DIGITAL_CDC_EAR_DSM_A1_0:
1019 case WCD939X_DIGITAL_CDC_EAR_DSM_A1_1:
1020 case WCD939X_DIGITAL_CDC_EAR_DSM_A2_0:
1021 case WCD939X_DIGITAL_CDC_EAR_DSM_A2_1:
1022 case WCD939X_DIGITAL_CDC_EAR_DSM_A3_0:
1023 case WCD939X_DIGITAL_CDC_EAR_DSM_A3_1:
1024 case WCD939X_DIGITAL_CDC_EAR_DSM_A4_0:
1025 case WCD939X_DIGITAL_CDC_EAR_DSM_A4_1:
1026 case WCD939X_DIGITAL_CDC_EAR_DSM_A5_0:
1027 case WCD939X_DIGITAL_CDC_EAR_DSM_A5_1:
1028 case WCD939X_DIGITAL_CDC_EAR_DSM_A6_0:
1029 case WCD939X_DIGITAL_CDC_EAR_DSM_A7_0:
1030 case WCD939X_DIGITAL_CDC_EAR_DSM_C_0:
1031 case WCD939X_DIGITAL_CDC_EAR_DSM_C_1:
1032 case WCD939X_DIGITAL_CDC_EAR_DSM_C_2:
1033 case WCD939X_DIGITAL_CDC_EAR_DSM_C_3:
1034 case WCD939X_DIGITAL_CDC_EAR_DSM_R1:
1035 case WCD939X_DIGITAL_CDC_EAR_DSM_R2:
1036 case WCD939X_DIGITAL_CDC_EAR_DSM_R3:
1037 case WCD939X_DIGITAL_CDC_EAR_DSM_R4:
1038 case WCD939X_DIGITAL_CDC_EAR_DSM_R5:
1039 case WCD939X_DIGITAL_CDC_EAR_DSM_R6:
1040 case WCD939X_DIGITAL_CDC_EAR_DSM_R7:
1041 case WCD939X_DIGITAL_CDC_HPH_GAIN_RX_0:
1042 case WCD939X_DIGITAL_CDC_HPH_GAIN_RX_1:
1043 case WCD939X_DIGITAL_CDC_HPH_GAIN_DSD_0:
1044 case WCD939X_DIGITAL_CDC_HPH_GAIN_DSD_1:
1045 case WCD939X_DIGITAL_CDC_HPH_GAIN_DSD_2:
1046 case WCD939X_DIGITAL_CDC_EAR_GAIN_DSD_0:
1047 case WCD939X_DIGITAL_CDC_EAR_GAIN_DSD_1:
1048 case WCD939X_DIGITAL_CDC_EAR_GAIN_DSD_2:
1049 case WCD939X_DIGITAL_CDC_HPH_GAIN_CTL:
1050 case WCD939X_DIGITAL_CDC_EAR_GAIN_CTL:
1051 case WCD939X_DIGITAL_CDC_EAR_PATH_CTL:
1052 case WCD939X_DIGITAL_CDC_SWR_CLH:
1053 case WCD939X_DIGITAL_SWR_CLH_BYP:
1054 case WCD939X_DIGITAL_CDC_TX0_CTL:
1055 case WCD939X_DIGITAL_CDC_TX1_CTL:
1056 case WCD939X_DIGITAL_CDC_TX2_CTL:
1057 case WCD939X_DIGITAL_CDC_TX_RST:
1058 case WCD939X_DIGITAL_CDC_REQ_CTL:
1059 case WCD939X_DIGITAL_CDC_RST:
1060 case WCD939X_DIGITAL_CDC_AMIC_CTL:
1061 case WCD939X_DIGITAL_CDC_DMIC_CTL:
1062 case WCD939X_DIGITAL_CDC_DMIC1_CTL:
1063 case WCD939X_DIGITAL_CDC_DMIC2_CTL:
1064 case WCD939X_DIGITAL_CDC_DMIC3_CTL:
1065 case WCD939X_DIGITAL_CDC_DMIC4_CTL:
1066 case WCD939X_DIGITAL_EFUSE_PRG_CTL:
1067 case WCD939X_DIGITAL_EFUSE_CTL:
1068 case WCD939X_DIGITAL_CDC_DMIC_RATE_1_2:
1069 case WCD939X_DIGITAL_CDC_DMIC_RATE_3_4:
1070 case WCD939X_DIGITAL_PDM_WD_CTL0:
1071 case WCD939X_DIGITAL_PDM_WD_CTL1:
1072 case WCD939X_DIGITAL_PDM_WD_CTL2:
1073 case WCD939X_DIGITAL_INTR_MODE:
1074 case WCD939X_DIGITAL_INTR_MASK_0:
1075 case WCD939X_DIGITAL_INTR_MASK_1:
1076 case WCD939X_DIGITAL_INTR_MASK_2:
1077 case WCD939X_DIGITAL_INTR_CLEAR_0:
1078 case WCD939X_DIGITAL_INTR_CLEAR_1:
1079 case WCD939X_DIGITAL_INTR_CLEAR_2:
1080 case WCD939X_DIGITAL_INTR_LEVEL_0:
1081 case WCD939X_DIGITAL_INTR_LEVEL_1:
1082 case WCD939X_DIGITAL_INTR_LEVEL_2:
1083 case WCD939X_DIGITAL_INTR_SET_0:
1084 case WCD939X_DIGITAL_INTR_SET_1:
1085 case WCD939X_DIGITAL_INTR_SET_2:
1086 case WCD939X_DIGITAL_INTR_TEST_0:
1087 case WCD939X_DIGITAL_INTR_TEST_1:
1088 case WCD939X_DIGITAL_INTR_TEST_2:
1089 case WCD939X_DIGITAL_TX_MODE_DBG_EN:
1090 case WCD939X_DIGITAL_TX_MODE_DBG_0_1:
1091 case WCD939X_DIGITAL_TX_MODE_DBG_2_3:
1092 case WCD939X_DIGITAL_LB_IN_SEL_CTL:
1093 case WCD939X_DIGITAL_LOOP_BACK_MODE:
1094 case WCD939X_DIGITAL_SWR_DAC_TEST:
1095 case WCD939X_DIGITAL_SWR_HM_TEST_RX_0:
1096 case WCD939X_DIGITAL_SWR_HM_TEST_TX_0:
1097 case WCD939X_DIGITAL_SWR_HM_TEST_RX_1:
1098 case WCD939X_DIGITAL_SWR_HM_TEST_TX_1:
1099 case WCD939X_DIGITAL_SWR_HM_TEST_TX_2:
1100 case WCD939X_DIGITAL_PAD_CTL_SWR_0:
1101 case WCD939X_DIGITAL_PAD_CTL_SWR_1:
1102 case WCD939X_DIGITAL_I2C_CTL:
1103 case WCD939X_DIGITAL_CDC_TX_TANGGU_SW_MODE:
1104 case WCD939X_DIGITAL_EFUSE_TEST_CTL_0:
1105 case WCD939X_DIGITAL_EFUSE_TEST_CTL_1:
1106 case WCD939X_DIGITAL_PAD_CTL_PDM_RX0:
1107 case WCD939X_DIGITAL_PAD_CTL_PDM_RX1:
1108 case WCD939X_DIGITAL_PAD_CTL_PDM_TX0:
1109 case WCD939X_DIGITAL_PAD_CTL_PDM_TX1:
1110 case WCD939X_DIGITAL_PAD_CTL_PDM_TX2:
1111 case WCD939X_DIGITAL_PAD_INP_DIS_0:
1112 case WCD939X_DIGITAL_PAD_INP_DIS_1:
1113 case WCD939X_DIGITAL_DRIVE_STRENGTH_0:
1114 case WCD939X_DIGITAL_DRIVE_STRENGTH_1:
1115 case WCD939X_DIGITAL_DRIVE_STRENGTH_2:
1116 case WCD939X_DIGITAL_RX_DATA_EDGE_CTL:
1117 case WCD939X_DIGITAL_TX_DATA_EDGE_CTL:
1118 case WCD939X_DIGITAL_GPIO_MODE:
1119 case WCD939X_DIGITAL_PIN_CTL_OE:
1120 case WCD939X_DIGITAL_PIN_CTL_DATA_0:
1121 case WCD939X_DIGITAL_PIN_CTL_DATA_1:
1122 case WCD939X_DIGITAL_DIG_DEBUG_CTL:
1123 case WCD939X_DIGITAL_DIG_DEBUG_EN:
1124 case WCD939X_DIGITAL_ANA_CSR_DBG_ADD:
1125 case WCD939X_DIGITAL_ANA_CSR_DBG_CTL:
1126 case WCD939X_DIGITAL_SSP_DBG:
1127 case WCD939X_DIGITAL_SPARE_0:
1128 case WCD939X_DIGITAL_SPARE_1:
1129 case WCD939X_DIGITAL_SPARE_2:
1130 case WCD939X_DIGITAL_TX_REQ_FB_CTL_0:
1131 case WCD939X_DIGITAL_TX_REQ_FB_CTL_1:
1132 case WCD939X_DIGITAL_TX_REQ_FB_CTL_2:
1133 case WCD939X_DIGITAL_TX_REQ_FB_CTL_3:
1134 case WCD939X_DIGITAL_TX_REQ_FB_CTL_4:
1135 case WCD939X_DIGITAL_DEM_BYPASS_DATA0:
1136 case WCD939X_DIGITAL_DEM_BYPASS_DATA1:
1137 case WCD939X_DIGITAL_DEM_BYPASS_DATA2:
1138 case WCD939X_DIGITAL_DEM_BYPASS_DATA3:
1139 case WCD939X_DIGITAL_DEM_SECOND_ORDER:
1140 case WCD939X_DIGITAL_DSM_CTRL:
1141 case WCD939X_DIGITAL_DSM_0_STATIC_DATA_0:
1142 case WCD939X_DIGITAL_DSM_0_STATIC_DATA_1:
1143 case WCD939X_DIGITAL_DSM_0_STATIC_DATA_2:
1144 case WCD939X_DIGITAL_DSM_0_STATIC_DATA_3:
1145 case WCD939X_DIGITAL_DSM_1_STATIC_DATA_0:
1146 case WCD939X_DIGITAL_DSM_1_STATIC_DATA_1:
1147 case WCD939X_DIGITAL_DSM_1_STATIC_DATA_2:
1148 case WCD939X_DIGITAL_DSM_1_STATIC_DATA_3:
1149 case WCD939X_RX_TOP_PAGE:
1150 case WCD939X_RX_TOP_TOP_CFG0:
1151 case WCD939X_RX_TOP_HPHL_COMP_WR_LSB:
1152 case WCD939X_RX_TOP_HPHL_COMP_WR_MSB:
1153 case WCD939X_RX_TOP_HPHL_COMP_LUT:
1154 case WCD939X_RX_TOP_HPHR_COMP_WR_LSB:
1155 case WCD939X_RX_TOP_HPHR_COMP_WR_MSB:
1156 case WCD939X_RX_TOP_HPHR_COMP_LUT:
1157 case WCD939X_RX_TOP_DSD0_DEBUG_CFG1:
1158 case WCD939X_RX_TOP_DSD0_DEBUG_CFG2:
1159 case WCD939X_RX_TOP_DSD0_DEBUG_CFG3:
1160 case WCD939X_RX_TOP_DSD0_DEBUG_CFG4:
1161 case WCD939X_RX_TOP_DSD1_DEBUG_CFG1:
1162 case WCD939X_RX_TOP_DSD1_DEBUG_CFG2:
1163 case WCD939X_RX_TOP_DSD1_DEBUG_CFG3:
1164 case WCD939X_RX_TOP_DSD1_DEBUG_CFG4:
1165 case WCD939X_RX_TOP_HPHL_PATH_CFG0:
1166 case WCD939X_RX_TOP_HPHL_PATH_CFG1:
1167 case WCD939X_RX_TOP_HPHR_PATH_CFG0:
1168 case WCD939X_RX_TOP_HPHR_PATH_CFG1:
1169 case WCD939X_RX_TOP_PATH_CFG2:
1170 case WCD939X_RX_TOP_HPHL_PATH_SEC0:
1171 case WCD939X_RX_TOP_HPHL_PATH_SEC1:
1172 case WCD939X_RX_TOP_HPHL_PATH_SEC2:
1173 case WCD939X_RX_TOP_HPHL_PATH_SEC3:
1174 case WCD939X_RX_TOP_HPHR_PATH_SEC0:
1175 case WCD939X_RX_TOP_HPHR_PATH_SEC1:
1176 case WCD939X_RX_TOP_HPHR_PATH_SEC2:
1177 case WCD939X_RX_TOP_HPHR_PATH_SEC3:
1178 case WCD939X_RX_TOP_PATH_SEC4:
1179 case WCD939X_RX_TOP_PATH_SEC5:
1180 case WCD939X_COMPANDER_HPHL_CTL0:
1181 case WCD939X_COMPANDER_HPHL_CTL1:
1182 case WCD939X_COMPANDER_HPHL_CTL2:
1183 case WCD939X_COMPANDER_HPHL_CTL3:
1184 case WCD939X_COMPANDER_HPHL_CTL4:
1185 case WCD939X_COMPANDER_HPHL_CTL5:
1186 case WCD939X_COMPANDER_HPHL_CTL7:
1187 case WCD939X_COMPANDER_HPHL_CTL8:
1188 case WCD939X_COMPANDER_HPHL_CTL9:
1189 case WCD939X_COMPANDER_HPHL_CTL10:
1190 case WCD939X_COMPANDER_HPHL_CTL11:
1191 case WCD939X_COMPANDER_HPHL_CTL12:
1192 case WCD939X_COMPANDER_HPHL_CTL13:
1193 case WCD939X_COMPANDER_HPHL_CTL14:
1194 case WCD939X_COMPANDER_HPHL_CTL15:
1195 case WCD939X_COMPANDER_HPHL_CTL16:
1196 case WCD939X_COMPANDER_HPHL_CTL17:
1197 case WCD939X_COMPANDER_HPHL_CTL18:
1198 case WCD939X_COMPANDER_HPHL_CTL19:
1199 case WCD939X_R_CTL0:
1200 case WCD939X_R_CTL1:
1201 case WCD939X_R_CTL2:
1202 case WCD939X_R_CTL3:
1203 case WCD939X_R_CTL4:
1204 case WCD939X_R_CTL5:
1205 case WCD939X_R_CTL7:
1206 case WCD939X_R_CTL8:
1207 case WCD939X_R_CTL9:
1208 case WCD939X_R_CTL10:
1209 case WCD939X_R_CTL11:
1210 case WCD939X_R_CTL12:
1211 case WCD939X_R_CTL13:
1212 case WCD939X_R_CTL14:
1213 case WCD939X_R_CTL15:
1214 case WCD939X_R_CTL16:
1215 case WCD939X_R_CTL17:
1216 case WCD939X_R_CTL18:
1217 case WCD939X_R_CTL19:
1218 case WCD939X_E_PATH_CTL:
1219 case WCD939X_E_CFG0:
1220 case WCD939X_E_CFG1:
1221 case WCD939X_E_CFG2:
1222 case WCD939X_E_CFG3:
1223 case WCD939X_DSD_HPHL_PATH_CTL:
1224 case WCD939X_DSD_HPHL_CFG0:
1225 case WCD939X_DSD_HPHL_CFG1:
1226 case WCD939X_DSD_HPHL_CFG2:
1227 case WCD939X_DSD_HPHL_CFG3:
1228 case WCD939X_DSD_HPHL_CFG4:
1229 case WCD939X_DSD_HPHL_CFG5:
1230 case WCD939X_DSD_HPHR_PATH_CTL:
1231 case WCD939X_DSD_HPHR_CFG0:
1232 case WCD939X_DSD_HPHR_CFG1:
1233 case WCD939X_DSD_HPHR_CFG2:
1234 case WCD939X_DSD_HPHR_CFG3:
1235 case WCD939X_DSD_HPHR_CFG4:
1236 case WCD939X_DSD_HPHR_CFG5:
1237 return true;
1238 }
1239
1240 return false;
1241 }
1242
wcd939x_readable_register(struct device * dev,unsigned int reg)1243 static bool wcd939x_readable_register(struct device *dev, unsigned int reg)
1244 {
1245 /* Read-Only Registers */
1246 switch (reg) {
1247 case WCD939X_ANA_MBHC_RESULT_1:
1248 case WCD939X_ANA_MBHC_RESULT_2:
1249 case WCD939X_ANA_MBHC_RESULT_3:
1250 case WCD939X_MBHC_MOISTURE_DET_FSM_STATUS:
1251 case WCD939X_TX_1_2_SAR2_ERR:
1252 case WCD939X_TX_1_2_SAR1_ERR:
1253 case WCD939X_TX_3_4_SAR4_ERR:
1254 case WCD939X_TX_3_4_SAR3_ERR:
1255 case WCD939X_HPH_L_STATUS:
1256 case WCD939X_HPH_R_STATUS:
1257 case WCD939X_HPH_SURGE_STATUS:
1258 case WCD939X_EAR_STATUS_REG_1:
1259 case WCD939X_EAR_STATUS_REG_2:
1260 case WCD939X_MBHC_NEW_FSM_STATUS:
1261 case WCD939X_MBHC_NEW_ADC_RESULT:
1262 case WCD939X_DIE_CRACK_DET_OUT:
1263 case WCD939X_DIGITAL_CHIP_ID0:
1264 case WCD939X_DIGITAL_CHIP_ID1:
1265 case WCD939X_DIGITAL_CHIP_ID2:
1266 case WCD939X_DIGITAL_CHIP_ID3:
1267 case WCD939X_DIGITAL_INTR_STATUS_0:
1268 case WCD939X_DIGITAL_INTR_STATUS_1:
1269 case WCD939X_DIGITAL_INTR_STATUS_2:
1270 case WCD939X_DIGITAL_SWR_HM_TEST_0:
1271 case WCD939X_DIGITAL_SWR_HM_TEST_1:
1272 case WCD939X_DIGITAL_EFUSE_T_DATA_0:
1273 case WCD939X_DIGITAL_EFUSE_T_DATA_1:
1274 case WCD939X_DIGITAL_PIN_STATUS_0:
1275 case WCD939X_DIGITAL_PIN_STATUS_1:
1276 case WCD939X_DIGITAL_MODE_STATUS_0:
1277 case WCD939X_DIGITAL_MODE_STATUS_1:
1278 case WCD939X_DIGITAL_EFUSE_REG_0:
1279 case WCD939X_DIGITAL_EFUSE_REG_1:
1280 case WCD939X_DIGITAL_EFUSE_REG_2:
1281 case WCD939X_DIGITAL_EFUSE_REG_3:
1282 case WCD939X_DIGITAL_EFUSE_REG_4:
1283 case WCD939X_DIGITAL_EFUSE_REG_5:
1284 case WCD939X_DIGITAL_EFUSE_REG_6:
1285 case WCD939X_DIGITAL_EFUSE_REG_7:
1286 case WCD939X_DIGITAL_EFUSE_REG_8:
1287 case WCD939X_DIGITAL_EFUSE_REG_9:
1288 case WCD939X_DIGITAL_EFUSE_REG_10:
1289 case WCD939X_DIGITAL_EFUSE_REG_11:
1290 case WCD939X_DIGITAL_EFUSE_REG_12:
1291 case WCD939X_DIGITAL_EFUSE_REG_13:
1292 case WCD939X_DIGITAL_EFUSE_REG_14:
1293 case WCD939X_DIGITAL_EFUSE_REG_15:
1294 case WCD939X_DIGITAL_EFUSE_REG_16:
1295 case WCD939X_DIGITAL_EFUSE_REG_17:
1296 case WCD939X_DIGITAL_EFUSE_REG_18:
1297 case WCD939X_DIGITAL_EFUSE_REG_19:
1298 case WCD939X_DIGITAL_EFUSE_REG_20:
1299 case WCD939X_DIGITAL_EFUSE_REG_21:
1300 case WCD939X_DIGITAL_EFUSE_REG_22:
1301 case WCD939X_DIGITAL_EFUSE_REG_23:
1302 case WCD939X_DIGITAL_EFUSE_REG_24:
1303 case WCD939X_DIGITAL_EFUSE_REG_25:
1304 case WCD939X_DIGITAL_EFUSE_REG_26:
1305 case WCD939X_DIGITAL_EFUSE_REG_27:
1306 case WCD939X_DIGITAL_EFUSE_REG_28:
1307 case WCD939X_DIGITAL_EFUSE_REG_29:
1308 case WCD939X_DIGITAL_EFUSE_REG_30:
1309 case WCD939X_DIGITAL_EFUSE_REG_31:
1310 case WCD939X_RX_TOP_HPHL_COMP_RD_LSB:
1311 case WCD939X_RX_TOP_HPHL_COMP_RD_MSB:
1312 case WCD939X_RX_TOP_HPHR_COMP_RD_LSB:
1313 case WCD939X_RX_TOP_HPHR_COMP_RD_MSB:
1314 case WCD939X_RX_TOP_DSD0_DEBUG_CFG5:
1315 case WCD939X_RX_TOP_DSD0_DEBUG_CFG6:
1316 case WCD939X_RX_TOP_DSD1_DEBUG_CFG5:
1317 case WCD939X_RX_TOP_DSD1_DEBUG_CFG6:
1318 case WCD939X_COMPANDER_HPHL_CTL6:
1319 case WCD939X_R_CTL6:
1320 return true;
1321 }
1322
1323 return wcd939x_rdwr_register(dev, reg);
1324 }
1325
wcd939x_volatile_register(struct device * dev,unsigned int reg)1326 static bool wcd939x_volatile_register(struct device *dev, unsigned int reg)
1327 {
1328 switch (reg) {
1329 case WCD939X_ANA_MBHC_RESULT_1:
1330 case WCD939X_ANA_MBHC_RESULT_2:
1331 case WCD939X_ANA_MBHC_RESULT_3:
1332 case WCD939X_MBHC_MOISTURE_DET_FSM_STATUS:
1333 case WCD939X_TX_1_2_SAR2_ERR:
1334 case WCD939X_TX_1_2_SAR1_ERR:
1335 case WCD939X_TX_3_4_SAR4_ERR:
1336 case WCD939X_TX_3_4_SAR3_ERR:
1337 case WCD939X_HPH_L_STATUS:
1338 case WCD939X_HPH_R_STATUS:
1339 case WCD939X_HPH_SURGE_STATUS:
1340 case WCD939X_EAR_STATUS_REG_1:
1341 case WCD939X_EAR_STATUS_REG_2:
1342 case WCD939X_MBHC_NEW_FSM_STATUS:
1343 case WCD939X_MBHC_NEW_ADC_RESULT:
1344 case WCD939X_DIE_CRACK_DET_OUT:
1345 case WCD939X_DIGITAL_INTR_STATUS_0:
1346 case WCD939X_DIGITAL_INTR_STATUS_1:
1347 case WCD939X_DIGITAL_INTR_STATUS_2:
1348 case WCD939X_DIGITAL_SWR_HM_TEST_0:
1349 case WCD939X_DIGITAL_SWR_HM_TEST_1:
1350 case WCD939X_DIGITAL_PIN_STATUS_0:
1351 case WCD939X_DIGITAL_PIN_STATUS_1:
1352 case WCD939X_DIGITAL_MODE_STATUS_0:
1353 case WCD939X_DIGITAL_MODE_STATUS_1:
1354 case WCD939X_RX_TOP_HPHL_COMP_RD_LSB:
1355 case WCD939X_RX_TOP_HPHL_COMP_RD_MSB:
1356 case WCD939X_RX_TOP_HPHR_COMP_RD_LSB:
1357 case WCD939X_RX_TOP_HPHR_COMP_RD_MSB:
1358 case WCD939X_RX_TOP_DSD0_DEBUG_CFG5:
1359 case WCD939X_RX_TOP_DSD0_DEBUG_CFG6:
1360 case WCD939X_RX_TOP_DSD1_DEBUG_CFG5:
1361 case WCD939X_RX_TOP_DSD1_DEBUG_CFG6:
1362 case WCD939X_COMPANDER_HPHL_CTL6:
1363 case WCD939X_R_CTL6:
1364 return true;
1365 }
1366 return false;
1367 }
1368
wcd939x_writeable_register(struct device * dev,unsigned int reg)1369 static bool wcd939x_writeable_register(struct device *dev, unsigned int reg)
1370 {
1371 return wcd939x_rdwr_register(dev, reg);
1372 }
1373
1374 static const struct regmap_config wcd939x_regmap_config = {
1375 .name = "wcd939x_csr",
1376 .reg_bits = 32,
1377 .val_bits = 8,
1378 .cache_type = REGCACHE_MAPLE,
1379 .reg_defaults = wcd939x_defaults,
1380 .num_reg_defaults = ARRAY_SIZE(wcd939x_defaults),
1381 .max_register = WCD939X_MAX_REGISTER,
1382 .readable_reg = wcd939x_readable_register,
1383 .writeable_reg = wcd939x_writeable_register,
1384 .volatile_reg = wcd939x_volatile_register,
1385 };
1386
1387 static const struct sdw_slave_ops wcd9390_slave_ops = {
1388 .update_status = wcd9390_update_status,
1389 .interrupt_callback = wcd9390_interrupt_callback,
1390 .bus_config = wcd9390_bus_config,
1391 };
1392
wcd939x_sdw_component_bind(struct device * dev,struct device * master,void * data)1393 static int wcd939x_sdw_component_bind(struct device *dev, struct device *master,
1394 void *data)
1395 {
1396 pm_runtime_set_autosuspend_delay(dev, 3000);
1397 pm_runtime_use_autosuspend(dev);
1398 pm_runtime_mark_last_busy(dev);
1399 pm_runtime_set_active(dev);
1400 pm_runtime_enable(dev);
1401
1402 return 0;
1403 }
1404
wcd939x_sdw_component_unbind(struct device * dev,struct device * master,void * data)1405 static void wcd939x_sdw_component_unbind(struct device *dev,
1406 struct device *master, void *data)
1407 {
1408 pm_runtime_disable(dev);
1409 pm_runtime_set_suspended(dev);
1410 pm_runtime_dont_use_autosuspend(dev);
1411 }
1412
1413 static const struct component_ops wcd939x_sdw_component_ops = {
1414 .bind = wcd939x_sdw_component_bind,
1415 .unbind = wcd939x_sdw_component_unbind,
1416 };
1417
wcd9390_probe(struct sdw_slave * pdev,const struct sdw_device_id * id)1418 static int wcd9390_probe(struct sdw_slave *pdev, const struct sdw_device_id *id)
1419 {
1420 struct device *dev = &pdev->dev;
1421 struct wcd939x_sdw_priv *wcd;
1422 int ret;
1423
1424 wcd = devm_kzalloc(dev, sizeof(*wcd), GFP_KERNEL);
1425 if (!wcd)
1426 return -ENOMEM;
1427
1428 /*
1429 * Port map index starts with 0, however the data port for this codec
1430 * are from index 1
1431 */
1432 if (of_property_read_bool(dev->of_node, "qcom,tx-port-mapping")) {
1433 wcd->is_tx = true;
1434 ret = of_property_read_u32_array(dev->of_node,
1435 "qcom,tx-port-mapping",
1436 &pdev->m_port_map[1],
1437 WCD939X_MAX_TX_SWR_PORTS);
1438 } else {
1439 ret = of_property_read_u32_array(dev->of_node,
1440 "qcom,rx-port-mapping",
1441 &pdev->m_port_map[1],
1442 WCD939X_MAX_RX_SWR_PORTS);
1443 }
1444
1445 if (ret < 0)
1446 dev_info(dev, "Static Port mapping not specified\n");
1447
1448 wcd->sdev = pdev;
1449 dev_set_drvdata(dev, wcd);
1450
1451 pdev->prop.scp_int1_mask = SDW_SCP_INT1_IMPL_DEF |
1452 SDW_SCP_INT1_BUS_CLASH | SDW_SCP_INT1_PARITY;
1453 pdev->prop.lane_control_support = true;
1454 pdev->prop.simple_clk_stop_capable = true;
1455 if (wcd->is_tx) {
1456 pdev->prop.source_ports = GENMASK(WCD939X_MAX_TX_SWR_PORTS - 1, 0);
1457 pdev->prop.src_dpn_prop = wcd939x_tx_dpn_prop;
1458 wcd->ch_info = &wcd939x_sdw_tx_ch_info[0];
1459 pdev->prop.wake_capable = true;
1460 } else {
1461 pdev->prop.sink_ports = GENMASK(WCD939X_MAX_RX_SWR_PORTS - 1, 0);
1462 pdev->prop.sink_dpn_prop = wcd939x_rx_dpn_prop;
1463 wcd->ch_info = &wcd939x_sdw_rx_ch_info[0];
1464 }
1465
1466 if (wcd->is_tx) {
1467 /*
1468 * Do not use devres here since devres_release_group() could
1469 * be called by component_unbind() id the aggregate device
1470 * fails to bind.
1471 */
1472 wcd->regmap = regmap_init_sdw(pdev, &wcd939x_regmap_config);
1473 if (IS_ERR(wcd->regmap))
1474 return dev_err_probe(dev, PTR_ERR(wcd->regmap),
1475 "Regmap init failed\n");
1476
1477 /* Start in cache-only until device is enumerated */
1478 regcache_cache_only(wcd->regmap, true);
1479 }
1480
1481 ret = component_add(dev, &wcd939x_sdw_component_ops);
1482 if (ret)
1483 return ret;
1484
1485 /* Set suspended until aggregate device is bind */
1486 pm_runtime_set_suspended(dev);
1487
1488 return 0;
1489 }
1490
wcd9390_remove(struct sdw_slave * pdev)1491 static int wcd9390_remove(struct sdw_slave *pdev)
1492 {
1493 struct device *dev = &pdev->dev;
1494 struct wcd939x_sdw_priv *wcd = dev_get_drvdata(dev);
1495
1496 component_del(dev, &wcd939x_sdw_component_ops);
1497
1498 if (wcd->regmap)
1499 regmap_exit(wcd->regmap);
1500
1501 return 0;
1502 }
1503
1504 static const struct sdw_device_id wcd9390_slave_id[] = {
1505 SDW_SLAVE_ENTRY(0x0217, 0x10e, 0), /* WCD9390 & WCD9390 RX/TX Device ID */
1506 {},
1507 };
1508 MODULE_DEVICE_TABLE(sdw, wcd9390_slave_id);
1509
wcd939x_sdw_runtime_suspend(struct device * dev)1510 static int __maybe_unused wcd939x_sdw_runtime_suspend(struct device *dev)
1511 {
1512 struct wcd939x_sdw_priv *wcd = dev_get_drvdata(dev);
1513
1514 if (wcd->regmap) {
1515 regcache_cache_only(wcd->regmap, true);
1516 regcache_mark_dirty(wcd->regmap);
1517 }
1518
1519 return 0;
1520 }
1521
wcd939x_sdw_runtime_resume(struct device * dev)1522 static int __maybe_unused wcd939x_sdw_runtime_resume(struct device *dev)
1523 {
1524 struct wcd939x_sdw_priv *wcd = dev_get_drvdata(dev);
1525
1526 if (wcd->regmap) {
1527 regcache_cache_only(wcd->regmap, false);
1528 regcache_sync(wcd->regmap);
1529 }
1530
1531 return 0;
1532 }
1533
1534 static const struct dev_pm_ops wcd939x_sdw_pm_ops = {
1535 SET_RUNTIME_PM_OPS(wcd939x_sdw_runtime_suspend, wcd939x_sdw_runtime_resume, NULL)
1536 };
1537
1538 static struct sdw_driver wcd9390_codec_driver = {
1539 .probe = wcd9390_probe,
1540 .remove = wcd9390_remove,
1541 .ops = &wcd9390_slave_ops,
1542 .id_table = wcd9390_slave_id,
1543 .driver = {
1544 .name = "wcd9390-codec",
1545 .pm = &wcd939x_sdw_pm_ops,
1546 }
1547 };
1548 module_sdw_driver(wcd9390_codec_driver);
1549
1550 MODULE_DESCRIPTION("WCD939X SDW codec driver");
1551 MODULE_LICENSE("GPL");
1552