1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (c) 2021, Linaro Limited
3
4 #include <linux/module.h>
5 #include <linux/slab.h>
6 #include <linux/platform_device.h>
7 #include <linux/device.h>
8 #include <linux/kernel.h>
9 #include <linux/component.h>
10 #include <linux/pm_runtime.h>
11 #include <linux/irq.h>
12 #include <linux/irqdomain.h>
13 #include <linux/of.h>
14 #include <linux/soundwire/sdw.h>
15 #include <linux/soundwire/sdw_type.h>
16 #include <linux/soundwire/sdw_registers.h>
17 #include <linux/regmap.h>
18 #include <sound/soc.h>
19 #include <sound/soc-dapm.h>
20 #include "wcd938x.h"
21 #include "wcd-common.h"
22
23 static const struct wcd_sdw_ch_info wcd938x_sdw_rx_ch_info[] = {
24 WCD_SDW_CH(WCD938X_HPH_L, WCD938X_HPH_PORT, BIT(0)),
25 WCD_SDW_CH(WCD938X_HPH_R, WCD938X_HPH_PORT, BIT(1)),
26 WCD_SDW_CH(WCD938X_CLSH, WCD938X_CLSH_PORT, BIT(0)),
27 WCD_SDW_CH(WCD938X_COMP_L, WCD938X_COMP_PORT, BIT(0)),
28 WCD_SDW_CH(WCD938X_COMP_R, WCD938X_COMP_PORT, BIT(1)),
29 WCD_SDW_CH(WCD938X_LO, WCD938X_LO_PORT, BIT(0)),
30 WCD_SDW_CH(WCD938X_DSD_L, WCD938X_DSD_PORT, BIT(0)),
31 WCD_SDW_CH(WCD938X_DSD_R, WCD938X_DSD_PORT, BIT(1)),
32 };
33
34 static const struct wcd_sdw_ch_info wcd938x_sdw_tx_ch_info[] = {
35 WCD_SDW_CH(WCD938X_ADC1, WCD938X_ADC_1_2_PORT, BIT(0)),
36 WCD_SDW_CH(WCD938X_ADC2, WCD938X_ADC_1_2_PORT, BIT(1)),
37 WCD_SDW_CH(WCD938X_ADC3, WCD938X_ADC_3_4_PORT, BIT(0)),
38 WCD_SDW_CH(WCD938X_ADC4, WCD938X_ADC_3_4_PORT, BIT(1)),
39 WCD_SDW_CH(WCD938X_DMIC0, WCD938X_DMIC_0_3_MBHC_PORT, BIT(0)),
40 WCD_SDW_CH(WCD938X_DMIC1, WCD938X_DMIC_0_3_MBHC_PORT, BIT(1)),
41 WCD_SDW_CH(WCD938X_MBHC, WCD938X_DMIC_0_3_MBHC_PORT, BIT(2)),
42 WCD_SDW_CH(WCD938X_DMIC2, WCD938X_DMIC_0_3_MBHC_PORT, BIT(2)),
43 WCD_SDW_CH(WCD938X_DMIC3, WCD938X_DMIC_0_3_MBHC_PORT, BIT(3)),
44 WCD_SDW_CH(WCD938X_DMIC4, WCD938X_DMIC_4_7_PORT, BIT(0)),
45 WCD_SDW_CH(WCD938X_DMIC5, WCD938X_DMIC_4_7_PORT, BIT(1)),
46 WCD_SDW_CH(WCD938X_DMIC6, WCD938X_DMIC_4_7_PORT, BIT(2)),
47 WCD_SDW_CH(WCD938X_DMIC7, WCD938X_DMIC_4_7_PORT, BIT(3)),
48 };
49
50 static struct sdw_dpn_prop wcd938x_dpn_prop[WCD938X_MAX_SWR_PORTS] = {
51 {
52 .num = 1,
53 .type = SDW_DPN_SIMPLE,
54 .min_ch = 1,
55 .max_ch = 8,
56 .simple_ch_prep_sm = true,
57 }, {
58 .num = 2,
59 .type = SDW_DPN_SIMPLE,
60 .min_ch = 1,
61 .max_ch = 4,
62 .simple_ch_prep_sm = true,
63 }, {
64 .num = 3,
65 .type = SDW_DPN_SIMPLE,
66 .min_ch = 1,
67 .max_ch = 4,
68 .simple_ch_prep_sm = true,
69 }, {
70 .num = 4,
71 .type = SDW_DPN_SIMPLE,
72 .min_ch = 1,
73 .max_ch = 4,
74 .simple_ch_prep_sm = true,
75 }, {
76 .num = 5,
77 .type = SDW_DPN_SIMPLE,
78 .min_ch = 1,
79 .max_ch = 4,
80 .simple_ch_prep_sm = true,
81 }
82 };
83
wcd938x_sdw_hw_params(struct wcd938x_sdw_priv * wcd,struct snd_pcm_substream * substream,struct snd_pcm_hw_params * params,struct snd_soc_dai * dai)84 int wcd938x_sdw_hw_params(struct wcd938x_sdw_priv *wcd,
85 struct snd_pcm_substream *substream,
86 struct snd_pcm_hw_params *params,
87 struct snd_soc_dai *dai)
88 {
89 struct sdw_port_config port_config[WCD938X_MAX_SWR_PORTS];
90 unsigned long ch_mask;
91 int i, j;
92
93 wcd->sconfig.ch_count = 1;
94 wcd->active_ports = 0;
95 for (i = 0; i < WCD938X_MAX_SWR_PORTS; i++) {
96 ch_mask = wcd->port_config[i].ch_mask;
97
98 if (!ch_mask)
99 continue;
100
101 for_each_set_bit(j, &ch_mask, 4)
102 wcd->sconfig.ch_count++;
103
104 port_config[wcd->active_ports] = wcd->port_config[i];
105 wcd->active_ports++;
106 }
107
108 wcd->sconfig.bps = 1;
109 wcd->sconfig.frame_rate = params_rate(params);
110 if (wcd->is_tx)
111 wcd->sconfig.direction = SDW_DATA_DIR_TX;
112 else
113 wcd->sconfig.direction = SDW_DATA_DIR_RX;
114
115 wcd->sconfig.type = SDW_STREAM_PCM;
116
117 return sdw_stream_add_slave(wcd->sdev, &wcd->sconfig,
118 &port_config[0], wcd->active_ports,
119 wcd->sruntime);
120 }
121 EXPORT_SYMBOL_GPL(wcd938x_sdw_hw_params);
122
wcd938x_sdw_free(struct wcd938x_sdw_priv * wcd,struct snd_pcm_substream * substream,struct snd_soc_dai * dai)123 int wcd938x_sdw_free(struct wcd938x_sdw_priv *wcd,
124 struct snd_pcm_substream *substream,
125 struct snd_soc_dai *dai)
126 {
127 sdw_stream_remove_slave(wcd->sdev, wcd->sruntime);
128
129 return 0;
130 }
131 EXPORT_SYMBOL_GPL(wcd938x_sdw_free);
132
wcd938x_sdw_set_sdw_stream(struct wcd938x_sdw_priv * wcd,struct snd_soc_dai * dai,void * stream,int direction)133 int wcd938x_sdw_set_sdw_stream(struct wcd938x_sdw_priv *wcd,
134 struct snd_soc_dai *dai,
135 void *stream, int direction)
136 {
137 wcd->sruntime = stream;
138
139 return 0;
140 }
141 EXPORT_SYMBOL_GPL(wcd938x_sdw_set_sdw_stream);
142
wcd9380_interrupt_callback(struct sdw_slave * slave,struct sdw_slave_intr_status * status)143 static int wcd9380_interrupt_callback(struct sdw_slave *slave,
144 struct sdw_slave_intr_status *status)
145 {
146 struct wcd938x_sdw_priv *wcd = dev_get_drvdata(&slave->dev);
147
148 return wcd_interrupt_callback(slave, wcd->slave_irq, WCD938X_DIGITAL_INTR_STATUS_0,
149 WCD938X_DIGITAL_INTR_STATUS_1, WCD938X_DIGITAL_INTR_STATUS_2);
150 }
151
152 static const struct reg_default wcd938x_defaults[] = {
153 {WCD938X_ANA_PAGE_REGISTER, 0x00},
154 {WCD938X_ANA_BIAS, 0x00},
155 {WCD938X_ANA_RX_SUPPLIES, 0x00},
156 {WCD938X_ANA_HPH, 0x0C},
157 {WCD938X_ANA_EAR, 0x00},
158 {WCD938X_ANA_EAR_COMPANDER_CTL, 0x02},
159 {WCD938X_ANA_TX_CH1, 0x20},
160 {WCD938X_ANA_TX_CH2, 0x00},
161 {WCD938X_ANA_TX_CH3, 0x20},
162 {WCD938X_ANA_TX_CH4, 0x00},
163 {WCD938X_ANA_MICB1_MICB2_DSP_EN_LOGIC, 0x00},
164 {WCD938X_ANA_MICB3_DSP_EN_LOGIC, 0x00},
165 {WCD938X_ANA_MBHC_MECH, 0x39},
166 {WCD938X_ANA_MBHC_ELECT, 0x08},
167 {WCD938X_ANA_MBHC_ZDET, 0x00},
168 {WCD938X_ANA_MBHC_RESULT_1, 0x00},
169 {WCD938X_ANA_MBHC_RESULT_2, 0x00},
170 {WCD938X_ANA_MBHC_RESULT_3, 0x00},
171 {WCD938X_ANA_MBHC_BTN0, 0x00},
172 {WCD938X_ANA_MBHC_BTN1, 0x10},
173 {WCD938X_ANA_MBHC_BTN2, 0x20},
174 {WCD938X_ANA_MBHC_BTN3, 0x30},
175 {WCD938X_ANA_MBHC_BTN4, 0x40},
176 {WCD938X_ANA_MBHC_BTN5, 0x50},
177 {WCD938X_ANA_MBHC_BTN6, 0x60},
178 {WCD938X_ANA_MBHC_BTN7, 0x70},
179 {WCD938X_ANA_MICB1, 0x10},
180 {WCD938X_ANA_MICB2, 0x10},
181 {WCD938X_ANA_MICB2_RAMP, 0x00},
182 {WCD938X_ANA_MICB3, 0x10},
183 {WCD938X_ANA_MICB4, 0x10},
184 {WCD938X_BIAS_CTL, 0x2A},
185 {WCD938X_BIAS_VBG_FINE_ADJ, 0x55},
186 {WCD938X_LDOL_VDDCX_ADJUST, 0x01},
187 {WCD938X_LDOL_DISABLE_LDOL, 0x00},
188 {WCD938X_MBHC_CTL_CLK, 0x00},
189 {WCD938X_MBHC_CTL_ANA, 0x00},
190 {WCD938X_MBHC_CTL_SPARE_1, 0x00},
191 {WCD938X_MBHC_CTL_SPARE_2, 0x00},
192 {WCD938X_MBHC_CTL_BCS, 0x00},
193 {WCD938X_MBHC_MOISTURE_DET_FSM_STATUS, 0x00},
194 {WCD938X_MBHC_TEST_CTL, 0x00},
195 {WCD938X_LDOH_MODE, 0x2B},
196 {WCD938X_LDOH_BIAS, 0x68},
197 {WCD938X_LDOH_STB_LOADS, 0x00},
198 {WCD938X_LDOH_SLOWRAMP, 0x50},
199 {WCD938X_MICB1_TEST_CTL_1, 0x1A},
200 {WCD938X_MICB1_TEST_CTL_2, 0x00},
201 {WCD938X_MICB1_TEST_CTL_3, 0xA4},
202 {WCD938X_MICB2_TEST_CTL_1, 0x1A},
203 {WCD938X_MICB2_TEST_CTL_2, 0x00},
204 {WCD938X_MICB2_TEST_CTL_3, 0x24},
205 {WCD938X_MICB3_TEST_CTL_1, 0x1A},
206 {WCD938X_MICB3_TEST_CTL_2, 0x00},
207 {WCD938X_MICB3_TEST_CTL_3, 0xA4},
208 {WCD938X_MICB4_TEST_CTL_1, 0x1A},
209 {WCD938X_MICB4_TEST_CTL_2, 0x00},
210 {WCD938X_MICB4_TEST_CTL_3, 0xA4},
211 {WCD938X_TX_COM_ADC_VCM, 0x39},
212 {WCD938X_TX_COM_BIAS_ATEST, 0xE0},
213 {WCD938X_TX_COM_SPARE1, 0x00},
214 {WCD938X_TX_COM_SPARE2, 0x00},
215 {WCD938X_TX_COM_TXFE_DIV_CTL, 0x22},
216 {WCD938X_TX_COM_TXFE_DIV_START, 0x00},
217 {WCD938X_TX_COM_SPARE3, 0x00},
218 {WCD938X_TX_COM_SPARE4, 0x00},
219 {WCD938X_TX_1_2_TEST_EN, 0xCC},
220 {WCD938X_TX_1_2_ADC_IB, 0xE9},
221 {WCD938X_TX_1_2_ATEST_REFCTL, 0x0A},
222 {WCD938X_TX_1_2_TEST_CTL, 0x38},
223 {WCD938X_TX_1_2_TEST_BLK_EN1, 0xFF},
224 {WCD938X_TX_1_2_TXFE1_CLKDIV, 0x00},
225 {WCD938X_TX_1_2_SAR2_ERR, 0x00},
226 {WCD938X_TX_1_2_SAR1_ERR, 0x00},
227 {WCD938X_TX_3_4_TEST_EN, 0xCC},
228 {WCD938X_TX_3_4_ADC_IB, 0xE9},
229 {WCD938X_TX_3_4_ATEST_REFCTL, 0x0A},
230 {WCD938X_TX_3_4_TEST_CTL, 0x38},
231 {WCD938X_TX_3_4_TEST_BLK_EN3, 0xFF},
232 {WCD938X_TX_3_4_TXFE3_CLKDIV, 0x00},
233 {WCD938X_TX_3_4_SAR4_ERR, 0x00},
234 {WCD938X_TX_3_4_SAR3_ERR, 0x00},
235 {WCD938X_TX_3_4_TEST_BLK_EN2, 0xFB},
236 {WCD938X_TX_3_4_TXFE2_CLKDIV, 0x00},
237 {WCD938X_TX_3_4_SPARE1, 0x00},
238 {WCD938X_TX_3_4_TEST_BLK_EN4, 0xFB},
239 {WCD938X_TX_3_4_TXFE4_CLKDIV, 0x00},
240 {WCD938X_TX_3_4_SPARE2, 0x00},
241 {WCD938X_CLASSH_MODE_1, 0x40},
242 {WCD938X_CLASSH_MODE_2, 0x3A},
243 {WCD938X_CLASSH_MODE_3, 0x00},
244 {WCD938X_CLASSH_CTRL_VCL_1, 0x70},
245 {WCD938X_CLASSH_CTRL_VCL_2, 0x82},
246 {WCD938X_CLASSH_CTRL_CCL_1, 0x31},
247 {WCD938X_CLASSH_CTRL_CCL_2, 0x80},
248 {WCD938X_CLASSH_CTRL_CCL_3, 0x80},
249 {WCD938X_CLASSH_CTRL_CCL_4, 0x51},
250 {WCD938X_CLASSH_CTRL_CCL_5, 0x00},
251 {WCD938X_CLASSH_BUCK_TMUX_A_D, 0x00},
252 {WCD938X_CLASSH_BUCK_SW_DRV_CNTL, 0x77},
253 {WCD938X_CLASSH_SPARE, 0x00},
254 {WCD938X_FLYBACK_EN, 0x4E},
255 {WCD938X_FLYBACK_VNEG_CTRL_1, 0x0B},
256 {WCD938X_FLYBACK_VNEG_CTRL_2, 0x45},
257 {WCD938X_FLYBACK_VNEG_CTRL_3, 0x74},
258 {WCD938X_FLYBACK_VNEG_CTRL_4, 0x7F},
259 {WCD938X_FLYBACK_VNEG_CTRL_5, 0x83},
260 {WCD938X_FLYBACK_VNEG_CTRL_6, 0x98},
261 {WCD938X_FLYBACK_VNEG_CTRL_7, 0xA9},
262 {WCD938X_FLYBACK_VNEG_CTRL_8, 0x68},
263 {WCD938X_FLYBACK_VNEG_CTRL_9, 0x64},
264 {WCD938X_FLYBACK_VNEGDAC_CTRL_1, 0xED},
265 {WCD938X_FLYBACK_VNEGDAC_CTRL_2, 0xF0},
266 {WCD938X_FLYBACK_VNEGDAC_CTRL_3, 0xA6},
267 {WCD938X_FLYBACK_CTRL_1, 0x65},
268 {WCD938X_FLYBACK_TEST_CTL, 0x00},
269 {WCD938X_RX_AUX_SW_CTL, 0x00},
270 {WCD938X_RX_PA_AUX_IN_CONN, 0x01},
271 {WCD938X_RX_TIMER_DIV, 0x32},
272 {WCD938X_RX_OCP_CTL, 0x1F},
273 {WCD938X_RX_OCP_COUNT, 0x77},
274 {WCD938X_RX_BIAS_EAR_DAC, 0xA0},
275 {WCD938X_RX_BIAS_EAR_AMP, 0xAA},
276 {WCD938X_RX_BIAS_HPH_LDO, 0xA9},
277 {WCD938X_RX_BIAS_HPH_PA, 0xAA},
278 {WCD938X_RX_BIAS_HPH_RDACBUFF_CNP2, 0x8A},
279 {WCD938X_RX_BIAS_HPH_RDAC_LDO, 0x88},
280 {WCD938X_RX_BIAS_HPH_CNP1, 0x82},
281 {WCD938X_RX_BIAS_HPH_LOWPOWER, 0x82},
282 {WCD938X_RX_BIAS_AUX_DAC, 0xA0},
283 {WCD938X_RX_BIAS_AUX_AMP, 0xAA},
284 {WCD938X_RX_BIAS_VNEGDAC_BLEEDER, 0x50},
285 {WCD938X_RX_BIAS_MISC, 0x00},
286 {WCD938X_RX_BIAS_BUCK_RST, 0x08},
287 {WCD938X_RX_BIAS_BUCK_VREF_ERRAMP, 0x44},
288 {WCD938X_RX_BIAS_FLYB_ERRAMP, 0x40},
289 {WCD938X_RX_BIAS_FLYB_BUFF, 0xAA},
290 {WCD938X_RX_BIAS_FLYB_MID_RST, 0x14},
291 {WCD938X_HPH_L_STATUS, 0x04},
292 {WCD938X_HPH_R_STATUS, 0x04},
293 {WCD938X_HPH_CNP_EN, 0x80},
294 {WCD938X_HPH_CNP_WG_CTL, 0x9A},
295 {WCD938X_HPH_CNP_WG_TIME, 0x14},
296 {WCD938X_HPH_OCP_CTL, 0x28},
297 {WCD938X_HPH_AUTO_CHOP, 0x16},
298 {WCD938X_HPH_CHOP_CTL, 0x83},
299 {WCD938X_HPH_PA_CTL1, 0x46},
300 {WCD938X_HPH_PA_CTL2, 0x50},
301 {WCD938X_HPH_L_EN, 0x80},
302 {WCD938X_HPH_L_TEST, 0xE0},
303 {WCD938X_HPH_L_ATEST, 0x50},
304 {WCD938X_HPH_R_EN, 0x80},
305 {WCD938X_HPH_R_TEST, 0xE0},
306 {WCD938X_HPH_R_ATEST, 0x54},
307 {WCD938X_HPH_RDAC_CLK_CTL1, 0x99},
308 {WCD938X_HPH_RDAC_CLK_CTL2, 0x9B},
309 {WCD938X_HPH_RDAC_LDO_CTL, 0x33},
310 {WCD938X_HPH_RDAC_CHOP_CLK_LP_CTL, 0x00},
311 {WCD938X_HPH_REFBUFF_UHQA_CTL, 0x68},
312 {WCD938X_HPH_REFBUFF_LP_CTL, 0x0E},
313 {WCD938X_HPH_L_DAC_CTL, 0x20},
314 {WCD938X_HPH_R_DAC_CTL, 0x20},
315 {WCD938X_HPH_SURGE_HPHLR_SURGE_COMP_SEL, 0x55},
316 {WCD938X_HPH_SURGE_HPHLR_SURGE_EN, 0x19},
317 {WCD938X_HPH_SURGE_HPHLR_SURGE_MISC1, 0xA0},
318 {WCD938X_HPH_SURGE_HPHLR_SURGE_STATUS, 0x00},
319 {WCD938X_EAR_EAR_EN_REG, 0x22},
320 {WCD938X_EAR_EAR_PA_CON, 0x44},
321 {WCD938X_EAR_EAR_SP_CON, 0xDB},
322 {WCD938X_EAR_EAR_DAC_CON, 0x80},
323 {WCD938X_EAR_EAR_CNP_FSM_CON, 0xB2},
324 {WCD938X_EAR_TEST_CTL, 0x00},
325 {WCD938X_EAR_STATUS_REG_1, 0x00},
326 {WCD938X_EAR_STATUS_REG_2, 0x08},
327 {WCD938X_ANA_NEW_PAGE_REGISTER, 0x00},
328 {WCD938X_HPH_NEW_ANA_HPH2, 0x00},
329 {WCD938X_HPH_NEW_ANA_HPH3, 0x00},
330 {WCD938X_SLEEP_CTL, 0x16},
331 {WCD938X_SLEEP_WATCHDOG_CTL, 0x00},
332 {WCD938X_MBHC_NEW_ELECT_REM_CLAMP_CTL, 0x00},
333 {WCD938X_MBHC_NEW_CTL_1, 0x02},
334 {WCD938X_MBHC_NEW_CTL_2, 0x05},
335 {WCD938X_MBHC_NEW_PLUG_DETECT_CTL, 0xE9},
336 {WCD938X_MBHC_NEW_ZDET_ANA_CTL, 0x0F},
337 {WCD938X_MBHC_NEW_ZDET_RAMP_CTL, 0x00},
338 {WCD938X_MBHC_NEW_FSM_STATUS, 0x00},
339 {WCD938X_MBHC_NEW_ADC_RESULT, 0x00},
340 {WCD938X_TX_NEW_AMIC_MUX_CFG, 0x00},
341 {WCD938X_AUX_AUXPA, 0x00},
342 {WCD938X_LDORXTX_MODE, 0x0C},
343 {WCD938X_LDORXTX_CONFIG, 0x10},
344 {WCD938X_DIE_CRACK_DIE_CRK_DET_EN, 0x00},
345 {WCD938X_DIE_CRACK_DIE_CRK_DET_OUT, 0x00},
346 {WCD938X_HPH_NEW_INT_RDAC_GAIN_CTL, 0x40},
347 {WCD938X_HPH_NEW_INT_RDAC_HD2_CTL_L, 0x81},
348 {WCD938X_HPH_NEW_INT_RDAC_VREF_CTL, 0x10},
349 {WCD938X_HPH_NEW_INT_RDAC_OVERRIDE_CTL, 0x00},
350 {WCD938X_HPH_NEW_INT_RDAC_HD2_CTL_R, 0x81},
351 {WCD938X_HPH_NEW_INT_PA_MISC1, 0x22},
352 {WCD938X_HPH_NEW_INT_PA_MISC2, 0x00},
353 {WCD938X_HPH_NEW_INT_PA_RDAC_MISC, 0x00},
354 {WCD938X_HPH_NEW_INT_HPH_TIMER1, 0xFE},
355 {WCD938X_HPH_NEW_INT_HPH_TIMER2, 0x02},
356 {WCD938X_HPH_NEW_INT_HPH_TIMER3, 0x4E},
357 {WCD938X_HPH_NEW_INT_HPH_TIMER4, 0x54},
358 {WCD938X_HPH_NEW_INT_PA_RDAC_MISC2, 0x00},
359 {WCD938X_HPH_NEW_INT_PA_RDAC_MISC3, 0x00},
360 {WCD938X_HPH_NEW_INT_RDAC_HD2_CTL_L_NEW, 0x90},
361 {WCD938X_HPH_NEW_INT_RDAC_HD2_CTL_R_NEW, 0x90},
362 {WCD938X_RX_NEW_INT_HPH_RDAC_BIAS_LOHIFI, 0x62},
363 {WCD938X_RX_NEW_INT_HPH_RDAC_BIAS_ULP, 0x01},
364 {WCD938X_RX_NEW_INT_HPH_RDAC_LDO_LP, 0x11},
365 {WCD938X_MBHC_NEW_INT_MOISTURE_DET_DC_CTRL, 0x57},
366 {WCD938X_MBHC_NEW_INT_MOISTURE_DET_POLLING_CTRL, 0x01},
367 {WCD938X_MBHC_NEW_INT_MECH_DET_CURRENT, 0x00},
368 {WCD938X_MBHC_NEW_INT_SPARE_2, 0x00},
369 {WCD938X_EAR_INT_NEW_EAR_CHOPPER_CON, 0xA8},
370 {WCD938X_EAR_INT_NEW_CNP_VCM_CON1, 0x42},
371 {WCD938X_EAR_INT_NEW_CNP_VCM_CON2, 0x22},
372 {WCD938X_EAR_INT_NEW_EAR_DYNAMIC_BIAS, 0x00},
373 {WCD938X_AUX_INT_EN_REG, 0x00},
374 {WCD938X_AUX_INT_PA_CTRL, 0x06},
375 {WCD938X_AUX_INT_SP_CTRL, 0xD2},
376 {WCD938X_AUX_INT_DAC_CTRL, 0x80},
377 {WCD938X_AUX_INT_CLK_CTRL, 0x50},
378 {WCD938X_AUX_INT_TEST_CTRL, 0x00},
379 {WCD938X_AUX_INT_STATUS_REG, 0x00},
380 {WCD938X_AUX_INT_MISC, 0x00},
381 {WCD938X_LDORXTX_INT_BIAS, 0x6E},
382 {WCD938X_LDORXTX_INT_STB_LOADS_DTEST, 0x50},
383 {WCD938X_LDORXTX_INT_TEST0, 0x1C},
384 {WCD938X_LDORXTX_INT_STARTUP_TIMER, 0xFF},
385 {WCD938X_LDORXTX_INT_TEST1, 0x1F},
386 {WCD938X_LDORXTX_INT_STATUS, 0x00},
387 {WCD938X_SLEEP_INT_WATCHDOG_CTL_1, 0x0A},
388 {WCD938X_SLEEP_INT_WATCHDOG_CTL_2, 0x0A},
389 {WCD938X_DIE_CRACK_INT_DIE_CRK_DET_INT1, 0x02},
390 {WCD938X_DIE_CRACK_INT_DIE_CRK_DET_INT2, 0x60},
391 {WCD938X_TX_COM_NEW_INT_TXFE_DIVSTOP_L2, 0xFF},
392 {WCD938X_TX_COM_NEW_INT_TXFE_DIVSTOP_L1, 0x7F},
393 {WCD938X_TX_COM_NEW_INT_TXFE_DIVSTOP_L0, 0x3F},
394 {WCD938X_TX_COM_NEW_INT_TXFE_DIVSTOP_ULP1P2M, 0x1F},
395 {WCD938X_TX_COM_NEW_INT_TXFE_DIVSTOP_ULP0P6M, 0x0F},
396 {WCD938X_TX_COM_NEW_INT_TXFE_ICTRL_STG1_L2L1, 0xD7},
397 {WCD938X_TX_COM_NEW_INT_TXFE_ICTRL_STG1_L0, 0xC8},
398 {WCD938X_TX_COM_NEW_INT_TXFE_ICTRL_STG1_ULP, 0xC6},
399 {WCD938X_TX_COM_NEW_INT_TXFE_ICTRL_STG2MAIN_L2L1, 0xD5},
400 {WCD938X_TX_COM_NEW_INT_TXFE_ICTRL_STG2MAIN_L0, 0xCA},
401 {WCD938X_TX_COM_NEW_INT_TXFE_ICTRL_STG2MAIN_ULP, 0x05},
402 {WCD938X_TX_COM_NEW_INT_TXFE_ICTRL_STG2CASC_L2L1L0, 0xA5},
403 {WCD938X_TX_COM_NEW_INT_TXFE_ICTRL_STG2CASC_ULP, 0x13},
404 {WCD938X_TX_COM_NEW_INT_TXADC_SCBIAS_L2L1, 0x88},
405 {WCD938X_TX_COM_NEW_INT_TXADC_SCBIAS_L0ULP, 0x42},
406 {WCD938X_TX_COM_NEW_INT_TXADC_INT_L2, 0xFF},
407 {WCD938X_TX_COM_NEW_INT_TXADC_INT_L1, 0x64},
408 {WCD938X_TX_COM_NEW_INT_TXADC_INT_L0, 0x64},
409 {WCD938X_TX_COM_NEW_INT_TXADC_INT_ULP, 0x77},
410 {WCD938X_DIGITAL_PAGE_REGISTER, 0x00},
411 {WCD938X_DIGITAL_CHIP_ID0, 0x00},
412 {WCD938X_DIGITAL_CHIP_ID1, 0x00},
413 {WCD938X_DIGITAL_CHIP_ID2, 0x0D},
414 {WCD938X_DIGITAL_CHIP_ID3, 0x01},
415 {WCD938X_DIGITAL_SWR_TX_CLK_RATE, 0x00},
416 {WCD938X_DIGITAL_CDC_RST_CTL, 0x03},
417 {WCD938X_DIGITAL_TOP_CLK_CFG, 0x00},
418 {WCD938X_DIGITAL_CDC_ANA_CLK_CTL, 0x00},
419 {WCD938X_DIGITAL_CDC_DIG_CLK_CTL, 0xF0},
420 {WCD938X_DIGITAL_SWR_RST_EN, 0x00},
421 {WCD938X_DIGITAL_CDC_PATH_MODE, 0x55},
422 {WCD938X_DIGITAL_CDC_RX_RST, 0x00},
423 {WCD938X_DIGITAL_CDC_RX0_CTL, 0xFC},
424 {WCD938X_DIGITAL_CDC_RX1_CTL, 0xFC},
425 {WCD938X_DIGITAL_CDC_RX2_CTL, 0xFC},
426 {WCD938X_DIGITAL_CDC_TX_ANA_MODE_0_1, 0x00},
427 {WCD938X_DIGITAL_CDC_TX_ANA_MODE_2_3, 0x00},
428 {WCD938X_DIGITAL_CDC_COMP_CTL_0, 0x00},
429 {WCD938X_DIGITAL_CDC_ANA_TX_CLK_CTL, 0x1E},
430 {WCD938X_DIGITAL_CDC_HPH_DSM_A1_0, 0x00},
431 {WCD938X_DIGITAL_CDC_HPH_DSM_A1_1, 0x01},
432 {WCD938X_DIGITAL_CDC_HPH_DSM_A2_0, 0x63},
433 {WCD938X_DIGITAL_CDC_HPH_DSM_A2_1, 0x04},
434 {WCD938X_DIGITAL_CDC_HPH_DSM_A3_0, 0xAC},
435 {WCD938X_DIGITAL_CDC_HPH_DSM_A3_1, 0x04},
436 {WCD938X_DIGITAL_CDC_HPH_DSM_A4_0, 0x1A},
437 {WCD938X_DIGITAL_CDC_HPH_DSM_A4_1, 0x03},
438 {WCD938X_DIGITAL_CDC_HPH_DSM_A5_0, 0xBC},
439 {WCD938X_DIGITAL_CDC_HPH_DSM_A5_1, 0x02},
440 {WCD938X_DIGITAL_CDC_HPH_DSM_A6_0, 0xC7},
441 {WCD938X_DIGITAL_CDC_HPH_DSM_A7_0, 0xF8},
442 {WCD938X_DIGITAL_CDC_HPH_DSM_C_0, 0x47},
443 {WCD938X_DIGITAL_CDC_HPH_DSM_C_1, 0x43},
444 {WCD938X_DIGITAL_CDC_HPH_DSM_C_2, 0xB1},
445 {WCD938X_DIGITAL_CDC_HPH_DSM_C_3, 0x17},
446 {WCD938X_DIGITAL_CDC_HPH_DSM_R1, 0x4D},
447 {WCD938X_DIGITAL_CDC_HPH_DSM_R2, 0x29},
448 {WCD938X_DIGITAL_CDC_HPH_DSM_R3, 0x34},
449 {WCD938X_DIGITAL_CDC_HPH_DSM_R4, 0x59},
450 {WCD938X_DIGITAL_CDC_HPH_DSM_R5, 0x66},
451 {WCD938X_DIGITAL_CDC_HPH_DSM_R6, 0x87},
452 {WCD938X_DIGITAL_CDC_HPH_DSM_R7, 0x64},
453 {WCD938X_DIGITAL_CDC_AUX_DSM_A1_0, 0x00},
454 {WCD938X_DIGITAL_CDC_AUX_DSM_A1_1, 0x01},
455 {WCD938X_DIGITAL_CDC_AUX_DSM_A2_0, 0x96},
456 {WCD938X_DIGITAL_CDC_AUX_DSM_A2_1, 0x09},
457 {WCD938X_DIGITAL_CDC_AUX_DSM_A3_0, 0xAB},
458 {WCD938X_DIGITAL_CDC_AUX_DSM_A3_1, 0x05},
459 {WCD938X_DIGITAL_CDC_AUX_DSM_A4_0, 0x1C},
460 {WCD938X_DIGITAL_CDC_AUX_DSM_A4_1, 0x02},
461 {WCD938X_DIGITAL_CDC_AUX_DSM_A5_0, 0x17},
462 {WCD938X_DIGITAL_CDC_AUX_DSM_A5_1, 0x02},
463 {WCD938X_DIGITAL_CDC_AUX_DSM_A6_0, 0xAA},
464 {WCD938X_DIGITAL_CDC_AUX_DSM_A7_0, 0xE3},
465 {WCD938X_DIGITAL_CDC_AUX_DSM_C_0, 0x69},
466 {WCD938X_DIGITAL_CDC_AUX_DSM_C_1, 0x54},
467 {WCD938X_DIGITAL_CDC_AUX_DSM_C_2, 0x02},
468 {WCD938X_DIGITAL_CDC_AUX_DSM_C_3, 0x15},
469 {WCD938X_DIGITAL_CDC_AUX_DSM_R1, 0xA4},
470 {WCD938X_DIGITAL_CDC_AUX_DSM_R2, 0xB5},
471 {WCD938X_DIGITAL_CDC_AUX_DSM_R3, 0x86},
472 {WCD938X_DIGITAL_CDC_AUX_DSM_R4, 0x85},
473 {WCD938X_DIGITAL_CDC_AUX_DSM_R5, 0xAA},
474 {WCD938X_DIGITAL_CDC_AUX_DSM_R6, 0xE2},
475 {WCD938X_DIGITAL_CDC_AUX_DSM_R7, 0x62},
476 {WCD938X_DIGITAL_CDC_HPH_GAIN_RX_0, 0x55},
477 {WCD938X_DIGITAL_CDC_HPH_GAIN_RX_1, 0xA9},
478 {WCD938X_DIGITAL_CDC_HPH_GAIN_DSD_0, 0x3D},
479 {WCD938X_DIGITAL_CDC_HPH_GAIN_DSD_1, 0x2E},
480 {WCD938X_DIGITAL_CDC_HPH_GAIN_DSD_2, 0x01},
481 {WCD938X_DIGITAL_CDC_AUX_GAIN_DSD_0, 0x00},
482 {WCD938X_DIGITAL_CDC_AUX_GAIN_DSD_1, 0xFC},
483 {WCD938X_DIGITAL_CDC_AUX_GAIN_DSD_2, 0x01},
484 {WCD938X_DIGITAL_CDC_HPH_GAIN_CTL, 0x00},
485 {WCD938X_DIGITAL_CDC_AUX_GAIN_CTL, 0x00},
486 {WCD938X_DIGITAL_CDC_EAR_PATH_CTL, 0x00},
487 {WCD938X_DIGITAL_CDC_SWR_CLH, 0x00},
488 {WCD938X_DIGITAL_SWR_CLH_BYP, 0x00},
489 {WCD938X_DIGITAL_CDC_TX0_CTL, 0x68},
490 {WCD938X_DIGITAL_CDC_TX1_CTL, 0x68},
491 {WCD938X_DIGITAL_CDC_TX2_CTL, 0x68},
492 {WCD938X_DIGITAL_CDC_TX_RST, 0x00},
493 {WCD938X_DIGITAL_CDC_REQ_CTL, 0x01},
494 {WCD938X_DIGITAL_CDC_RST, 0x00},
495 {WCD938X_DIGITAL_CDC_AMIC_CTL, 0x0F},
496 {WCD938X_DIGITAL_CDC_DMIC_CTL, 0x04},
497 {WCD938X_DIGITAL_CDC_DMIC1_CTL, 0x01},
498 {WCD938X_DIGITAL_CDC_DMIC2_CTL, 0x01},
499 {WCD938X_DIGITAL_CDC_DMIC3_CTL, 0x01},
500 {WCD938X_DIGITAL_CDC_DMIC4_CTL, 0x01},
501 {WCD938X_DIGITAL_EFUSE_PRG_CTL, 0x00},
502 {WCD938X_DIGITAL_EFUSE_CTL, 0x2B},
503 {WCD938X_DIGITAL_CDC_DMIC_RATE_1_2, 0x11},
504 {WCD938X_DIGITAL_CDC_DMIC_RATE_3_4, 0x11},
505 {WCD938X_DIGITAL_PDM_WD_CTL0, 0x00},
506 {WCD938X_DIGITAL_PDM_WD_CTL1, 0x00},
507 {WCD938X_DIGITAL_PDM_WD_CTL2, 0x00},
508 {WCD938X_DIGITAL_INTR_MODE, 0x00},
509 {WCD938X_DIGITAL_INTR_MASK_0, 0xFF},
510 {WCD938X_DIGITAL_INTR_MASK_1, 0xFF},
511 {WCD938X_DIGITAL_INTR_MASK_2, 0x3F},
512 {WCD938X_DIGITAL_INTR_STATUS_0, 0x00},
513 {WCD938X_DIGITAL_INTR_STATUS_1, 0x00},
514 {WCD938X_DIGITAL_INTR_STATUS_2, 0x00},
515 {WCD938X_DIGITAL_INTR_CLEAR_0, 0x00},
516 {WCD938X_DIGITAL_INTR_CLEAR_1, 0x00},
517 {WCD938X_DIGITAL_INTR_CLEAR_2, 0x00},
518 {WCD938X_DIGITAL_INTR_LEVEL_0, 0x00},
519 {WCD938X_DIGITAL_INTR_LEVEL_1, 0x00},
520 {WCD938X_DIGITAL_INTR_LEVEL_2, 0x00},
521 {WCD938X_DIGITAL_INTR_SET_0, 0x00},
522 {WCD938X_DIGITAL_INTR_SET_1, 0x00},
523 {WCD938X_DIGITAL_INTR_SET_2, 0x00},
524 {WCD938X_DIGITAL_INTR_TEST_0, 0x00},
525 {WCD938X_DIGITAL_INTR_TEST_1, 0x00},
526 {WCD938X_DIGITAL_INTR_TEST_2, 0x00},
527 {WCD938X_DIGITAL_TX_MODE_DBG_EN, 0x00},
528 {WCD938X_DIGITAL_TX_MODE_DBG_0_1, 0x00},
529 {WCD938X_DIGITAL_TX_MODE_DBG_2_3, 0x00},
530 {WCD938X_DIGITAL_LB_IN_SEL_CTL, 0x00},
531 {WCD938X_DIGITAL_LOOP_BACK_MODE, 0x00},
532 {WCD938X_DIGITAL_SWR_DAC_TEST, 0x00},
533 {WCD938X_DIGITAL_SWR_HM_TEST_RX_0, 0x40},
534 {WCD938X_DIGITAL_SWR_HM_TEST_TX_0, 0x40},
535 {WCD938X_DIGITAL_SWR_HM_TEST_RX_1, 0x00},
536 {WCD938X_DIGITAL_SWR_HM_TEST_TX_1, 0x00},
537 {WCD938X_DIGITAL_SWR_HM_TEST_TX_2, 0x00},
538 {WCD938X_DIGITAL_SWR_HM_TEST_0, 0x00},
539 {WCD938X_DIGITAL_SWR_HM_TEST_1, 0x00},
540 {WCD938X_DIGITAL_PAD_CTL_SWR_0, 0x8F},
541 {WCD938X_DIGITAL_PAD_CTL_SWR_1, 0x06},
542 {WCD938X_DIGITAL_I2C_CTL, 0x00},
543 {WCD938X_DIGITAL_CDC_TX_TANGGU_SW_MODE, 0x00},
544 {WCD938X_DIGITAL_EFUSE_TEST_CTL_0, 0x00},
545 {WCD938X_DIGITAL_EFUSE_TEST_CTL_1, 0x00},
546 {WCD938X_DIGITAL_EFUSE_T_DATA_0, 0x00},
547 {WCD938X_DIGITAL_EFUSE_T_DATA_1, 0x00},
548 {WCD938X_DIGITAL_PAD_CTL_PDM_RX0, 0xF1},
549 {WCD938X_DIGITAL_PAD_CTL_PDM_RX1, 0xF1},
550 {WCD938X_DIGITAL_PAD_CTL_PDM_TX0, 0xF1},
551 {WCD938X_DIGITAL_PAD_CTL_PDM_TX1, 0xF1},
552 {WCD938X_DIGITAL_PAD_CTL_PDM_TX2, 0xF1},
553 {WCD938X_DIGITAL_PAD_INP_DIS_0, 0x00},
554 {WCD938X_DIGITAL_PAD_INP_DIS_1, 0x00},
555 {WCD938X_DIGITAL_DRIVE_STRENGTH_0, 0x00},
556 {WCD938X_DIGITAL_DRIVE_STRENGTH_1, 0x00},
557 {WCD938X_DIGITAL_DRIVE_STRENGTH_2, 0x00},
558 {WCD938X_DIGITAL_RX_DATA_EDGE_CTL, 0x1F},
559 {WCD938X_DIGITAL_TX_DATA_EDGE_CTL, 0x80},
560 {WCD938X_DIGITAL_GPIO_MODE, 0x00},
561 {WCD938X_DIGITAL_PIN_CTL_OE, 0x00},
562 {WCD938X_DIGITAL_PIN_CTL_DATA_0, 0x00},
563 {WCD938X_DIGITAL_PIN_CTL_DATA_1, 0x00},
564 {WCD938X_DIGITAL_PIN_STATUS_0, 0x00},
565 {WCD938X_DIGITAL_PIN_STATUS_1, 0x00},
566 {WCD938X_DIGITAL_DIG_DEBUG_CTL, 0x00},
567 {WCD938X_DIGITAL_DIG_DEBUG_EN, 0x00},
568 {WCD938X_DIGITAL_ANA_CSR_DBG_ADD, 0x00},
569 {WCD938X_DIGITAL_ANA_CSR_DBG_CTL, 0x48},
570 {WCD938X_DIGITAL_SSP_DBG, 0x00},
571 {WCD938X_DIGITAL_MODE_STATUS_0, 0x00},
572 {WCD938X_DIGITAL_MODE_STATUS_1, 0x00},
573 {WCD938X_DIGITAL_SPARE_0, 0x00},
574 {WCD938X_DIGITAL_SPARE_1, 0x00},
575 {WCD938X_DIGITAL_SPARE_2, 0x00},
576 {WCD938X_DIGITAL_EFUSE_REG_0, 0x00},
577 {WCD938X_DIGITAL_EFUSE_REG_1, 0xFF},
578 {WCD938X_DIGITAL_EFUSE_REG_2, 0xFF},
579 {WCD938X_DIGITAL_EFUSE_REG_3, 0xFF},
580 {WCD938X_DIGITAL_EFUSE_REG_4, 0xFF},
581 {WCD938X_DIGITAL_EFUSE_REG_5, 0xFF},
582 {WCD938X_DIGITAL_EFUSE_REG_6, 0xFF},
583 {WCD938X_DIGITAL_EFUSE_REG_7, 0xFF},
584 {WCD938X_DIGITAL_EFUSE_REG_8, 0xFF},
585 {WCD938X_DIGITAL_EFUSE_REG_9, 0xFF},
586 {WCD938X_DIGITAL_EFUSE_REG_10, 0xFF},
587 {WCD938X_DIGITAL_EFUSE_REG_11, 0xFF},
588 {WCD938X_DIGITAL_EFUSE_REG_12, 0xFF},
589 {WCD938X_DIGITAL_EFUSE_REG_13, 0xFF},
590 {WCD938X_DIGITAL_EFUSE_REG_14, 0xFF},
591 {WCD938X_DIGITAL_EFUSE_REG_15, 0xFF},
592 {WCD938X_DIGITAL_EFUSE_REG_16, 0xFF},
593 {WCD938X_DIGITAL_EFUSE_REG_17, 0xFF},
594 {WCD938X_DIGITAL_EFUSE_REG_18, 0xFF},
595 {WCD938X_DIGITAL_EFUSE_REG_19, 0xFF},
596 {WCD938X_DIGITAL_EFUSE_REG_20, 0x0E},
597 {WCD938X_DIGITAL_EFUSE_REG_21, 0x00},
598 {WCD938X_DIGITAL_EFUSE_REG_22, 0x00},
599 {WCD938X_DIGITAL_EFUSE_REG_23, 0xF8},
600 {WCD938X_DIGITAL_EFUSE_REG_24, 0x16},
601 {WCD938X_DIGITAL_EFUSE_REG_25, 0x00},
602 {WCD938X_DIGITAL_EFUSE_REG_26, 0x00},
603 {WCD938X_DIGITAL_EFUSE_REG_27, 0x00},
604 {WCD938X_DIGITAL_EFUSE_REG_28, 0x00},
605 {WCD938X_DIGITAL_EFUSE_REG_29, 0x00},
606 {WCD938X_DIGITAL_EFUSE_REG_30, 0x00},
607 {WCD938X_DIGITAL_EFUSE_REG_31, 0x00},
608 {WCD938X_DIGITAL_TX_REQ_FB_CTL_0, 0x88},
609 {WCD938X_DIGITAL_TX_REQ_FB_CTL_1, 0x88},
610 {WCD938X_DIGITAL_TX_REQ_FB_CTL_2, 0x88},
611 {WCD938X_DIGITAL_TX_REQ_FB_CTL_3, 0x88},
612 {WCD938X_DIGITAL_TX_REQ_FB_CTL_4, 0x88},
613 {WCD938X_DIGITAL_DEM_BYPASS_DATA0, 0x55},
614 {WCD938X_DIGITAL_DEM_BYPASS_DATA1, 0x55},
615 {WCD938X_DIGITAL_DEM_BYPASS_DATA2, 0x55},
616 {WCD938X_DIGITAL_DEM_BYPASS_DATA3, 0x01},
617 };
618
wcd938x_rdwr_register(struct device * dev,unsigned int reg)619 static bool wcd938x_rdwr_register(struct device *dev, unsigned int reg)
620 {
621 switch (reg) {
622 case WCD938X_ANA_PAGE_REGISTER:
623 case WCD938X_ANA_BIAS:
624 case WCD938X_ANA_RX_SUPPLIES:
625 case WCD938X_ANA_HPH:
626 case WCD938X_ANA_EAR:
627 case WCD938X_ANA_EAR_COMPANDER_CTL:
628 case WCD938X_ANA_TX_CH1:
629 case WCD938X_ANA_TX_CH2:
630 case WCD938X_ANA_TX_CH3:
631 case WCD938X_ANA_TX_CH4:
632 case WCD938X_ANA_MICB1_MICB2_DSP_EN_LOGIC:
633 case WCD938X_ANA_MICB3_DSP_EN_LOGIC:
634 case WCD938X_ANA_MBHC_MECH:
635 case WCD938X_ANA_MBHC_ELECT:
636 case WCD938X_ANA_MBHC_ZDET:
637 case WCD938X_ANA_MBHC_BTN0:
638 case WCD938X_ANA_MBHC_BTN1:
639 case WCD938X_ANA_MBHC_BTN2:
640 case WCD938X_ANA_MBHC_BTN3:
641 case WCD938X_ANA_MBHC_BTN4:
642 case WCD938X_ANA_MBHC_BTN5:
643 case WCD938X_ANA_MBHC_BTN6:
644 case WCD938X_ANA_MBHC_BTN7:
645 case WCD938X_ANA_MICB1:
646 case WCD938X_ANA_MICB2:
647 case WCD938X_ANA_MICB2_RAMP:
648 case WCD938X_ANA_MICB3:
649 case WCD938X_ANA_MICB4:
650 case WCD938X_BIAS_CTL:
651 case WCD938X_BIAS_VBG_FINE_ADJ:
652 case WCD938X_LDOL_VDDCX_ADJUST:
653 case WCD938X_LDOL_DISABLE_LDOL:
654 case WCD938X_MBHC_CTL_CLK:
655 case WCD938X_MBHC_CTL_ANA:
656 case WCD938X_MBHC_CTL_SPARE_1:
657 case WCD938X_MBHC_CTL_SPARE_2:
658 case WCD938X_MBHC_CTL_BCS:
659 case WCD938X_MBHC_TEST_CTL:
660 case WCD938X_LDOH_MODE:
661 case WCD938X_LDOH_BIAS:
662 case WCD938X_LDOH_STB_LOADS:
663 case WCD938X_LDOH_SLOWRAMP:
664 case WCD938X_MICB1_TEST_CTL_1:
665 case WCD938X_MICB1_TEST_CTL_2:
666 case WCD938X_MICB1_TEST_CTL_3:
667 case WCD938X_MICB2_TEST_CTL_1:
668 case WCD938X_MICB2_TEST_CTL_2:
669 case WCD938X_MICB2_TEST_CTL_3:
670 case WCD938X_MICB3_TEST_CTL_1:
671 case WCD938X_MICB3_TEST_CTL_2:
672 case WCD938X_MICB3_TEST_CTL_3:
673 case WCD938X_MICB4_TEST_CTL_1:
674 case WCD938X_MICB4_TEST_CTL_2:
675 case WCD938X_MICB4_TEST_CTL_3:
676 case WCD938X_TX_COM_ADC_VCM:
677 case WCD938X_TX_COM_BIAS_ATEST:
678 case WCD938X_TX_COM_SPARE1:
679 case WCD938X_TX_COM_SPARE2:
680 case WCD938X_TX_COM_TXFE_DIV_CTL:
681 case WCD938X_TX_COM_TXFE_DIV_START:
682 case WCD938X_TX_COM_SPARE3:
683 case WCD938X_TX_COM_SPARE4:
684 case WCD938X_TX_1_2_TEST_EN:
685 case WCD938X_TX_1_2_ADC_IB:
686 case WCD938X_TX_1_2_ATEST_REFCTL:
687 case WCD938X_TX_1_2_TEST_CTL:
688 case WCD938X_TX_1_2_TEST_BLK_EN1:
689 case WCD938X_TX_1_2_TXFE1_CLKDIV:
690 case WCD938X_TX_3_4_TEST_EN:
691 case WCD938X_TX_3_4_ADC_IB:
692 case WCD938X_TX_3_4_ATEST_REFCTL:
693 case WCD938X_TX_3_4_TEST_CTL:
694 case WCD938X_TX_3_4_TEST_BLK_EN3:
695 case WCD938X_TX_3_4_TXFE3_CLKDIV:
696 case WCD938X_TX_3_4_TEST_BLK_EN2:
697 case WCD938X_TX_3_4_TXFE2_CLKDIV:
698 case WCD938X_TX_3_4_SPARE1:
699 case WCD938X_TX_3_4_TEST_BLK_EN4:
700 case WCD938X_TX_3_4_TXFE4_CLKDIV:
701 case WCD938X_TX_3_4_SPARE2:
702 case WCD938X_CLASSH_MODE_1:
703 case WCD938X_CLASSH_MODE_2:
704 case WCD938X_CLASSH_MODE_3:
705 case WCD938X_CLASSH_CTRL_VCL_1:
706 case WCD938X_CLASSH_CTRL_VCL_2:
707 case WCD938X_CLASSH_CTRL_CCL_1:
708 case WCD938X_CLASSH_CTRL_CCL_2:
709 case WCD938X_CLASSH_CTRL_CCL_3:
710 case WCD938X_CLASSH_CTRL_CCL_4:
711 case WCD938X_CLASSH_CTRL_CCL_5:
712 case WCD938X_CLASSH_BUCK_TMUX_A_D:
713 case WCD938X_CLASSH_BUCK_SW_DRV_CNTL:
714 case WCD938X_CLASSH_SPARE:
715 case WCD938X_FLYBACK_EN:
716 case WCD938X_FLYBACK_VNEG_CTRL_1:
717 case WCD938X_FLYBACK_VNEG_CTRL_2:
718 case WCD938X_FLYBACK_VNEG_CTRL_3:
719 case WCD938X_FLYBACK_VNEG_CTRL_4:
720 case WCD938X_FLYBACK_VNEG_CTRL_5:
721 case WCD938X_FLYBACK_VNEG_CTRL_6:
722 case WCD938X_FLYBACK_VNEG_CTRL_7:
723 case WCD938X_FLYBACK_VNEG_CTRL_8:
724 case WCD938X_FLYBACK_VNEG_CTRL_9:
725 case WCD938X_FLYBACK_VNEGDAC_CTRL_1:
726 case WCD938X_FLYBACK_VNEGDAC_CTRL_2:
727 case WCD938X_FLYBACK_VNEGDAC_CTRL_3:
728 case WCD938X_FLYBACK_CTRL_1:
729 case WCD938X_FLYBACK_TEST_CTL:
730 case WCD938X_RX_AUX_SW_CTL:
731 case WCD938X_RX_PA_AUX_IN_CONN:
732 case WCD938X_RX_TIMER_DIV:
733 case WCD938X_RX_OCP_CTL:
734 case WCD938X_RX_OCP_COUNT:
735 case WCD938X_RX_BIAS_EAR_DAC:
736 case WCD938X_RX_BIAS_EAR_AMP:
737 case WCD938X_RX_BIAS_HPH_LDO:
738 case WCD938X_RX_BIAS_HPH_PA:
739 case WCD938X_RX_BIAS_HPH_RDACBUFF_CNP2:
740 case WCD938X_RX_BIAS_HPH_RDAC_LDO:
741 case WCD938X_RX_BIAS_HPH_CNP1:
742 case WCD938X_RX_BIAS_HPH_LOWPOWER:
743 case WCD938X_RX_BIAS_AUX_DAC:
744 case WCD938X_RX_BIAS_AUX_AMP:
745 case WCD938X_RX_BIAS_VNEGDAC_BLEEDER:
746 case WCD938X_RX_BIAS_MISC:
747 case WCD938X_RX_BIAS_BUCK_RST:
748 case WCD938X_RX_BIAS_BUCK_VREF_ERRAMP:
749 case WCD938X_RX_BIAS_FLYB_ERRAMP:
750 case WCD938X_RX_BIAS_FLYB_BUFF:
751 case WCD938X_RX_BIAS_FLYB_MID_RST:
752 case WCD938X_HPH_CNP_EN:
753 case WCD938X_HPH_CNP_WG_CTL:
754 case WCD938X_HPH_CNP_WG_TIME:
755 case WCD938X_HPH_OCP_CTL:
756 case WCD938X_HPH_AUTO_CHOP:
757 case WCD938X_HPH_CHOP_CTL:
758 case WCD938X_HPH_PA_CTL1:
759 case WCD938X_HPH_PA_CTL2:
760 case WCD938X_HPH_L_EN:
761 case WCD938X_HPH_L_TEST:
762 case WCD938X_HPH_L_ATEST:
763 case WCD938X_HPH_R_EN:
764 case WCD938X_HPH_R_TEST:
765 case WCD938X_HPH_R_ATEST:
766 case WCD938X_HPH_RDAC_CLK_CTL1:
767 case WCD938X_HPH_RDAC_CLK_CTL2:
768 case WCD938X_HPH_RDAC_LDO_CTL:
769 case WCD938X_HPH_RDAC_CHOP_CLK_LP_CTL:
770 case WCD938X_HPH_REFBUFF_UHQA_CTL:
771 case WCD938X_HPH_REFBUFF_LP_CTL:
772 case WCD938X_HPH_L_DAC_CTL:
773 case WCD938X_HPH_R_DAC_CTL:
774 case WCD938X_HPH_SURGE_HPHLR_SURGE_COMP_SEL:
775 case WCD938X_HPH_SURGE_HPHLR_SURGE_EN:
776 case WCD938X_HPH_SURGE_HPHLR_SURGE_MISC1:
777 case WCD938X_EAR_EAR_EN_REG:
778 case WCD938X_EAR_EAR_PA_CON:
779 case WCD938X_EAR_EAR_SP_CON:
780 case WCD938X_EAR_EAR_DAC_CON:
781 case WCD938X_EAR_EAR_CNP_FSM_CON:
782 case WCD938X_EAR_TEST_CTL:
783 case WCD938X_ANA_NEW_PAGE_REGISTER:
784 case WCD938X_HPH_NEW_ANA_HPH2:
785 case WCD938X_HPH_NEW_ANA_HPH3:
786 case WCD938X_SLEEP_CTL:
787 case WCD938X_SLEEP_WATCHDOG_CTL:
788 case WCD938X_MBHC_NEW_ELECT_REM_CLAMP_CTL:
789 case WCD938X_MBHC_NEW_CTL_1:
790 case WCD938X_MBHC_NEW_CTL_2:
791 case WCD938X_MBHC_NEW_PLUG_DETECT_CTL:
792 case WCD938X_MBHC_NEW_ZDET_ANA_CTL:
793 case WCD938X_MBHC_NEW_ZDET_RAMP_CTL:
794 case WCD938X_TX_NEW_AMIC_MUX_CFG:
795 case WCD938X_AUX_AUXPA:
796 case WCD938X_LDORXTX_MODE:
797 case WCD938X_LDORXTX_CONFIG:
798 case WCD938X_DIE_CRACK_DIE_CRK_DET_EN:
799 case WCD938X_HPH_NEW_INT_RDAC_GAIN_CTL:
800 case WCD938X_HPH_NEW_INT_RDAC_HD2_CTL_L:
801 case WCD938X_HPH_NEW_INT_RDAC_VREF_CTL:
802 case WCD938X_HPH_NEW_INT_RDAC_OVERRIDE_CTL:
803 case WCD938X_HPH_NEW_INT_RDAC_HD2_CTL_R:
804 case WCD938X_HPH_NEW_INT_PA_MISC1:
805 case WCD938X_HPH_NEW_INT_PA_MISC2:
806 case WCD938X_HPH_NEW_INT_PA_RDAC_MISC:
807 case WCD938X_HPH_NEW_INT_HPH_TIMER1:
808 case WCD938X_HPH_NEW_INT_HPH_TIMER2:
809 case WCD938X_HPH_NEW_INT_HPH_TIMER3:
810 case WCD938X_HPH_NEW_INT_HPH_TIMER4:
811 case WCD938X_HPH_NEW_INT_PA_RDAC_MISC2:
812 case WCD938X_HPH_NEW_INT_PA_RDAC_MISC3:
813 case WCD938X_HPH_NEW_INT_RDAC_HD2_CTL_L_NEW:
814 case WCD938X_HPH_NEW_INT_RDAC_HD2_CTL_R_NEW:
815 case WCD938X_RX_NEW_INT_HPH_RDAC_BIAS_LOHIFI:
816 case WCD938X_RX_NEW_INT_HPH_RDAC_BIAS_ULP:
817 case WCD938X_RX_NEW_INT_HPH_RDAC_LDO_LP:
818 case WCD938X_MBHC_NEW_INT_MOISTURE_DET_DC_CTRL:
819 case WCD938X_MBHC_NEW_INT_MOISTURE_DET_POLLING_CTRL:
820 case WCD938X_MBHC_NEW_INT_MECH_DET_CURRENT:
821 case WCD938X_MBHC_NEW_INT_SPARE_2:
822 case WCD938X_EAR_INT_NEW_EAR_CHOPPER_CON:
823 case WCD938X_EAR_INT_NEW_CNP_VCM_CON1:
824 case WCD938X_EAR_INT_NEW_CNP_VCM_CON2:
825 case WCD938X_EAR_INT_NEW_EAR_DYNAMIC_BIAS:
826 case WCD938X_AUX_INT_EN_REG:
827 case WCD938X_AUX_INT_PA_CTRL:
828 case WCD938X_AUX_INT_SP_CTRL:
829 case WCD938X_AUX_INT_DAC_CTRL:
830 case WCD938X_AUX_INT_CLK_CTRL:
831 case WCD938X_AUX_INT_TEST_CTRL:
832 case WCD938X_AUX_INT_MISC:
833 case WCD938X_LDORXTX_INT_BIAS:
834 case WCD938X_LDORXTX_INT_STB_LOADS_DTEST:
835 case WCD938X_LDORXTX_INT_TEST0:
836 case WCD938X_LDORXTX_INT_STARTUP_TIMER:
837 case WCD938X_LDORXTX_INT_TEST1:
838 case WCD938X_SLEEP_INT_WATCHDOG_CTL_1:
839 case WCD938X_SLEEP_INT_WATCHDOG_CTL_2:
840 case WCD938X_DIE_CRACK_INT_DIE_CRK_DET_INT1:
841 case WCD938X_DIE_CRACK_INT_DIE_CRK_DET_INT2:
842 case WCD938X_TX_COM_NEW_INT_TXFE_DIVSTOP_L2:
843 case WCD938X_TX_COM_NEW_INT_TXFE_DIVSTOP_L1:
844 case WCD938X_TX_COM_NEW_INT_TXFE_DIVSTOP_L0:
845 case WCD938X_TX_COM_NEW_INT_TXFE_DIVSTOP_ULP1P2M:
846 case WCD938X_TX_COM_NEW_INT_TXFE_DIVSTOP_ULP0P6M:
847 case WCD938X_TX_COM_NEW_INT_TXFE_ICTRL_STG1_L2L1:
848 case WCD938X_TX_COM_NEW_INT_TXFE_ICTRL_STG1_L0:
849 case WCD938X_TX_COM_NEW_INT_TXFE_ICTRL_STG1_ULP:
850 case WCD938X_TX_COM_NEW_INT_TXFE_ICTRL_STG2MAIN_L2L1:
851 case WCD938X_TX_COM_NEW_INT_TXFE_ICTRL_STG2MAIN_L0:
852 case WCD938X_TX_COM_NEW_INT_TXFE_ICTRL_STG2MAIN_ULP:
853 case WCD938X_TX_COM_NEW_INT_TXFE_ICTRL_STG2CASC_L2L1L0:
854 case WCD938X_TX_COM_NEW_INT_TXFE_ICTRL_STG2CASC_ULP:
855 case WCD938X_TX_COM_NEW_INT_TXADC_SCBIAS_L2L1:
856 case WCD938X_TX_COM_NEW_INT_TXADC_SCBIAS_L0ULP:
857 case WCD938X_TX_COM_NEW_INT_TXADC_INT_L2:
858 case WCD938X_TX_COM_NEW_INT_TXADC_INT_L1:
859 case WCD938X_TX_COM_NEW_INT_TXADC_INT_L0:
860 case WCD938X_TX_COM_NEW_INT_TXADC_INT_ULP:
861 case WCD938X_DIGITAL_PAGE_REGISTER:
862 case WCD938X_DIGITAL_SWR_TX_CLK_RATE:
863 case WCD938X_DIGITAL_CDC_RST_CTL:
864 case WCD938X_DIGITAL_TOP_CLK_CFG:
865 case WCD938X_DIGITAL_CDC_ANA_CLK_CTL:
866 case WCD938X_DIGITAL_CDC_DIG_CLK_CTL:
867 case WCD938X_DIGITAL_SWR_RST_EN:
868 case WCD938X_DIGITAL_CDC_PATH_MODE:
869 case WCD938X_DIGITAL_CDC_RX_RST:
870 case WCD938X_DIGITAL_CDC_RX0_CTL:
871 case WCD938X_DIGITAL_CDC_RX1_CTL:
872 case WCD938X_DIGITAL_CDC_RX2_CTL:
873 case WCD938X_DIGITAL_CDC_TX_ANA_MODE_0_1:
874 case WCD938X_DIGITAL_CDC_TX_ANA_MODE_2_3:
875 case WCD938X_DIGITAL_CDC_COMP_CTL_0:
876 case WCD938X_DIGITAL_CDC_ANA_TX_CLK_CTL:
877 case WCD938X_DIGITAL_CDC_HPH_DSM_A1_0:
878 case WCD938X_DIGITAL_CDC_HPH_DSM_A1_1:
879 case WCD938X_DIGITAL_CDC_HPH_DSM_A2_0:
880 case WCD938X_DIGITAL_CDC_HPH_DSM_A2_1:
881 case WCD938X_DIGITAL_CDC_HPH_DSM_A3_0:
882 case WCD938X_DIGITAL_CDC_HPH_DSM_A3_1:
883 case WCD938X_DIGITAL_CDC_HPH_DSM_A4_0:
884 case WCD938X_DIGITAL_CDC_HPH_DSM_A4_1:
885 case WCD938X_DIGITAL_CDC_HPH_DSM_A5_0:
886 case WCD938X_DIGITAL_CDC_HPH_DSM_A5_1:
887 case WCD938X_DIGITAL_CDC_HPH_DSM_A6_0:
888 case WCD938X_DIGITAL_CDC_HPH_DSM_A7_0:
889 case WCD938X_DIGITAL_CDC_HPH_DSM_C_0:
890 case WCD938X_DIGITAL_CDC_HPH_DSM_C_1:
891 case WCD938X_DIGITAL_CDC_HPH_DSM_C_2:
892 case WCD938X_DIGITAL_CDC_HPH_DSM_C_3:
893 case WCD938X_DIGITAL_CDC_HPH_DSM_R1:
894 case WCD938X_DIGITAL_CDC_HPH_DSM_R2:
895 case WCD938X_DIGITAL_CDC_HPH_DSM_R3:
896 case WCD938X_DIGITAL_CDC_HPH_DSM_R4:
897 case WCD938X_DIGITAL_CDC_HPH_DSM_R5:
898 case WCD938X_DIGITAL_CDC_HPH_DSM_R6:
899 case WCD938X_DIGITAL_CDC_HPH_DSM_R7:
900 case WCD938X_DIGITAL_CDC_AUX_DSM_A1_0:
901 case WCD938X_DIGITAL_CDC_AUX_DSM_A1_1:
902 case WCD938X_DIGITAL_CDC_AUX_DSM_A2_0:
903 case WCD938X_DIGITAL_CDC_AUX_DSM_A2_1:
904 case WCD938X_DIGITAL_CDC_AUX_DSM_A3_0:
905 case WCD938X_DIGITAL_CDC_AUX_DSM_A3_1:
906 case WCD938X_DIGITAL_CDC_AUX_DSM_A4_0:
907 case WCD938X_DIGITAL_CDC_AUX_DSM_A4_1:
908 case WCD938X_DIGITAL_CDC_AUX_DSM_A5_0:
909 case WCD938X_DIGITAL_CDC_AUX_DSM_A5_1:
910 case WCD938X_DIGITAL_CDC_AUX_DSM_A6_0:
911 case WCD938X_DIGITAL_CDC_AUX_DSM_A7_0:
912 case WCD938X_DIGITAL_CDC_AUX_DSM_C_0:
913 case WCD938X_DIGITAL_CDC_AUX_DSM_C_1:
914 case WCD938X_DIGITAL_CDC_AUX_DSM_C_2:
915 case WCD938X_DIGITAL_CDC_AUX_DSM_C_3:
916 case WCD938X_DIGITAL_CDC_AUX_DSM_R1:
917 case WCD938X_DIGITAL_CDC_AUX_DSM_R2:
918 case WCD938X_DIGITAL_CDC_AUX_DSM_R3:
919 case WCD938X_DIGITAL_CDC_AUX_DSM_R4:
920 case WCD938X_DIGITAL_CDC_AUX_DSM_R5:
921 case WCD938X_DIGITAL_CDC_AUX_DSM_R6:
922 case WCD938X_DIGITAL_CDC_AUX_DSM_R7:
923 case WCD938X_DIGITAL_CDC_HPH_GAIN_RX_0:
924 case WCD938X_DIGITAL_CDC_HPH_GAIN_RX_1:
925 case WCD938X_DIGITAL_CDC_HPH_GAIN_DSD_0:
926 case WCD938X_DIGITAL_CDC_HPH_GAIN_DSD_1:
927 case WCD938X_DIGITAL_CDC_HPH_GAIN_DSD_2:
928 case WCD938X_DIGITAL_CDC_AUX_GAIN_DSD_0:
929 case WCD938X_DIGITAL_CDC_AUX_GAIN_DSD_1:
930 case WCD938X_DIGITAL_CDC_AUX_GAIN_DSD_2:
931 case WCD938X_DIGITAL_CDC_HPH_GAIN_CTL:
932 case WCD938X_DIGITAL_CDC_AUX_GAIN_CTL:
933 case WCD938X_DIGITAL_CDC_EAR_PATH_CTL:
934 case WCD938X_DIGITAL_CDC_SWR_CLH:
935 case WCD938X_DIGITAL_SWR_CLH_BYP:
936 case WCD938X_DIGITAL_CDC_TX0_CTL:
937 case WCD938X_DIGITAL_CDC_TX1_CTL:
938 case WCD938X_DIGITAL_CDC_TX2_CTL:
939 case WCD938X_DIGITAL_CDC_TX_RST:
940 case WCD938X_DIGITAL_CDC_REQ_CTL:
941 case WCD938X_DIGITAL_CDC_RST:
942 case WCD938X_DIGITAL_CDC_AMIC_CTL:
943 case WCD938X_DIGITAL_CDC_DMIC_CTL:
944 case WCD938X_DIGITAL_CDC_DMIC1_CTL:
945 case WCD938X_DIGITAL_CDC_DMIC2_CTL:
946 case WCD938X_DIGITAL_CDC_DMIC3_CTL:
947 case WCD938X_DIGITAL_CDC_DMIC4_CTL:
948 case WCD938X_DIGITAL_EFUSE_PRG_CTL:
949 case WCD938X_DIGITAL_EFUSE_CTL:
950 case WCD938X_DIGITAL_CDC_DMIC_RATE_1_2:
951 case WCD938X_DIGITAL_CDC_DMIC_RATE_3_4:
952 case WCD938X_DIGITAL_PDM_WD_CTL0:
953 case WCD938X_DIGITAL_PDM_WD_CTL1:
954 case WCD938X_DIGITAL_PDM_WD_CTL2:
955 case WCD938X_DIGITAL_INTR_MODE:
956 case WCD938X_DIGITAL_INTR_MASK_0:
957 case WCD938X_DIGITAL_INTR_MASK_1:
958 case WCD938X_DIGITAL_INTR_MASK_2:
959 case WCD938X_DIGITAL_INTR_CLEAR_0:
960 case WCD938X_DIGITAL_INTR_CLEAR_1:
961 case WCD938X_DIGITAL_INTR_CLEAR_2:
962 case WCD938X_DIGITAL_INTR_LEVEL_0:
963 case WCD938X_DIGITAL_INTR_LEVEL_1:
964 case WCD938X_DIGITAL_INTR_LEVEL_2:
965 case WCD938X_DIGITAL_INTR_SET_0:
966 case WCD938X_DIGITAL_INTR_SET_1:
967 case WCD938X_DIGITAL_INTR_SET_2:
968 case WCD938X_DIGITAL_INTR_TEST_0:
969 case WCD938X_DIGITAL_INTR_TEST_1:
970 case WCD938X_DIGITAL_INTR_TEST_2:
971 case WCD938X_DIGITAL_TX_MODE_DBG_EN:
972 case WCD938X_DIGITAL_TX_MODE_DBG_0_1:
973 case WCD938X_DIGITAL_TX_MODE_DBG_2_3:
974 case WCD938X_DIGITAL_LB_IN_SEL_CTL:
975 case WCD938X_DIGITAL_LOOP_BACK_MODE:
976 case WCD938X_DIGITAL_SWR_DAC_TEST:
977 case WCD938X_DIGITAL_SWR_HM_TEST_RX_0:
978 case WCD938X_DIGITAL_SWR_HM_TEST_TX_0:
979 case WCD938X_DIGITAL_SWR_HM_TEST_RX_1:
980 case WCD938X_DIGITAL_SWR_HM_TEST_TX_1:
981 case WCD938X_DIGITAL_SWR_HM_TEST_TX_2:
982 case WCD938X_DIGITAL_PAD_CTL_SWR_0:
983 case WCD938X_DIGITAL_PAD_CTL_SWR_1:
984 case WCD938X_DIGITAL_I2C_CTL:
985 case WCD938X_DIGITAL_CDC_TX_TANGGU_SW_MODE:
986 case WCD938X_DIGITAL_EFUSE_TEST_CTL_0:
987 case WCD938X_DIGITAL_EFUSE_TEST_CTL_1:
988 case WCD938X_DIGITAL_PAD_CTL_PDM_RX0:
989 case WCD938X_DIGITAL_PAD_CTL_PDM_RX1:
990 case WCD938X_DIGITAL_PAD_CTL_PDM_TX0:
991 case WCD938X_DIGITAL_PAD_CTL_PDM_TX1:
992 case WCD938X_DIGITAL_PAD_CTL_PDM_TX2:
993 case WCD938X_DIGITAL_PAD_INP_DIS_0:
994 case WCD938X_DIGITAL_PAD_INP_DIS_1:
995 case WCD938X_DIGITAL_DRIVE_STRENGTH_0:
996 case WCD938X_DIGITAL_DRIVE_STRENGTH_1:
997 case WCD938X_DIGITAL_DRIVE_STRENGTH_2:
998 case WCD938X_DIGITAL_RX_DATA_EDGE_CTL:
999 case WCD938X_DIGITAL_TX_DATA_EDGE_CTL:
1000 case WCD938X_DIGITAL_GPIO_MODE:
1001 case WCD938X_DIGITAL_PIN_CTL_OE:
1002 case WCD938X_DIGITAL_PIN_CTL_DATA_0:
1003 case WCD938X_DIGITAL_PIN_CTL_DATA_1:
1004 case WCD938X_DIGITAL_DIG_DEBUG_CTL:
1005 case WCD938X_DIGITAL_DIG_DEBUG_EN:
1006 case WCD938X_DIGITAL_ANA_CSR_DBG_ADD:
1007 case WCD938X_DIGITAL_ANA_CSR_DBG_CTL:
1008 case WCD938X_DIGITAL_SSP_DBG:
1009 case WCD938X_DIGITAL_SPARE_0:
1010 case WCD938X_DIGITAL_SPARE_1:
1011 case WCD938X_DIGITAL_SPARE_2:
1012 case WCD938X_DIGITAL_TX_REQ_FB_CTL_0:
1013 case WCD938X_DIGITAL_TX_REQ_FB_CTL_1:
1014 case WCD938X_DIGITAL_TX_REQ_FB_CTL_2:
1015 case WCD938X_DIGITAL_TX_REQ_FB_CTL_3:
1016 case WCD938X_DIGITAL_TX_REQ_FB_CTL_4:
1017 case WCD938X_DIGITAL_DEM_BYPASS_DATA0:
1018 case WCD938X_DIGITAL_DEM_BYPASS_DATA1:
1019 case WCD938X_DIGITAL_DEM_BYPASS_DATA2:
1020 case WCD938X_DIGITAL_DEM_BYPASS_DATA3:
1021 return true;
1022 }
1023
1024 return false;
1025 }
1026
wcd938x_readonly_register(struct device * dev,unsigned int reg)1027 static bool wcd938x_readonly_register(struct device *dev, unsigned int reg)
1028 {
1029 switch (reg) {
1030 case WCD938X_ANA_MBHC_RESULT_1:
1031 case WCD938X_ANA_MBHC_RESULT_2:
1032 case WCD938X_ANA_MBHC_RESULT_3:
1033 case WCD938X_MBHC_MOISTURE_DET_FSM_STATUS:
1034 case WCD938X_TX_1_2_SAR2_ERR:
1035 case WCD938X_TX_1_2_SAR1_ERR:
1036 case WCD938X_TX_3_4_SAR4_ERR:
1037 case WCD938X_TX_3_4_SAR3_ERR:
1038 case WCD938X_HPH_L_STATUS:
1039 case WCD938X_HPH_R_STATUS:
1040 case WCD938X_HPH_SURGE_HPHLR_SURGE_STATUS:
1041 case WCD938X_EAR_STATUS_REG_1:
1042 case WCD938X_EAR_STATUS_REG_2:
1043 case WCD938X_MBHC_NEW_FSM_STATUS:
1044 case WCD938X_MBHC_NEW_ADC_RESULT:
1045 case WCD938X_DIE_CRACK_DIE_CRK_DET_OUT:
1046 case WCD938X_AUX_INT_STATUS_REG:
1047 case WCD938X_LDORXTX_INT_STATUS:
1048 case WCD938X_DIGITAL_CHIP_ID0:
1049 case WCD938X_DIGITAL_CHIP_ID1:
1050 case WCD938X_DIGITAL_CHIP_ID2:
1051 case WCD938X_DIGITAL_CHIP_ID3:
1052 case WCD938X_DIGITAL_INTR_STATUS_0:
1053 case WCD938X_DIGITAL_INTR_STATUS_1:
1054 case WCD938X_DIGITAL_INTR_STATUS_2:
1055 case WCD938X_DIGITAL_INTR_CLEAR_0:
1056 case WCD938X_DIGITAL_INTR_CLEAR_1:
1057 case WCD938X_DIGITAL_INTR_CLEAR_2:
1058 case WCD938X_DIGITAL_SWR_HM_TEST_0:
1059 case WCD938X_DIGITAL_SWR_HM_TEST_1:
1060 case WCD938X_DIGITAL_EFUSE_T_DATA_0:
1061 case WCD938X_DIGITAL_EFUSE_T_DATA_1:
1062 case WCD938X_DIGITAL_PIN_STATUS_0:
1063 case WCD938X_DIGITAL_PIN_STATUS_1:
1064 case WCD938X_DIGITAL_MODE_STATUS_0:
1065 case WCD938X_DIGITAL_MODE_STATUS_1:
1066 case WCD938X_DIGITAL_EFUSE_REG_0:
1067 case WCD938X_DIGITAL_EFUSE_REG_1:
1068 case WCD938X_DIGITAL_EFUSE_REG_2:
1069 case WCD938X_DIGITAL_EFUSE_REG_3:
1070 case WCD938X_DIGITAL_EFUSE_REG_4:
1071 case WCD938X_DIGITAL_EFUSE_REG_5:
1072 case WCD938X_DIGITAL_EFUSE_REG_6:
1073 case WCD938X_DIGITAL_EFUSE_REG_7:
1074 case WCD938X_DIGITAL_EFUSE_REG_8:
1075 case WCD938X_DIGITAL_EFUSE_REG_9:
1076 case WCD938X_DIGITAL_EFUSE_REG_10:
1077 case WCD938X_DIGITAL_EFUSE_REG_11:
1078 case WCD938X_DIGITAL_EFUSE_REG_12:
1079 case WCD938X_DIGITAL_EFUSE_REG_13:
1080 case WCD938X_DIGITAL_EFUSE_REG_14:
1081 case WCD938X_DIGITAL_EFUSE_REG_15:
1082 case WCD938X_DIGITAL_EFUSE_REG_16:
1083 case WCD938X_DIGITAL_EFUSE_REG_17:
1084 case WCD938X_DIGITAL_EFUSE_REG_18:
1085 case WCD938X_DIGITAL_EFUSE_REG_19:
1086 case WCD938X_DIGITAL_EFUSE_REG_20:
1087 case WCD938X_DIGITAL_EFUSE_REG_21:
1088 case WCD938X_DIGITAL_EFUSE_REG_22:
1089 case WCD938X_DIGITAL_EFUSE_REG_23:
1090 case WCD938X_DIGITAL_EFUSE_REG_24:
1091 case WCD938X_DIGITAL_EFUSE_REG_25:
1092 case WCD938X_DIGITAL_EFUSE_REG_26:
1093 case WCD938X_DIGITAL_EFUSE_REG_27:
1094 case WCD938X_DIGITAL_EFUSE_REG_28:
1095 case WCD938X_DIGITAL_EFUSE_REG_29:
1096 case WCD938X_DIGITAL_EFUSE_REG_30:
1097 case WCD938X_DIGITAL_EFUSE_REG_31:
1098 return true;
1099 }
1100 return false;
1101 }
1102
wcd938x_readable_register(struct device * dev,unsigned int reg)1103 static bool wcd938x_readable_register(struct device *dev, unsigned int reg)
1104 {
1105 bool ret;
1106
1107 ret = wcd938x_readonly_register(dev, reg);
1108 if (!ret)
1109 return wcd938x_rdwr_register(dev, reg);
1110
1111 return ret;
1112 }
1113
wcd938x_writeable_register(struct device * dev,unsigned int reg)1114 static bool wcd938x_writeable_register(struct device *dev, unsigned int reg)
1115 {
1116 return wcd938x_rdwr_register(dev, reg);
1117 }
1118
wcd938x_volatile_register(struct device * dev,unsigned int reg)1119 static bool wcd938x_volatile_register(struct device *dev, unsigned int reg)
1120 {
1121 if (reg <= WCD938X_BASE_ADDRESS)
1122 return false;
1123
1124 if (reg == WCD938X_DIGITAL_SWR_TX_CLK_RATE)
1125 return true;
1126
1127 if (wcd938x_readonly_register(dev, reg))
1128 return true;
1129
1130 return false;
1131 }
1132
1133 static const struct regmap_config wcd938x_regmap_config = {
1134 .name = "wcd938x_csr",
1135 .reg_bits = 32,
1136 .val_bits = 8,
1137 .cache_type = REGCACHE_MAPLE,
1138 .reg_defaults = wcd938x_defaults,
1139 .num_reg_defaults = ARRAY_SIZE(wcd938x_defaults),
1140 .max_register = WCD938X_MAX_REGISTER,
1141 .readable_reg = wcd938x_readable_register,
1142 .writeable_reg = wcd938x_writeable_register,
1143 .volatile_reg = wcd938x_volatile_register,
1144 };
1145
1146 static const struct sdw_slave_ops wcd9380_slave_ops = {
1147 .update_status = wcd_update_status,
1148 .interrupt_callback = wcd9380_interrupt_callback,
1149 .bus_config = wcd_bus_config,
1150 };
1151
wcd9380_probe(struct sdw_slave * pdev,const struct sdw_device_id * id)1152 static int wcd9380_probe(struct sdw_slave *pdev,
1153 const struct sdw_device_id *id)
1154 {
1155 struct device *dev = &pdev->dev;
1156 struct wcd938x_sdw_priv *wcd;
1157 int ret;
1158
1159 wcd = devm_kzalloc(dev, sizeof(*wcd), GFP_KERNEL);
1160 if (!wcd)
1161 return -ENOMEM;
1162
1163 /*
1164 * Port map index starts with 0, however the data port for this codec
1165 * are from index 1
1166 */
1167 if (of_property_present(dev->of_node, "qcom,tx-port-mapping")) {
1168 wcd->is_tx = true;
1169 ret = of_property_read_u32_array(dev->of_node, "qcom,tx-port-mapping",
1170 &pdev->m_port_map[1],
1171 WCD938X_MAX_TX_SWR_PORTS);
1172 } else {
1173 ret = of_property_read_u32_array(dev->of_node, "qcom,rx-port-mapping",
1174 &pdev->m_port_map[1],
1175 WCD938X_MAX_SWR_PORTS);
1176 }
1177
1178 if (ret < 0)
1179 dev_info(dev, "Static Port mapping not specified\n");
1180
1181 wcd->sdev = pdev;
1182 dev_set_drvdata(dev, wcd);
1183
1184 pdev->prop.scp_int1_mask = SDW_SCP_INT1_IMPL_DEF |
1185 SDW_SCP_INT1_BUS_CLASH |
1186 SDW_SCP_INT1_PARITY;
1187 pdev->prop.lane_control_support = true;
1188 pdev->prop.simple_clk_stop_capable = true;
1189 if (wcd->is_tx) {
1190 pdev->prop.source_ports = GENMASK(WCD938X_MAX_SWR_PORTS - 1, 0);
1191 pdev->prop.src_dpn_prop = wcd938x_dpn_prop;
1192 wcd->ch_info = &wcd938x_sdw_tx_ch_info[0];
1193 pdev->prop.wake_capable = true;
1194 } else {
1195 pdev->prop.sink_ports = GENMASK(WCD938X_MAX_SWR_PORTS - 1, 0);
1196 pdev->prop.sink_dpn_prop = wcd938x_dpn_prop;
1197 wcd->ch_info = &wcd938x_sdw_rx_ch_info[0];
1198 }
1199
1200 if (wcd->is_tx) {
1201 wcd->regmap = devm_regmap_init_sdw(pdev, &wcd938x_regmap_config);
1202 if (IS_ERR(wcd->regmap))
1203 return dev_err_probe(dev, PTR_ERR(wcd->regmap),
1204 "Regmap init failed\n");
1205
1206 /* Start in cache-only until device is enumerated */
1207 regcache_cache_only(wcd->regmap, true);
1208 }
1209
1210 ret = component_add(dev, &wcd_sdw_component_ops);
1211 if (ret)
1212 return ret;
1213
1214 /* Set suspended until aggregate device is bind */
1215 pm_runtime_set_suspended(dev);
1216
1217 return 0;
1218 }
1219
wcd9380_remove(struct sdw_slave * pdev)1220 static int wcd9380_remove(struct sdw_slave *pdev)
1221 {
1222 struct device *dev = &pdev->dev;
1223
1224 component_del(dev, &wcd_sdw_component_ops);
1225
1226 return 0;
1227 }
1228
1229 static const struct sdw_device_id wcd9380_slave_id[] = {
1230 SDW_SLAVE_ENTRY(0x0217, 0x10d, 0),
1231 {},
1232 };
1233 MODULE_DEVICE_TABLE(sdw, wcd9380_slave_id);
1234
wcd938x_sdw_runtime_suspend(struct device * dev)1235 static int wcd938x_sdw_runtime_suspend(struct device *dev)
1236 {
1237 struct wcd938x_sdw_priv *wcd = dev_get_drvdata(dev);
1238
1239 if (wcd->regmap) {
1240 regcache_cache_only(wcd->regmap, true);
1241 regcache_mark_dirty(wcd->regmap);
1242 }
1243
1244 return 0;
1245 }
1246
wcd938x_sdw_runtime_resume(struct device * dev)1247 static int wcd938x_sdw_runtime_resume(struct device *dev)
1248 {
1249 struct wcd938x_sdw_priv *wcd = dev_get_drvdata(dev);
1250
1251 if (wcd->regmap) {
1252 regcache_cache_only(wcd->regmap, false);
1253 regcache_sync(wcd->regmap);
1254 }
1255
1256 pm_runtime_mark_last_busy(dev);
1257
1258 return 0;
1259 }
1260
1261 static const struct dev_pm_ops wcd938x_sdw_pm_ops = {
1262 RUNTIME_PM_OPS(wcd938x_sdw_runtime_suspend, wcd938x_sdw_runtime_resume, NULL)
1263 };
1264
1265
1266 static struct sdw_driver wcd9380_codec_driver = {
1267 .probe = wcd9380_probe,
1268 .remove = wcd9380_remove,
1269 .ops = &wcd9380_slave_ops,
1270 .id_table = wcd9380_slave_id,
1271 .driver = {
1272 .name = "wcd9380-codec",
1273 .pm = pm_ptr(&wcd938x_sdw_pm_ops),
1274 }
1275 };
1276 module_sdw_driver(wcd9380_codec_driver);
1277
1278 MODULE_DESCRIPTION("WCD938X SDW codec driver");
1279 MODULE_LICENSE("GPL");
1280