1 // SPDX-License-Identifier: GPL-2.0-only 2 /* 3 * KXCJK-1013 3-axis accelerometer driver 4 * Copyright (c) 2014, Intel Corporation. 5 */ 6 7 #include <linux/i2c.h> 8 #include <linux/interrupt.h> 9 #include <linux/delay.h> 10 #include <linux/bitops.h> 11 #include <linux/module.h> 12 #include <linux/slab.h> 13 #include <linux/string.h> 14 #include <linux/types.h> 15 #include <linux/acpi.h> 16 #include <linux/pm.h> 17 #include <linux/pm_runtime.h> 18 #include <linux/regulator/consumer.h> 19 #include <linux/iio/iio.h> 20 #include <linux/iio/sysfs.h> 21 #include <linux/iio/buffer.h> 22 #include <linux/iio/trigger.h> 23 #include <linux/iio/events.h> 24 #include <linux/iio/trigger_consumer.h> 25 #include <linux/iio/triggered_buffer.h> 26 #include <linux/iio/accel/kxcjk_1013.h> 27 28 #define KXTF9_REG_HP_XOUT_L 0x00 29 #define KXTF9_REG_HP_XOUT_H 0x01 30 #define KXTF9_REG_HP_YOUT_L 0x02 31 #define KXTF9_REG_HP_YOUT_H 0x03 32 #define KXTF9_REG_HP_ZOUT_L 0x04 33 #define KXTF9_REG_HP_ZOUT_H 0x05 34 35 #define KXCJK1013_REG_XOUT_L 0x06 36 /* 37 * From low byte X axis register, all the other addresses of Y and Z can be 38 * obtained by just applying axis offset. The following axis defines are just 39 * provide clarity, but not used. 40 */ 41 #define KXCJK1013_REG_XOUT_H 0x07 42 #define KXCJK1013_REG_YOUT_L 0x08 43 #define KXCJK1013_REG_YOUT_H 0x09 44 #define KXCJK1013_REG_ZOUT_L 0x0A 45 #define KXCJK1013_REG_ZOUT_H 0x0B 46 47 #define KXCJK1013_REG_DCST_RESP 0x0C 48 #define KXCJK1013_REG_WHO_AM_I 0x0F 49 #define KXTF9_REG_TILT_POS_CUR 0x10 50 #define KXTF9_REG_TILT_POS_PREV 0x11 51 #define KXTF9_REG_INT_SRC1 0x15 52 #define KXTF9_REG_INT_SRC2 0x16 53 #define KXCJK1013_REG_INT_SRC1 0x16 54 #define KXCJK1013_REG_INT_SRC2 0x17 55 #define KXCJK1013_REG_STATUS_REG 0x18 56 #define KXCJK1013_REG_INT_REL 0x1A 57 #define KXCJK1013_REG_CTRL1 0x1B 58 #define KXTF9_REG_CTRL2 0x1C 59 #define KXTF9_REG_CTRL3 0x1D 60 #define KXCJK1013_REG_CTRL2 0x1D 61 #define KXCJK1013_REG_INT_CTRL1 0x1E 62 #define KXCJK1013_REG_INT_CTRL2 0x1F 63 #define KXTF9_REG_INT_CTRL3 0x20 64 #define KXCJK1013_REG_DATA_CTRL 0x21 65 #define KXTF9_REG_TILT_TIMER 0x28 66 #define KXCJK1013_REG_WAKE_TIMER 0x29 67 #define KXTF9_REG_TDT_TIMER 0x2B 68 #define KXTF9_REG_TDT_THRESH_H 0x2C 69 #define KXTF9_REG_TDT_THRESH_L 0x2D 70 #define KXTF9_REG_TDT_TAP_TIMER 0x2E 71 #define KXTF9_REG_TDT_TOTAL_TIMER 0x2F 72 #define KXTF9_REG_TDT_LATENCY_TIMER 0x30 73 #define KXTF9_REG_TDT_WINDOW_TIMER 0x31 74 #define KXCJK1013_REG_SELF_TEST 0x3A 75 #define KXTF9_REG_WAKE_THRESH 0x5A 76 #define KXTF9_REG_TILT_ANGLE 0x5C 77 #define KXTF9_REG_HYST_SET 0x5F 78 #define KXCJK1013_REG_WAKE_THRES 0x6A 79 80 /* Everything up to 0x11 is equal to KXCJK1013/KXTF9 above */ 81 #define KX023_REG_INS1 0x12 82 #define KX023_REG_INS2 0x13 83 #define KX023_REG_INS3 0x14 84 #define KX023_REG_STAT 0x15 85 #define KX023_REG_INT_REL 0x17 86 #define KX023_REG_CNTL1 0x18 87 #define KX023_REG_CNTL2 0x19 88 #define KX023_REG_CNTL3 0x1A 89 #define KX023_REG_ODCNTL 0x1B 90 #define KX023_REG_INC1 0x1C 91 #define KX023_REG_INC2 0x1D 92 #define KX023_REG_INC3 0x1E 93 #define KX023_REG_INC4 0x1F 94 #define KX023_REG_INC5 0x20 95 #define KX023_REG_INC6 0x21 96 #define KX023_REG_TILT_TIMER 0x22 97 #define KX023_REG_WUFC 0x23 98 #define KX023_REG_TDTRC 0x24 99 #define KX023_REG_TDTC 0x25 100 #define KX023_REG_TTH 0x26 101 #define KX023_REG_TTL 0x27 102 #define KX023_REG_FTD 0x28 103 #define KX023_REG_STD 0x29 104 #define KX023_REG_TLT 0x2A 105 #define KX023_REG_TWS 0x2B 106 #define KX023_REG_ATH 0x30 107 #define KX023_REG_TILT_ANGLE_LL 0x32 108 #define KX023_REG_TILT_ANGLE_HL 0x33 109 #define KX023_REG_HYST_SET 0x34 110 #define KX023_REG_LP_CNTL 0x35 111 #define KX023_REG_BUF_CNTL1 0x3A 112 #define KX023_REG_BUF_CNTL2 0x3B 113 #define KX023_REG_BUF_STATUS_1 0x3C 114 #define KX023_REG_BUF_STATUS_2 0x3D 115 #define KX023_REG_BUF_CLEAR 0x3E 116 #define KX023_REG_BUF_READ 0x3F 117 #define KX023_REG_SELF_TEST 0x60 118 119 #define KXCJK1013_REG_CTRL1_BIT_PC1 BIT(7) 120 #define KXCJK1013_REG_CTRL1_BIT_RES BIT(6) 121 #define KXCJK1013_REG_CTRL1_BIT_DRDY BIT(5) 122 #define KXCJK1013_REG_CTRL1_BIT_GSEL1 BIT(4) 123 #define KXCJK1013_REG_CTRL1_BIT_GSEL0 BIT(3) 124 #define KXCJK1013_REG_CTRL1_BIT_WUFE BIT(1) 125 126 #define KXCJK1013_REG_INT_CTRL1_BIT_IEU BIT(2) /* KXTF9 */ 127 #define KXCJK1013_REG_INT_CTRL1_BIT_IEL BIT(3) 128 #define KXCJK1013_REG_INT_CTRL1_BIT_IEA BIT(4) 129 #define KXCJK1013_REG_INT_CTRL1_BIT_IEN BIT(5) 130 131 #define KXTF9_REG_TILT_BIT_LEFT_EDGE BIT(5) 132 #define KXTF9_REG_TILT_BIT_RIGHT_EDGE BIT(4) 133 #define KXTF9_REG_TILT_BIT_LOWER_EDGE BIT(3) 134 #define KXTF9_REG_TILT_BIT_UPPER_EDGE BIT(2) 135 #define KXTF9_REG_TILT_BIT_FACE_DOWN BIT(1) 136 #define KXTF9_REG_TILT_BIT_FACE_UP BIT(0) 137 138 #define KXCJK1013_DATA_MASK_12_BIT 0x0FFF 139 #define KXCJK1013_MAX_STARTUP_TIME_US 100000 140 141 #define KXCJK1013_SLEEP_DELAY_MS 2000 142 143 #define KXCJK1013_REG_INT_SRC1_BIT_TPS BIT(0) /* KXTF9 */ 144 #define KXCJK1013_REG_INT_SRC1_BIT_WUFS BIT(1) 145 #define KXCJK1013_REG_INT_SRC1_MASK_TDTS (BIT(2) | BIT(3)) /* KXTF9 */ 146 #define KXCJK1013_REG_INT_SRC1_TAP_NONE 0 147 #define KXCJK1013_REG_INT_SRC1_TAP_SINGLE BIT(2) 148 #define KXCJK1013_REG_INT_SRC1_TAP_DOUBLE BIT(3) 149 #define KXCJK1013_REG_INT_SRC1_BIT_DRDY BIT(4) 150 151 /* KXCJK: INT_SOURCE2: motion detect, KXTF9: INT_SRC_REG1: tap detect */ 152 #define KXCJK1013_REG_INT_SRC2_BIT_ZP BIT(0) 153 #define KXCJK1013_REG_INT_SRC2_BIT_ZN BIT(1) 154 #define KXCJK1013_REG_INT_SRC2_BIT_YP BIT(2) 155 #define KXCJK1013_REG_INT_SRC2_BIT_YN BIT(3) 156 #define KXCJK1013_REG_INT_SRC2_BIT_XP BIT(4) 157 #define KXCJK1013_REG_INT_SRC2_BIT_XN BIT(5) 158 159 /* KX023 interrupt routing to INT1. INT2 can be configured with INC6 */ 160 #define KX023_REG_INC4_BFI1 BIT(6) 161 #define KX023_REG_INC4_WMI1 BIT(5) 162 #define KX023_REG_INC4_DRDY1 BIT(4) 163 #define KX023_REG_INC4_TDTI1 BIT(2) 164 #define KX023_REG_INC4_WUFI1 BIT(1) 165 #define KX023_REG_INC4_TPI1 BIT(0) 166 167 #define KXCJK1013_DEFAULT_WAKE_THRES 1 168 169 /* Refer to section 4 of the specification */ 170 struct kx_odr_start_up_time { 171 int odr_bits; 172 int usec; 173 }; 174 175 /* KXCJK-1013 */ 176 static const struct kx_odr_start_up_time kxcjk1013_odr_start_up_times[] = { 177 { 0x08, 100000 }, 178 { 0x09, 100000 }, 179 { 0x0A, 100000 }, 180 { 0x0B, 100000 }, 181 { 0x00, 80000 }, 182 { 0x01, 41000 }, 183 { 0x02, 21000 }, 184 { 0x03, 11000 }, 185 { 0x04, 6400 }, 186 { 0x05, 3900 }, 187 { 0x06, 2700 }, 188 { 0x07, 2100 }, 189 { } 190 }; 191 192 /* KXCTJ2-1009 */ 193 static const struct kx_odr_start_up_time kxtj21009_odr_start_up_times[] = { 194 { 0x08, 1240000 }, 195 { 0x09, 621000 }, 196 { 0x0A, 309000 }, 197 { 0x0B, 151000 }, 198 { 0x00, 80000 }, 199 { 0x01, 41000 }, 200 { 0x02, 21000 }, 201 { 0x03, 11000 }, 202 { 0x04, 6000 }, 203 { 0x05, 4000 }, 204 { 0x06, 3000 }, 205 { 0x07, 2000 }, 206 { } 207 }; 208 209 /* KXTF9 */ 210 static const struct kx_odr_start_up_time kxtf9_odr_start_up_times[] = { 211 { 0x01, 81000 }, 212 { 0x02, 41000 }, 213 { 0x03, 21000 }, 214 { 0x04, 11000 }, 215 { 0x05, 5100 }, 216 { 0x06, 2700 }, 217 { } 218 }; 219 220 /* KX023-1025 */ 221 static const struct kx_odr_start_up_time kx0231025_odr_start_up_times[] = { 222 /* First 4 are not in datasheet, taken from KXCTJ2-1009 */ 223 { 0x08, 1240000 }, 224 { 0x09, 621000 }, 225 { 0x0A, 309000 }, 226 { 0x0B, 151000 }, 227 { 0x00, 81000 }, 228 { 0x01, 40000 }, 229 { 0x02, 22000 }, 230 { 0x03, 12000 }, 231 { 0x04, 7000 }, 232 { 0x05, 4400 }, 233 { 0x06, 3000 }, 234 { 0x07, 3000 }, 235 { } 236 }; 237 238 enum kx_acpi_type { 239 ACPI_GENERIC, 240 ACPI_SMO8500, 241 ACPI_KIOX010A, 242 }; 243 244 struct kx_chipset_regs { 245 u8 int_src1; 246 u8 int_src2; 247 u8 int_rel; 248 u8 ctrl1; 249 u8 wuf_ctrl; 250 u8 int_ctrl1; 251 u8 data_ctrl; 252 u8 wake_timer; 253 u8 wake_thres; 254 }; 255 256 static const struct kx_chipset_regs kxcjk1013_regs = { 257 .int_src1 = KXCJK1013_REG_INT_SRC1, 258 .int_src2 = KXCJK1013_REG_INT_SRC2, 259 .int_rel = KXCJK1013_REG_INT_REL, 260 .ctrl1 = KXCJK1013_REG_CTRL1, 261 .wuf_ctrl = KXCJK1013_REG_CTRL2, 262 .int_ctrl1 = KXCJK1013_REG_INT_CTRL1, 263 .data_ctrl = KXCJK1013_REG_DATA_CTRL, 264 .wake_timer = KXCJK1013_REG_WAKE_TIMER, 265 .wake_thres = KXCJK1013_REG_WAKE_THRES, 266 }; 267 268 static const struct kx_chipset_regs kxtf9_regs = { 269 /* .int_src1 was moved to INT_SRC2 on KXTF9 */ 270 .int_src1 = KXTF9_REG_INT_SRC2, 271 /* .int_src2 is not available */ 272 .int_rel = KXCJK1013_REG_INT_REL, 273 .ctrl1 = KXCJK1013_REG_CTRL1, 274 .wuf_ctrl = KXTF9_REG_CTRL3, 275 .int_ctrl1 = KXCJK1013_REG_INT_CTRL1, 276 .data_ctrl = KXCJK1013_REG_DATA_CTRL, 277 .wake_timer = KXCJK1013_REG_WAKE_TIMER, 278 .wake_thres = KXTF9_REG_WAKE_THRESH, 279 }; 280 281 /* The registers have totally different names but the bits are compatible */ 282 static const struct kx_chipset_regs kx0231025_regs = { 283 .int_src1 = KX023_REG_INS2, 284 .int_src2 = KX023_REG_INS3, 285 .int_rel = KX023_REG_INT_REL, 286 .ctrl1 = KX023_REG_CNTL1, 287 .wuf_ctrl = KX023_REG_CNTL3, 288 .int_ctrl1 = KX023_REG_INC1, 289 .data_ctrl = KX023_REG_ODCNTL, 290 .wake_timer = KX023_REG_WUFC, 291 .wake_thres = KX023_REG_ATH, 292 }; 293 294 struct kx_chipset_info { 295 const struct kx_chipset_regs *regs; 296 const struct kx_odr_start_up_time *times; 297 enum kx_acpi_type acpi_type; 298 }; 299 300 static const struct kx_chipset_info kxcjk1013_info = { 301 .regs = &kxcjk1013_regs, 302 .times = pm_ptr(kxcjk1013_odr_start_up_times), 303 }; 304 305 static const struct kx_chipset_info kxcj91008_info = { 306 .regs = &kxcjk1013_regs, 307 .times = pm_ptr(kxcjk1013_odr_start_up_times), 308 }; 309 310 static const struct kx_chipset_info kxcj91008_kiox010a_info = { 311 .regs = &kxcjk1013_regs, 312 .times = pm_ptr(kxcjk1013_odr_start_up_times), 313 .acpi_type = ACPI_KIOX010A, 314 }; 315 316 static const struct kx_chipset_info kxcj91008_kiox020a_info = { 317 .regs = &kxcjk1013_regs, 318 .times = pm_ptr(kxcjk1013_odr_start_up_times), 319 .acpi_type = ACPI_GENERIC, 320 }; 321 322 static const struct kx_chipset_info kxcj91008_smo8500_info = { 323 .regs = &kxcjk1013_regs, 324 .times = pm_ptr(kxcjk1013_odr_start_up_times), 325 .acpi_type = ACPI_SMO8500, 326 }; 327 328 static const struct kx_chipset_info kxtj21009_info = { 329 .regs = &kxcjk1013_regs, 330 .times = pm_ptr(kxtj21009_odr_start_up_times), 331 }; 332 333 static const struct kx_chipset_info kxtf9_info = { 334 .regs = &kxtf9_regs, 335 .times = pm_ptr(kxtf9_odr_start_up_times), 336 }; 337 338 static const struct kx_chipset_info kx0231025_info = { 339 .regs = &kx0231025_regs, 340 .times = pm_ptr(kx0231025_odr_start_up_times), 341 }; 342 343 enum kxcjk1013_axis { 344 AXIS_X, 345 AXIS_Y, 346 AXIS_Z, 347 AXIS_MAX 348 }; 349 350 struct kxcjk1013_data { 351 struct i2c_client *client; 352 struct iio_trigger *dready_trig; 353 struct iio_trigger *motion_trig; 354 struct iio_mount_matrix orientation; 355 struct mutex mutex; 356 /* Ensure timestamp naturally aligned */ 357 struct { 358 s16 chans[AXIS_MAX]; 359 aligned_s64 timestamp; 360 } scan; 361 u8 odr_bits; 362 u8 range; 363 int wake_thres; 364 int wake_dur; 365 bool active_high_intr; 366 bool dready_trigger_on; 367 int ev_enable_state; 368 bool motion_trigger_on; 369 int64_t timestamp; 370 const struct kx_chipset_info *info; 371 }; 372 373 enum kxcjk1013_mode { 374 STANDBY, 375 OPERATION, 376 }; 377 378 enum kxcjk1013_range { 379 KXCJK1013_RANGE_2G, 380 KXCJK1013_RANGE_4G, 381 KXCJK1013_RANGE_8G, 382 }; 383 384 struct kx_odr_map { 385 int val; 386 int val2; 387 int odr_bits; 388 int wuf_bits; 389 }; 390 391 static const struct kx_odr_map samp_freq_table[] = { 392 { 0, 781000, 0x08, 0x00 }, 393 { 1, 563000, 0x09, 0x01 }, 394 { 3, 125000, 0x0A, 0x02 }, 395 { 6, 250000, 0x0B, 0x03 }, 396 { 12, 500000, 0x00, 0x04 }, 397 { 25, 0, 0x01, 0x05 }, 398 { 50, 0, 0x02, 0x06 }, 399 { 100, 0, 0x03, 0x06 }, 400 { 200, 0, 0x04, 0x06 }, 401 { 400, 0, 0x05, 0x06 }, 402 { 800, 0, 0x06, 0x06 }, 403 { 1600, 0, 0x07, 0x06 }, 404 }; 405 406 static const char *const kxcjk1013_samp_freq_avail = 407 "0.781000 1.563000 3.125000 6.250000 12.500000 25 50 100 200 400 800 1600"; 408 409 static const struct kx_odr_map kxtf9_samp_freq_table[] = { 410 { 25, 0, 0x01, 0x00 }, 411 { 50, 0, 0x02, 0x01 }, 412 { 100, 0, 0x03, 0x01 }, 413 { 200, 0, 0x04, 0x01 }, 414 { 400, 0, 0x05, 0x01 }, 415 { 800, 0, 0x06, 0x01 }, 416 }; 417 418 static const char *const kxtf9_samp_freq_avail = 419 "25 50 100 200 400 800"; 420 421 static const struct { 422 u16 scale; 423 u8 gsel_0; 424 u8 gsel_1; 425 } KXCJK1013_scale_table[] = { {9582, 0, 0}, 426 {19163, 1, 0}, 427 {38326, 0, 1} }; 428 429 #ifdef CONFIG_ACPI 430 enum kiox010a_fn_index { 431 KIOX010A_SET_LAPTOP_MODE = 1, 432 KIOX010A_SET_TABLET_MODE = 2, 433 }; 434 435 static int kiox010a_dsm(struct device *dev, int fn_index) 436 { 437 acpi_handle handle = ACPI_HANDLE(dev); 438 guid_t kiox010a_dsm_guid; 439 union acpi_object *obj; 440 441 if (!handle) 442 return -ENODEV; 443 444 guid_parse("1f339696-d475-4e26-8cad-2e9f8e6d7a91", &kiox010a_dsm_guid); 445 446 obj = acpi_evaluate_dsm(handle, &kiox010a_dsm_guid, 1, fn_index, NULL); 447 if (!obj) 448 return -EIO; 449 450 ACPI_FREE(obj); 451 return 0; 452 } 453 454 #endif 455 456 static int kxcjk1013_set_mode(struct kxcjk1013_data *data, 457 enum kxcjk1013_mode mode) 458 { 459 const struct kx_chipset_regs *regs = data->info->regs; 460 int ret; 461 462 ret = i2c_smbus_read_byte_data(data->client, regs->ctrl1); 463 if (ret < 0) { 464 dev_err(&data->client->dev, "Error reading reg_ctrl1\n"); 465 return ret; 466 } 467 468 if (mode == STANDBY) 469 ret &= ~KXCJK1013_REG_CTRL1_BIT_PC1; 470 else 471 ret |= KXCJK1013_REG_CTRL1_BIT_PC1; 472 473 ret = i2c_smbus_write_byte_data(data->client, regs->ctrl1, ret); 474 if (ret < 0) { 475 dev_err(&data->client->dev, "Error writing reg_ctrl1\n"); 476 return ret; 477 } 478 479 return 0; 480 } 481 482 static int kxcjk1013_get_mode(struct kxcjk1013_data *data, 483 enum kxcjk1013_mode *mode) 484 { 485 const struct kx_chipset_regs *regs = data->info->regs; 486 int ret; 487 488 ret = i2c_smbus_read_byte_data(data->client, regs->ctrl1); 489 if (ret < 0) { 490 dev_err(&data->client->dev, "Error reading reg_ctrl1\n"); 491 return ret; 492 } 493 494 if (ret & KXCJK1013_REG_CTRL1_BIT_PC1) 495 *mode = OPERATION; 496 else 497 *mode = STANDBY; 498 499 return 0; 500 } 501 502 static int kxcjk1013_set_range(struct kxcjk1013_data *data, int range_index) 503 { 504 const struct kx_chipset_regs *regs = data->info->regs; 505 int ret; 506 507 ret = i2c_smbus_read_byte_data(data->client, regs->ctrl1); 508 if (ret < 0) { 509 dev_err(&data->client->dev, "Error reading reg_ctrl1\n"); 510 return ret; 511 } 512 513 ret &= ~(KXCJK1013_REG_CTRL1_BIT_GSEL0 | 514 KXCJK1013_REG_CTRL1_BIT_GSEL1); 515 ret |= (KXCJK1013_scale_table[range_index].gsel_0 << 3); 516 ret |= (KXCJK1013_scale_table[range_index].gsel_1 << 4); 517 518 ret = i2c_smbus_write_byte_data(data->client, regs->ctrl1, ret); 519 if (ret < 0) { 520 dev_err(&data->client->dev, "Error writing reg_ctrl1\n"); 521 return ret; 522 } 523 524 data->range = range_index; 525 526 return 0; 527 } 528 529 static int kxcjk1013_chip_init(struct kxcjk1013_data *data) 530 { 531 const struct kx_chipset_regs *regs = data->info->regs; 532 int ret; 533 534 #ifdef CONFIG_ACPI 535 if (data->info->acpi_type == ACPI_KIOX010A) { 536 /* Make sure the kbd and touchpad on 2-in-1s using 2 KXCJ91008-s work */ 537 kiox010a_dsm(&data->client->dev, KIOX010A_SET_LAPTOP_MODE); 538 } 539 #endif 540 541 ret = i2c_smbus_read_byte_data(data->client, KXCJK1013_REG_WHO_AM_I); 542 if (ret < 0) { 543 dev_err(&data->client->dev, "Error reading who_am_i\n"); 544 return ret; 545 } 546 547 dev_dbg(&data->client->dev, "KXCJK1013 Chip Id %x\n", ret); 548 549 ret = kxcjk1013_set_mode(data, STANDBY); 550 if (ret < 0) 551 return ret; 552 553 ret = i2c_smbus_read_byte_data(data->client, regs->ctrl1); 554 if (ret < 0) { 555 dev_err(&data->client->dev, "Error reading reg_ctrl1\n"); 556 return ret; 557 } 558 559 /* Set 12 bit mode */ 560 ret |= KXCJK1013_REG_CTRL1_BIT_RES; 561 562 ret = i2c_smbus_write_byte_data(data->client, regs->ctrl1, ret); 563 if (ret < 0) { 564 dev_err(&data->client->dev, "Error reading reg_ctrl\n"); 565 return ret; 566 } 567 568 /* Setting range to 4G */ 569 ret = kxcjk1013_set_range(data, KXCJK1013_RANGE_4G); 570 if (ret < 0) 571 return ret; 572 573 ret = i2c_smbus_read_byte_data(data->client, regs->data_ctrl); 574 if (ret < 0) { 575 dev_err(&data->client->dev, "Error reading reg_data_ctrl\n"); 576 return ret; 577 } 578 579 data->odr_bits = ret; 580 581 /* Set up INT polarity */ 582 ret = i2c_smbus_read_byte_data(data->client, regs->int_ctrl1); 583 if (ret < 0) { 584 dev_err(&data->client->dev, "Error reading reg_int_ctrl1\n"); 585 return ret; 586 } 587 588 if (data->active_high_intr) 589 ret |= KXCJK1013_REG_INT_CTRL1_BIT_IEA; 590 else 591 ret &= ~KXCJK1013_REG_INT_CTRL1_BIT_IEA; 592 593 ret = i2c_smbus_write_byte_data(data->client, regs->int_ctrl1, ret); 594 if (ret < 0) { 595 dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n"); 596 return ret; 597 } 598 599 /* On KX023, route all used interrupts to INT1 for now */ 600 if (data->info == &kx0231025_info && data->client->irq > 0) { 601 ret = i2c_smbus_write_byte_data(data->client, KX023_REG_INC4, 602 KX023_REG_INC4_DRDY1 | 603 KX023_REG_INC4_WUFI1); 604 if (ret < 0) { 605 dev_err(&data->client->dev, "Error writing reg_inc4\n"); 606 return ret; 607 } 608 } 609 610 ret = kxcjk1013_set_mode(data, OPERATION); 611 if (ret < 0) 612 return ret; 613 614 data->wake_thres = KXCJK1013_DEFAULT_WAKE_THRES; 615 616 return 0; 617 } 618 619 static int kxcjk1013_get_startup_times(struct kxcjk1013_data *data) 620 { 621 const struct kx_odr_start_up_time *times; 622 623 for (times = data->info->times; times->usec; times++) { 624 if (times->odr_bits == data->odr_bits) 625 return times->usec; 626 } 627 628 return KXCJK1013_MAX_STARTUP_TIME_US; 629 } 630 631 static int kxcjk1013_set_power_state(struct kxcjk1013_data *data, bool on) 632 { 633 #ifdef CONFIG_PM 634 int ret; 635 636 if (on) 637 ret = pm_runtime_resume_and_get(&data->client->dev); 638 else 639 ret = pm_runtime_put_autosuspend(&data->client->dev); 640 if (ret < 0) { 641 dev_err(&data->client->dev, 642 "Failed: %s for %d\n", __func__, on); 643 return ret; 644 } 645 #endif 646 647 return 0; 648 } 649 650 static int kxcjk1013_chip_update_thresholds(struct kxcjk1013_data *data) 651 { 652 const struct kx_chipset_regs *regs = data->info->regs; 653 int ret; 654 655 ret = i2c_smbus_write_byte_data(data->client, regs->wake_timer, data->wake_dur); 656 if (ret < 0) { 657 dev_err(&data->client->dev, 658 "Error writing reg_wake_timer\n"); 659 return ret; 660 } 661 662 ret = i2c_smbus_write_byte_data(data->client, regs->wake_thres, data->wake_thres); 663 if (ret < 0) { 664 dev_err(&data->client->dev, "Error writing reg_wake_thres\n"); 665 return ret; 666 } 667 668 return 0; 669 } 670 671 static int kxcjk1013_setup_interrupt(struct kxcjk1013_data *data, 672 bool status, bool is_new_data) 673 { 674 const struct kx_chipset_regs *regs = data->info->regs; 675 int ret; 676 enum kxcjk1013_mode store_mode; 677 678 ret = kxcjk1013_get_mode(data, &store_mode); 679 if (ret < 0) 680 return ret; 681 682 /* This is requirement by spec to change state to STANDBY */ 683 ret = kxcjk1013_set_mode(data, STANDBY); 684 if (ret < 0) 685 return ret; 686 687 if (is_new_data == true) { 688 ret = kxcjk1013_chip_update_thresholds(data); 689 if (ret < 0) 690 return ret; 691 } 692 693 ret = i2c_smbus_read_byte_data(data->client, regs->int_ctrl1); 694 if (ret < 0) { 695 dev_err(&data->client->dev, "Error reading reg_int_ctrl1\n"); 696 return ret; 697 } 698 699 if (status) 700 ret |= KXCJK1013_REG_INT_CTRL1_BIT_IEN; 701 else 702 ret &= ~KXCJK1013_REG_INT_CTRL1_BIT_IEN; 703 704 ret = i2c_smbus_write_byte_data(data->client, regs->int_ctrl1, ret); 705 if (ret < 0) { 706 dev_err(&data->client->dev, "Error writing reg_int_ctrl1\n"); 707 return ret; 708 } 709 710 ret = i2c_smbus_read_byte_data(data->client, regs->ctrl1); 711 if (ret < 0) { 712 dev_err(&data->client->dev, "Error reading reg_ctrl1\n"); 713 return ret; 714 } 715 716 if (is_new_data) { 717 if (status) 718 ret |= KXCJK1013_REG_CTRL1_BIT_DRDY; 719 else 720 ret &= ~KXCJK1013_REG_CTRL1_BIT_DRDY; 721 } else { 722 if (status) 723 ret |= KXCJK1013_REG_CTRL1_BIT_WUFE; 724 else 725 ret &= ~KXCJK1013_REG_CTRL1_BIT_WUFE; 726 } 727 728 ret = i2c_smbus_write_byte_data(data->client, regs->ctrl1, ret); 729 if (ret < 0) { 730 dev_err(&data->client->dev, "Error writing reg_ctrl1\n"); 731 return ret; 732 } 733 734 if (store_mode == OPERATION) { 735 ret = kxcjk1013_set_mode(data, OPERATION); 736 if (ret < 0) 737 return ret; 738 } 739 740 return 0; 741 } 742 743 static const struct kx_odr_map *kxcjk1013_find_odr_value( 744 const struct kx_odr_map *map, size_t map_size, int val, int val2) 745 { 746 int i; 747 748 for (i = 0; i < map_size; ++i) { 749 if (map[i].val == val && map[i].val2 == val2) 750 return &map[i]; 751 } 752 753 return ERR_PTR(-EINVAL); 754 } 755 756 static int kxcjk1013_convert_odr_value(const struct kx_odr_map *map, 757 size_t map_size, int odr_bits, 758 int *val, int *val2) 759 { 760 int i; 761 762 for (i = 0; i < map_size; ++i) { 763 if (map[i].odr_bits == odr_bits) { 764 *val = map[i].val; 765 *val2 = map[i].val2; 766 return IIO_VAL_INT_PLUS_MICRO; 767 } 768 } 769 770 return -EINVAL; 771 } 772 773 static int kxcjk1013_set_odr(struct kxcjk1013_data *data, int val, int val2) 774 { 775 const struct kx_chipset_regs *regs = data->info->regs; 776 int ret; 777 enum kxcjk1013_mode store_mode; 778 const struct kx_odr_map *odr_setting; 779 780 ret = kxcjk1013_get_mode(data, &store_mode); 781 if (ret < 0) 782 return ret; 783 784 if (data->info == &kxtf9_info) 785 odr_setting = kxcjk1013_find_odr_value(kxtf9_samp_freq_table, 786 ARRAY_SIZE(kxtf9_samp_freq_table), 787 val, val2); 788 else 789 odr_setting = kxcjk1013_find_odr_value(samp_freq_table, 790 ARRAY_SIZE(samp_freq_table), 791 val, val2); 792 793 if (IS_ERR(odr_setting)) 794 return PTR_ERR(odr_setting); 795 796 /* To change ODR, the chip must be set to STANDBY as per spec */ 797 ret = kxcjk1013_set_mode(data, STANDBY); 798 if (ret < 0) 799 return ret; 800 801 ret = i2c_smbus_write_byte_data(data->client, regs->data_ctrl, 802 odr_setting->odr_bits); 803 if (ret < 0) { 804 dev_err(&data->client->dev, "Error writing data_ctrl\n"); 805 return ret; 806 } 807 808 data->odr_bits = odr_setting->odr_bits; 809 810 ret = i2c_smbus_write_byte_data(data->client, regs->wuf_ctrl, 811 odr_setting->wuf_bits); 812 if (ret < 0) { 813 dev_err(&data->client->dev, "Error writing reg_ctrl2\n"); 814 return ret; 815 } 816 817 if (store_mode == OPERATION) { 818 ret = kxcjk1013_set_mode(data, OPERATION); 819 if (ret < 0) 820 return ret; 821 } 822 823 return 0; 824 } 825 826 static int kxcjk1013_get_odr(struct kxcjk1013_data *data, int *val, int *val2) 827 { 828 if (data->info == &kxtf9_info) 829 return kxcjk1013_convert_odr_value(kxtf9_samp_freq_table, 830 ARRAY_SIZE(kxtf9_samp_freq_table), 831 data->odr_bits, val, val2); 832 else 833 return kxcjk1013_convert_odr_value(samp_freq_table, 834 ARRAY_SIZE(samp_freq_table), 835 data->odr_bits, val, val2); 836 } 837 838 static int kxcjk1013_get_acc_reg(struct kxcjk1013_data *data, int axis) 839 { 840 u8 reg = KXCJK1013_REG_XOUT_L + axis * 2; 841 int ret; 842 843 ret = i2c_smbus_read_word_data(data->client, reg); 844 if (ret < 0) { 845 dev_err(&data->client->dev, 846 "failed to read accel_%c registers\n", 'x' + axis); 847 return ret; 848 } 849 850 return ret; 851 } 852 853 static int kxcjk1013_set_scale(struct kxcjk1013_data *data, int val) 854 { 855 int ret, i; 856 enum kxcjk1013_mode store_mode; 857 858 for (i = 0; i < ARRAY_SIZE(KXCJK1013_scale_table); ++i) { 859 if (KXCJK1013_scale_table[i].scale == val) { 860 ret = kxcjk1013_get_mode(data, &store_mode); 861 if (ret < 0) 862 return ret; 863 864 ret = kxcjk1013_set_mode(data, STANDBY); 865 if (ret < 0) 866 return ret; 867 868 ret = kxcjk1013_set_range(data, i); 869 if (ret < 0) 870 return ret; 871 872 if (store_mode == OPERATION) { 873 ret = kxcjk1013_set_mode(data, OPERATION); 874 if (ret) 875 return ret; 876 } 877 878 return 0; 879 } 880 } 881 882 return -EINVAL; 883 } 884 885 static int kxcjk1013_read_raw(struct iio_dev *indio_dev, 886 struct iio_chan_spec const *chan, int *val, 887 int *val2, long mask) 888 { 889 struct kxcjk1013_data *data = iio_priv(indio_dev); 890 int ret; 891 892 switch (mask) { 893 case IIO_CHAN_INFO_RAW: 894 mutex_lock(&data->mutex); 895 if (iio_buffer_enabled(indio_dev)) 896 ret = -EBUSY; 897 else { 898 ret = kxcjk1013_set_power_state(data, true); 899 if (ret < 0) { 900 mutex_unlock(&data->mutex); 901 return ret; 902 } 903 ret = kxcjk1013_get_acc_reg(data, chan->scan_index); 904 if (ret < 0) { 905 kxcjk1013_set_power_state(data, false); 906 mutex_unlock(&data->mutex); 907 return ret; 908 } 909 *val = sign_extend32(ret >> chan->scan_type.shift, 910 chan->scan_type.realbits - 1); 911 ret = kxcjk1013_set_power_state(data, false); 912 } 913 mutex_unlock(&data->mutex); 914 915 if (ret < 0) 916 return ret; 917 918 return IIO_VAL_INT; 919 920 case IIO_CHAN_INFO_SCALE: 921 *val = 0; 922 *val2 = KXCJK1013_scale_table[data->range].scale; 923 return IIO_VAL_INT_PLUS_MICRO; 924 925 case IIO_CHAN_INFO_SAMP_FREQ: 926 mutex_lock(&data->mutex); 927 ret = kxcjk1013_get_odr(data, val, val2); 928 mutex_unlock(&data->mutex); 929 return ret; 930 931 default: 932 return -EINVAL; 933 } 934 } 935 936 static int kxcjk1013_write_raw(struct iio_dev *indio_dev, 937 struct iio_chan_spec const *chan, int val, 938 int val2, long mask) 939 { 940 struct kxcjk1013_data *data = iio_priv(indio_dev); 941 int ret; 942 943 switch (mask) { 944 case IIO_CHAN_INFO_SAMP_FREQ: 945 mutex_lock(&data->mutex); 946 ret = kxcjk1013_set_odr(data, val, val2); 947 mutex_unlock(&data->mutex); 948 break; 949 case IIO_CHAN_INFO_SCALE: 950 if (val) 951 return -EINVAL; 952 953 mutex_lock(&data->mutex); 954 ret = kxcjk1013_set_scale(data, val2); 955 mutex_unlock(&data->mutex); 956 break; 957 default: 958 ret = -EINVAL; 959 } 960 961 return ret; 962 } 963 964 static int kxcjk1013_read_event(struct iio_dev *indio_dev, 965 const struct iio_chan_spec *chan, 966 enum iio_event_type type, 967 enum iio_event_direction dir, 968 enum iio_event_info info, 969 int *val, int *val2) 970 { 971 struct kxcjk1013_data *data = iio_priv(indio_dev); 972 973 *val2 = 0; 974 switch (info) { 975 case IIO_EV_INFO_VALUE: 976 *val = data->wake_thres; 977 break; 978 case IIO_EV_INFO_PERIOD: 979 *val = data->wake_dur; 980 break; 981 default: 982 return -EINVAL; 983 } 984 985 return IIO_VAL_INT; 986 } 987 988 static int kxcjk1013_write_event(struct iio_dev *indio_dev, 989 const struct iio_chan_spec *chan, 990 enum iio_event_type type, 991 enum iio_event_direction dir, 992 enum iio_event_info info, 993 int val, int val2) 994 { 995 struct kxcjk1013_data *data = iio_priv(indio_dev); 996 997 if (data->ev_enable_state) 998 return -EBUSY; 999 1000 switch (info) { 1001 case IIO_EV_INFO_VALUE: 1002 data->wake_thres = val; 1003 break; 1004 case IIO_EV_INFO_PERIOD: 1005 data->wake_dur = val; 1006 break; 1007 default: 1008 return -EINVAL; 1009 } 1010 1011 return 0; 1012 } 1013 1014 static int kxcjk1013_read_event_config(struct iio_dev *indio_dev, 1015 const struct iio_chan_spec *chan, 1016 enum iio_event_type type, 1017 enum iio_event_direction dir) 1018 { 1019 struct kxcjk1013_data *data = iio_priv(indio_dev); 1020 1021 return data->ev_enable_state; 1022 } 1023 1024 static int kxcjk1013_write_event_config(struct iio_dev *indio_dev, 1025 const struct iio_chan_spec *chan, 1026 enum iio_event_type type, 1027 enum iio_event_direction dir, 1028 bool state) 1029 { 1030 struct kxcjk1013_data *data = iio_priv(indio_dev); 1031 int ret; 1032 1033 if (state == data->ev_enable_state) 1034 return 0; 1035 1036 mutex_lock(&data->mutex); 1037 1038 if (!state && data->motion_trigger_on) { 1039 data->ev_enable_state = 0; 1040 mutex_unlock(&data->mutex); 1041 return 0; 1042 } 1043 1044 /* 1045 * We will expect the enable and disable to do operation in 1046 * reverse order. This will happen here anyway as our 1047 * resume operation uses sync mode runtime pm calls, the 1048 * suspend operation will be delayed by autosuspend delay 1049 * So the disable operation will still happen in reverse of 1050 * enable operation. When runtime pm is disabled the mode 1051 * is always on so sequence doesn't matter 1052 */ 1053 ret = kxcjk1013_set_power_state(data, state); 1054 if (ret < 0) { 1055 mutex_unlock(&data->mutex); 1056 return ret; 1057 } 1058 1059 ret = kxcjk1013_setup_interrupt(data, state, false); 1060 if (ret < 0) { 1061 kxcjk1013_set_power_state(data, false); 1062 data->ev_enable_state = 0; 1063 mutex_unlock(&data->mutex); 1064 return ret; 1065 } 1066 1067 data->ev_enable_state = state; 1068 mutex_unlock(&data->mutex); 1069 1070 return 0; 1071 } 1072 1073 static int kxcjk1013_buffer_preenable(struct iio_dev *indio_dev) 1074 { 1075 struct kxcjk1013_data *data = iio_priv(indio_dev); 1076 1077 return kxcjk1013_set_power_state(data, true); 1078 } 1079 1080 static int kxcjk1013_buffer_postdisable(struct iio_dev *indio_dev) 1081 { 1082 struct kxcjk1013_data *data = iio_priv(indio_dev); 1083 1084 return kxcjk1013_set_power_state(data, false); 1085 } 1086 1087 static ssize_t kxcjk1013_get_samp_freq_avail(struct device *dev, 1088 struct device_attribute *attr, 1089 char *buf) 1090 { 1091 struct iio_dev *indio_dev = dev_to_iio_dev(dev); 1092 struct kxcjk1013_data *data = iio_priv(indio_dev); 1093 const char *str; 1094 1095 if (data->info == &kxtf9_info) 1096 str = kxtf9_samp_freq_avail; 1097 else 1098 str = kxcjk1013_samp_freq_avail; 1099 1100 return sprintf(buf, "%s\n", str); 1101 } 1102 1103 static IIO_DEVICE_ATTR(in_accel_sampling_frequency_available, S_IRUGO, 1104 kxcjk1013_get_samp_freq_avail, NULL, 0); 1105 1106 static IIO_CONST_ATTR(in_accel_scale_available, "0.009582 0.019163 0.038326"); 1107 1108 static struct attribute *kxcjk1013_attributes[] = { 1109 &iio_dev_attr_in_accel_sampling_frequency_available.dev_attr.attr, 1110 &iio_const_attr_in_accel_scale_available.dev_attr.attr, 1111 NULL, 1112 }; 1113 1114 static const struct attribute_group kxcjk1013_attrs_group = { 1115 .attrs = kxcjk1013_attributes, 1116 }; 1117 1118 static const struct iio_event_spec kxcjk1013_event = { 1119 .type = IIO_EV_TYPE_THRESH, 1120 .dir = IIO_EV_DIR_EITHER, 1121 .mask_separate = BIT(IIO_EV_INFO_VALUE) | 1122 BIT(IIO_EV_INFO_ENABLE) | 1123 BIT(IIO_EV_INFO_PERIOD) 1124 }; 1125 1126 static const struct iio_mount_matrix * 1127 kxcjk1013_get_mount_matrix(const struct iio_dev *indio_dev, 1128 const struct iio_chan_spec *chan) 1129 { 1130 struct kxcjk1013_data *data = iio_priv(indio_dev); 1131 1132 return &data->orientation; 1133 } 1134 1135 static const struct iio_chan_spec_ext_info kxcjk1013_ext_info[] = { 1136 IIO_MOUNT_MATRIX(IIO_SHARED_BY_TYPE, kxcjk1013_get_mount_matrix), 1137 { } 1138 }; 1139 1140 #define KXCJK1013_CHANNEL(_axis) { \ 1141 .type = IIO_ACCEL, \ 1142 .modified = 1, \ 1143 .channel2 = IIO_MOD_##_axis, \ 1144 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ 1145 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \ 1146 BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 1147 .scan_index = AXIS_##_axis, \ 1148 .scan_type = { \ 1149 .sign = 's', \ 1150 .realbits = 12, \ 1151 .storagebits = 16, \ 1152 .shift = 4, \ 1153 .endianness = IIO_LE, \ 1154 }, \ 1155 .event_spec = &kxcjk1013_event, \ 1156 .ext_info = kxcjk1013_ext_info, \ 1157 .num_event_specs = 1 \ 1158 } 1159 1160 static const struct iio_chan_spec kxcjk1013_channels[] = { 1161 KXCJK1013_CHANNEL(X), 1162 KXCJK1013_CHANNEL(Y), 1163 KXCJK1013_CHANNEL(Z), 1164 IIO_CHAN_SOFT_TIMESTAMP(3), 1165 }; 1166 1167 static const struct iio_buffer_setup_ops kxcjk1013_buffer_setup_ops = { 1168 .preenable = kxcjk1013_buffer_preenable, 1169 .postdisable = kxcjk1013_buffer_postdisable, 1170 }; 1171 1172 static const struct iio_info kxcjk1013_iio_info = { 1173 .attrs = &kxcjk1013_attrs_group, 1174 .read_raw = kxcjk1013_read_raw, 1175 .write_raw = kxcjk1013_write_raw, 1176 .read_event_value = kxcjk1013_read_event, 1177 .write_event_value = kxcjk1013_write_event, 1178 .write_event_config = kxcjk1013_write_event_config, 1179 .read_event_config = kxcjk1013_read_event_config, 1180 }; 1181 1182 static const unsigned long kxcjk1013_scan_masks[] = {0x7, 0}; 1183 1184 static irqreturn_t kxcjk1013_trigger_handler(int irq, void *p) 1185 { 1186 struct iio_poll_func *pf = p; 1187 struct iio_dev *indio_dev = pf->indio_dev; 1188 struct kxcjk1013_data *data = iio_priv(indio_dev); 1189 int ret; 1190 1191 mutex_lock(&data->mutex); 1192 ret = i2c_smbus_read_i2c_block_data_or_emulated(data->client, 1193 KXCJK1013_REG_XOUT_L, 1194 AXIS_MAX * 2, 1195 (u8 *)data->scan.chans); 1196 mutex_unlock(&data->mutex); 1197 if (ret < 0) 1198 goto err; 1199 1200 iio_push_to_buffers_with_ts(indio_dev, &data->scan, sizeof(data->scan), 1201 data->timestamp); 1202 err: 1203 iio_trigger_notify_done(indio_dev->trig); 1204 1205 return IRQ_HANDLED; 1206 } 1207 1208 static void kxcjk1013_trig_reen(struct iio_trigger *trig) 1209 { 1210 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig); 1211 struct kxcjk1013_data *data = iio_priv(indio_dev); 1212 const struct kx_chipset_regs *regs = data->info->regs; 1213 int ret; 1214 1215 ret = i2c_smbus_read_byte_data(data->client, regs->int_rel); 1216 if (ret < 0) 1217 dev_err(&data->client->dev, "Error reading reg_int_rel\n"); 1218 } 1219 1220 static int kxcjk1013_data_rdy_trigger_set_state(struct iio_trigger *trig, 1221 bool state) 1222 { 1223 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig); 1224 struct kxcjk1013_data *data = iio_priv(indio_dev); 1225 int ret; 1226 1227 mutex_lock(&data->mutex); 1228 1229 if (!state && data->ev_enable_state && data->motion_trigger_on) { 1230 data->motion_trigger_on = false; 1231 mutex_unlock(&data->mutex); 1232 return 0; 1233 } 1234 1235 ret = kxcjk1013_set_power_state(data, state); 1236 if (ret < 0) { 1237 mutex_unlock(&data->mutex); 1238 return ret; 1239 } 1240 ret = kxcjk1013_setup_interrupt(data, state, data->motion_trig != trig); 1241 if (ret < 0) { 1242 kxcjk1013_set_power_state(data, false); 1243 mutex_unlock(&data->mutex); 1244 return ret; 1245 } 1246 if (data->motion_trig == trig) 1247 data->motion_trigger_on = state; 1248 else 1249 data->dready_trigger_on = state; 1250 1251 mutex_unlock(&data->mutex); 1252 1253 return 0; 1254 } 1255 1256 static const struct iio_trigger_ops kxcjk1013_trigger_ops = { 1257 .set_trigger_state = kxcjk1013_data_rdy_trigger_set_state, 1258 .reenable = kxcjk1013_trig_reen, 1259 }; 1260 1261 static void kxcjk1013_report_motion_event(struct iio_dev *indio_dev) 1262 { 1263 struct kxcjk1013_data *data = iio_priv(indio_dev); 1264 const struct kx_chipset_regs *regs = data->info->regs; 1265 1266 int ret = i2c_smbus_read_byte_data(data->client, regs->int_src2); 1267 if (ret < 0) { 1268 dev_err(&data->client->dev, "Error reading reg_int_src2\n"); 1269 return; 1270 } 1271 1272 if (ret & KXCJK1013_REG_INT_SRC2_BIT_XN) 1273 iio_push_event(indio_dev, 1274 IIO_MOD_EVENT_CODE(IIO_ACCEL, 1275 0, 1276 IIO_MOD_X, 1277 IIO_EV_TYPE_THRESH, 1278 IIO_EV_DIR_FALLING), 1279 data->timestamp); 1280 1281 if (ret & KXCJK1013_REG_INT_SRC2_BIT_XP) 1282 iio_push_event(indio_dev, 1283 IIO_MOD_EVENT_CODE(IIO_ACCEL, 1284 0, 1285 IIO_MOD_X, 1286 IIO_EV_TYPE_THRESH, 1287 IIO_EV_DIR_RISING), 1288 data->timestamp); 1289 1290 if (ret & KXCJK1013_REG_INT_SRC2_BIT_YN) 1291 iio_push_event(indio_dev, 1292 IIO_MOD_EVENT_CODE(IIO_ACCEL, 1293 0, 1294 IIO_MOD_Y, 1295 IIO_EV_TYPE_THRESH, 1296 IIO_EV_DIR_FALLING), 1297 data->timestamp); 1298 1299 if (ret & KXCJK1013_REG_INT_SRC2_BIT_YP) 1300 iio_push_event(indio_dev, 1301 IIO_MOD_EVENT_CODE(IIO_ACCEL, 1302 0, 1303 IIO_MOD_Y, 1304 IIO_EV_TYPE_THRESH, 1305 IIO_EV_DIR_RISING), 1306 data->timestamp); 1307 1308 if (ret & KXCJK1013_REG_INT_SRC2_BIT_ZN) 1309 iio_push_event(indio_dev, 1310 IIO_MOD_EVENT_CODE(IIO_ACCEL, 1311 0, 1312 IIO_MOD_Z, 1313 IIO_EV_TYPE_THRESH, 1314 IIO_EV_DIR_FALLING), 1315 data->timestamp); 1316 1317 if (ret & KXCJK1013_REG_INT_SRC2_BIT_ZP) 1318 iio_push_event(indio_dev, 1319 IIO_MOD_EVENT_CODE(IIO_ACCEL, 1320 0, 1321 IIO_MOD_Z, 1322 IIO_EV_TYPE_THRESH, 1323 IIO_EV_DIR_RISING), 1324 data->timestamp); 1325 } 1326 1327 static irqreturn_t kxcjk1013_event_handler(int irq, void *private) 1328 { 1329 struct iio_dev *indio_dev = private; 1330 struct kxcjk1013_data *data = iio_priv(indio_dev); 1331 const struct kx_chipset_regs *regs = data->info->regs; 1332 int ret; 1333 1334 ret = i2c_smbus_read_byte_data(data->client, regs->int_src1); 1335 if (ret < 0) { 1336 dev_err(&data->client->dev, "Error reading reg_int_src1\n"); 1337 goto ack_intr; 1338 } 1339 1340 if (ret & KXCJK1013_REG_INT_SRC1_BIT_WUFS) { 1341 if (data->info == &kxtf9_info) 1342 iio_push_event(indio_dev, 1343 IIO_MOD_EVENT_CODE(IIO_ACCEL, 1344 0, 1345 IIO_MOD_X_AND_Y_AND_Z, 1346 IIO_EV_TYPE_THRESH, 1347 IIO_EV_DIR_RISING), 1348 data->timestamp); 1349 else 1350 kxcjk1013_report_motion_event(indio_dev); 1351 } 1352 1353 ack_intr: 1354 if (data->dready_trigger_on) 1355 return IRQ_HANDLED; 1356 1357 ret = i2c_smbus_read_byte_data(data->client, regs->int_rel); 1358 if (ret < 0) 1359 dev_err(&data->client->dev, "Error reading reg_int_rel\n"); 1360 1361 return IRQ_HANDLED; 1362 } 1363 1364 static irqreturn_t kxcjk1013_data_rdy_trig_poll(int irq, void *private) 1365 { 1366 struct iio_dev *indio_dev = private; 1367 struct kxcjk1013_data *data = iio_priv(indio_dev); 1368 1369 data->timestamp = iio_get_time_ns(indio_dev); 1370 1371 if (data->dready_trigger_on) 1372 iio_trigger_poll(data->dready_trig); 1373 else if (data->motion_trigger_on) 1374 iio_trigger_poll(data->motion_trig); 1375 1376 if (data->ev_enable_state) 1377 return IRQ_WAKE_THREAD; 1378 else 1379 return IRQ_HANDLED; 1380 } 1381 1382 static int kxcjk1013_probe(struct i2c_client *client) 1383 { 1384 const struct i2c_device_id *id = i2c_client_get_device_id(client); 1385 static const char * const regulator_names[] = { "vdd", "vddio" }; 1386 struct kxcjk1013_data *data; 1387 struct iio_dev *indio_dev; 1388 struct kxcjk_1013_platform_data *pdata; 1389 const void *ddata = NULL; 1390 const char *name; 1391 int ret; 1392 1393 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data)); 1394 if (!indio_dev) 1395 return -ENOMEM; 1396 1397 data = iio_priv(indio_dev); 1398 i2c_set_clientdata(client, indio_dev); 1399 data->client = client; 1400 1401 pdata = dev_get_platdata(&client->dev); 1402 if (pdata) { 1403 data->active_high_intr = pdata->active_high_intr; 1404 data->orientation = pdata->orientation; 1405 } else { 1406 data->active_high_intr = true; /* default polarity */ 1407 1408 if (!iio_read_acpi_mount_matrix(&client->dev, &data->orientation, "ROTM")) { 1409 ret = iio_read_mount_matrix(&client->dev, &data->orientation); 1410 if (ret) 1411 return ret; 1412 } 1413 1414 } 1415 1416 ret = devm_regulator_bulk_get_enable(&client->dev, 1417 ARRAY_SIZE(regulator_names), 1418 regulator_names); 1419 if (ret) 1420 return dev_err_probe(&client->dev, ret, "Failed to get regulators\n"); 1421 1422 /* 1423 * A typical delay of 10ms is required for powering up 1424 * according to the data sheets of supported chips. 1425 * Hence double that to play safe. 1426 */ 1427 msleep(20); 1428 1429 if (id) { 1430 name = id->name; 1431 data->info = (const struct kx_chipset_info *)(id->driver_data); 1432 } else { 1433 name = iio_get_acpi_device_name_and_data(&client->dev, &ddata); 1434 data->info = ddata; 1435 if (data->info == &kxcj91008_kiox010a_info) 1436 indio_dev->label = "accel-display"; 1437 else if (data->info == &kxcj91008_kiox020a_info) 1438 indio_dev->label = "accel-base"; 1439 } 1440 if (!name) 1441 return -ENODEV; 1442 1443 ret = kxcjk1013_chip_init(data); 1444 if (ret < 0) 1445 return ret; 1446 1447 mutex_init(&data->mutex); 1448 1449 indio_dev->channels = kxcjk1013_channels; 1450 indio_dev->num_channels = ARRAY_SIZE(kxcjk1013_channels); 1451 indio_dev->available_scan_masks = kxcjk1013_scan_masks; 1452 indio_dev->name = name; 1453 indio_dev->modes = INDIO_DIRECT_MODE; 1454 indio_dev->info = &kxcjk1013_iio_info; 1455 1456 if (client->irq > 0 && data->info->acpi_type != ACPI_SMO8500) { 1457 ret = devm_request_threaded_irq(&client->dev, client->irq, 1458 kxcjk1013_data_rdy_trig_poll, 1459 kxcjk1013_event_handler, 1460 IRQF_TRIGGER_RISING, 1461 "kxcjk1013_event", 1462 indio_dev); 1463 if (ret) 1464 goto err_poweroff; 1465 1466 data->dready_trig = devm_iio_trigger_alloc(&client->dev, 1467 "%s-dev%d", 1468 indio_dev->name, 1469 iio_device_id(indio_dev)); 1470 if (!data->dready_trig) { 1471 ret = -ENOMEM; 1472 goto err_poweroff; 1473 } 1474 1475 data->motion_trig = devm_iio_trigger_alloc(&client->dev, 1476 "%s-any-motion-dev%d", 1477 indio_dev->name, 1478 iio_device_id(indio_dev)); 1479 if (!data->motion_trig) { 1480 ret = -ENOMEM; 1481 goto err_poweroff; 1482 } 1483 1484 data->dready_trig->ops = &kxcjk1013_trigger_ops; 1485 iio_trigger_set_drvdata(data->dready_trig, indio_dev); 1486 ret = iio_trigger_register(data->dready_trig); 1487 if (ret) 1488 goto err_poweroff; 1489 1490 indio_dev->trig = iio_trigger_get(data->dready_trig); 1491 1492 data->motion_trig->ops = &kxcjk1013_trigger_ops; 1493 iio_trigger_set_drvdata(data->motion_trig, indio_dev); 1494 ret = iio_trigger_register(data->motion_trig); 1495 if (ret) { 1496 data->motion_trig = NULL; 1497 goto err_trigger_unregister; 1498 } 1499 } 1500 1501 ret = iio_triggered_buffer_setup(indio_dev, 1502 &iio_pollfunc_store_time, 1503 kxcjk1013_trigger_handler, 1504 &kxcjk1013_buffer_setup_ops); 1505 if (ret < 0) { 1506 dev_err(&client->dev, "iio triggered buffer setup failed\n"); 1507 goto err_trigger_unregister; 1508 } 1509 1510 ret = pm_runtime_set_active(&client->dev); 1511 if (ret) 1512 goto err_buffer_cleanup; 1513 1514 pm_runtime_enable(&client->dev); 1515 pm_runtime_set_autosuspend_delay(&client->dev, 1516 KXCJK1013_SLEEP_DELAY_MS); 1517 pm_runtime_use_autosuspend(&client->dev); 1518 1519 ret = iio_device_register(indio_dev); 1520 if (ret < 0) { 1521 dev_err(&client->dev, "unable to register iio device\n"); 1522 goto err_pm_cleanup; 1523 } 1524 1525 return 0; 1526 1527 err_pm_cleanup: 1528 pm_runtime_dont_use_autosuspend(&client->dev); 1529 pm_runtime_disable(&client->dev); 1530 err_buffer_cleanup: 1531 iio_triggered_buffer_cleanup(indio_dev); 1532 err_trigger_unregister: 1533 if (data->dready_trig) 1534 iio_trigger_unregister(data->dready_trig); 1535 if (data->motion_trig) 1536 iio_trigger_unregister(data->motion_trig); 1537 err_poweroff: 1538 kxcjk1013_set_mode(data, STANDBY); 1539 1540 return ret; 1541 } 1542 1543 static void kxcjk1013_remove(struct i2c_client *client) 1544 { 1545 struct iio_dev *indio_dev = i2c_get_clientdata(client); 1546 struct kxcjk1013_data *data = iio_priv(indio_dev); 1547 1548 iio_device_unregister(indio_dev); 1549 1550 pm_runtime_disable(&client->dev); 1551 pm_runtime_set_suspended(&client->dev); 1552 1553 iio_triggered_buffer_cleanup(indio_dev); 1554 if (data->dready_trig) { 1555 iio_trigger_unregister(data->dready_trig); 1556 iio_trigger_unregister(data->motion_trig); 1557 } 1558 1559 mutex_lock(&data->mutex); 1560 kxcjk1013_set_mode(data, STANDBY); 1561 mutex_unlock(&data->mutex); 1562 } 1563 1564 static int kxcjk1013_suspend(struct device *dev) 1565 { 1566 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); 1567 struct kxcjk1013_data *data = iio_priv(indio_dev); 1568 int ret; 1569 1570 mutex_lock(&data->mutex); 1571 ret = kxcjk1013_set_mode(data, STANDBY); 1572 mutex_unlock(&data->mutex); 1573 1574 return ret; 1575 } 1576 1577 static int kxcjk1013_resume(struct device *dev) 1578 { 1579 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); 1580 struct kxcjk1013_data *data = iio_priv(indio_dev); 1581 int ret = 0; 1582 1583 mutex_lock(&data->mutex); 1584 ret = kxcjk1013_set_mode(data, OPERATION); 1585 if (ret == 0) 1586 ret = kxcjk1013_set_range(data, data->range); 1587 mutex_unlock(&data->mutex); 1588 1589 return ret; 1590 } 1591 1592 static int kxcjk1013_runtime_suspend(struct device *dev) 1593 { 1594 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); 1595 struct kxcjk1013_data *data = iio_priv(indio_dev); 1596 int ret; 1597 1598 ret = kxcjk1013_set_mode(data, STANDBY); 1599 if (ret < 0) { 1600 dev_err(&data->client->dev, "powering off device failed\n"); 1601 return -EAGAIN; 1602 } 1603 return 0; 1604 } 1605 1606 static int kxcjk1013_runtime_resume(struct device *dev) 1607 { 1608 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev)); 1609 struct kxcjk1013_data *data = iio_priv(indio_dev); 1610 int ret; 1611 int sleep_val; 1612 1613 ret = kxcjk1013_set_mode(data, OPERATION); 1614 if (ret < 0) 1615 return ret; 1616 1617 sleep_val = kxcjk1013_get_startup_times(data); 1618 if (sleep_val < 20000) 1619 usleep_range(sleep_val, 20000); 1620 else 1621 msleep_interruptible(sleep_val/1000); 1622 1623 return 0; 1624 } 1625 1626 static const struct dev_pm_ops kxcjk1013_pm_ops = { 1627 SYSTEM_SLEEP_PM_OPS(kxcjk1013_suspend, kxcjk1013_resume) 1628 RUNTIME_PM_OPS(kxcjk1013_runtime_suspend, kxcjk1013_runtime_resume, NULL) 1629 }; 1630 1631 static const struct i2c_device_id kxcjk1013_id[] = { 1632 { .name = "kxcjk1013", .driver_data = (kernel_ulong_t)&kxcjk1013_info }, 1633 { .name = "kxcj91008", .driver_data = (kernel_ulong_t)&kxcj91008_info }, 1634 { .name = "kxtj21009", .driver_data = (kernel_ulong_t)&kxtj21009_info }, 1635 { .name = "kxtf9", .driver_data = (kernel_ulong_t)&kxtf9_info }, 1636 { .name = "kx023-1025", .driver_data = (kernel_ulong_t)&kx0231025_info }, 1637 { } 1638 }; 1639 MODULE_DEVICE_TABLE(i2c, kxcjk1013_id); 1640 1641 static const struct of_device_id kxcjk1013_of_match[] = { 1642 { .compatible = "kionix,kxcjk1013", &kxcjk1013_info }, 1643 { .compatible = "kionix,kxcj91008", &kxcj91008_info }, 1644 { .compatible = "kionix,kxtj21009", &kxtj21009_info }, 1645 { .compatible = "kionix,kxtf9", &kxtf9_info }, 1646 { .compatible = "kionix,kx023-1025", &kx0231025_info }, 1647 { } 1648 }; 1649 MODULE_DEVICE_TABLE(of, kxcjk1013_of_match); 1650 1651 static const struct acpi_device_id kx_acpi_match[] = { 1652 { "KIOX0008", (kernel_ulong_t)&kxcj91008_info }, 1653 { "KIOX0009", (kernel_ulong_t)&kxtj21009_info }, 1654 { "KIOX000A", (kernel_ulong_t)&kxcj91008_info }, 1655 /* KXCJ91008 in the display of a yoga 2-in-1 */ 1656 { "KIOX010A", (kernel_ulong_t)&kxcj91008_kiox010a_info }, 1657 /* KXCJ91008 in the base of a yoga 2-in-1 */ 1658 { "KIOX020A", (kernel_ulong_t)&kxcj91008_kiox020a_info }, 1659 { "KXCJ1008", (kernel_ulong_t)&kxcj91008_info }, 1660 { "KXCJ1013", (kernel_ulong_t)&kxcjk1013_info }, 1661 { "KXCJ9000", (kernel_ulong_t)&kxcj91008_info }, 1662 { "KXJ2109", (kernel_ulong_t)&kxtj21009_info }, 1663 { "KXTJ1009", (kernel_ulong_t)&kxtj21009_info }, 1664 { "SMO8500", (kernel_ulong_t)&kxcj91008_smo8500_info }, 1665 { } 1666 }; 1667 MODULE_DEVICE_TABLE(acpi, kx_acpi_match); 1668 1669 static struct i2c_driver kxcjk1013_driver = { 1670 .driver = { 1671 .name = "kxcjk1013", 1672 .acpi_match_table = kx_acpi_match, 1673 .of_match_table = kxcjk1013_of_match, 1674 .pm = pm_ptr(&kxcjk1013_pm_ops), 1675 }, 1676 .probe = kxcjk1013_probe, 1677 .remove = kxcjk1013_remove, 1678 .id_table = kxcjk1013_id, 1679 }; 1680 module_i2c_driver(kxcjk1013_driver); 1681 1682 MODULE_AUTHOR("Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>"); 1683 MODULE_LICENSE("GPL v2"); 1684 MODULE_DESCRIPTION("KXCJK1013 accelerometer driver"); 1685