1 /* SPDX-License-Identifier: GPL-2.0 */ 2 /* 3 * Copyright (c) 2018-2020, The Linux Foundation. All rights reserved. 4 * 5 */ 6 #ifndef _MHI_H_ 7 #define _MHI_H_ 8 9 #include <linux/device.h> 10 #include <linux/dma-direction.h> 11 #include <linux/mutex.h> 12 #include <linux/skbuff.h> 13 #include <linux/slab.h> 14 #include <linux/spinlock.h> 15 #include <linux/wait.h> 16 #include <linux/workqueue.h> 17 18 #define MHI_MAX_OEM_PK_HASH_SEGMENTS 16 19 20 struct mhi_chan; 21 struct mhi_event; 22 struct mhi_ctxt; 23 struct mhi_cmd; 24 struct mhi_buf_info; 25 26 /** 27 * enum mhi_callback - MHI callback 28 * @MHI_CB_IDLE: MHI entered idle state 29 * @MHI_CB_PENDING_DATA: New data available for client to process 30 * @MHI_CB_LPM_ENTER: MHI host entered low power mode 31 * @MHI_CB_LPM_EXIT: MHI host about to exit low power mode 32 * @MHI_CB_EE_RDDM: MHI device entered RDDM exec env 33 * @MHI_CB_EE_MISSION_MODE: MHI device entered Mission Mode exec env 34 * @MHI_CB_SYS_ERROR: MHI device entered error state (may recover) 35 * @MHI_CB_FATAL_ERROR: MHI device entered fatal error state 36 * @MHI_CB_BW_REQ: Received a bandwidth switch request from device 37 */ 38 enum mhi_callback { 39 MHI_CB_IDLE, 40 MHI_CB_PENDING_DATA, 41 MHI_CB_LPM_ENTER, 42 MHI_CB_LPM_EXIT, 43 MHI_CB_EE_RDDM, 44 MHI_CB_EE_MISSION_MODE, 45 MHI_CB_SYS_ERROR, 46 MHI_CB_FATAL_ERROR, 47 MHI_CB_BW_REQ, 48 }; 49 50 /** 51 * enum mhi_flags - Transfer flags 52 * @MHI_EOB: End of buffer for bulk transfer 53 * @MHI_EOT: End of transfer 54 * @MHI_CHAIN: Linked transfer 55 */ 56 enum mhi_flags { 57 MHI_EOB = BIT(0), 58 MHI_EOT = BIT(1), 59 MHI_CHAIN = BIT(2), 60 }; 61 62 /** 63 * enum mhi_device_type - Device types 64 * @MHI_DEVICE_XFER: Handles data transfer 65 * @MHI_DEVICE_CONTROLLER: Control device 66 */ 67 enum mhi_device_type { 68 MHI_DEVICE_XFER, 69 MHI_DEVICE_CONTROLLER, 70 }; 71 72 /** 73 * enum mhi_ch_type - Channel types 74 * @MHI_CH_TYPE_INVALID: Invalid channel type 75 * @MHI_CH_TYPE_OUTBOUND: Outbound channel to the device 76 * @MHI_CH_TYPE_INBOUND: Inbound channel from the device 77 * @MHI_CH_TYPE_INBOUND_COALESCED: Coalesced channel for the device to combine 78 * multiple packets and send them as a single 79 * large packet to reduce CPU consumption 80 */ 81 enum mhi_ch_type { 82 MHI_CH_TYPE_INVALID = 0, 83 MHI_CH_TYPE_OUTBOUND = DMA_TO_DEVICE, 84 MHI_CH_TYPE_INBOUND = DMA_FROM_DEVICE, 85 MHI_CH_TYPE_INBOUND_COALESCED = 3, 86 }; 87 88 /** 89 * struct mhi_buf - MHI Buffer description 90 * @buf: Virtual address of the buffer 91 * @name: Buffer label. For offload channel, configurations name must be: 92 * ECA - Event context array data 93 * CCA - Channel context array data 94 * @dma_addr: IOMMU address of the buffer 95 * @len: # of bytes 96 */ 97 struct mhi_buf { 98 void *buf; 99 const char *name; 100 dma_addr_t dma_addr; 101 size_t len; 102 }; 103 104 /** 105 * struct image_info - Firmware and RDDM table 106 * @mhi_buf: Buffer for firmware and RDDM table 107 * @entries: # of entries in table 108 */ 109 struct image_info { 110 /* private: from internal.h */ 111 struct bhi_vec_entry *bhi_vec; 112 /* public: */ 113 u32 entries; 114 struct mhi_buf mhi_buf[] __counted_by(entries); 115 }; 116 117 /** 118 * struct mhi_link_info - BW requirement 119 * target_link_speed - Link speed as defined by TLS bits in LinkControl reg 120 * target_link_width - Link width as defined by NLW bits in LinkStatus reg 121 */ 122 struct mhi_link_info { 123 unsigned int target_link_speed; 124 unsigned int target_link_width; 125 }; 126 127 /** 128 * enum mhi_ee_type - Execution environment types 129 * @MHI_EE_PBL: Primary Bootloader 130 * @MHI_EE_SBL: Secondary Bootloader 131 * @MHI_EE_AMSS: Modem, aka the primary runtime EE 132 * @MHI_EE_RDDM: Ram dump download mode 133 * @MHI_EE_WFW: WLAN firmware mode 134 * @MHI_EE_PTHRU: Passthrough 135 * @MHI_EE_EDL: Embedded downloader 136 * @MHI_EE_FP: Flash Programmer Environment 137 */ 138 enum mhi_ee_type { 139 MHI_EE_PBL, 140 MHI_EE_SBL, 141 MHI_EE_AMSS, 142 MHI_EE_RDDM, 143 MHI_EE_WFW, 144 MHI_EE_PTHRU, 145 MHI_EE_EDL, 146 MHI_EE_FP, 147 MHI_EE_MAX_SUPPORTED = MHI_EE_FP, 148 MHI_EE_DISABLE_TRANSITION, /* local EE, not related to mhi spec */ 149 MHI_EE_NOT_SUPPORTED, 150 MHI_EE_MAX, 151 }; 152 153 /** 154 * enum mhi_state - MHI states 155 * @MHI_STATE_RESET: Reset state 156 * @MHI_STATE_READY: Ready state 157 * @MHI_STATE_M0: M0 state 158 * @MHI_STATE_M1: M1 state 159 * @MHI_STATE_M2: M2 state 160 * @MHI_STATE_M3: M3 state 161 * @MHI_STATE_M3_FAST: M3 Fast state 162 * @MHI_STATE_BHI: BHI state 163 * @MHI_STATE_SYS_ERR: System Error state 164 */ 165 enum mhi_state { 166 MHI_STATE_RESET = 0x0, 167 MHI_STATE_READY = 0x1, 168 MHI_STATE_M0 = 0x2, 169 MHI_STATE_M1 = 0x3, 170 MHI_STATE_M2 = 0x4, 171 MHI_STATE_M3 = 0x5, 172 MHI_STATE_M3_FAST = 0x6, 173 MHI_STATE_BHI = 0x7, 174 MHI_STATE_SYS_ERR = 0xFF, 175 MHI_STATE_MAX, 176 }; 177 178 /** 179 * enum mhi_ch_ee_mask - Execution environment mask for channel 180 * @MHI_CH_EE_PBL: Allow channel to be used in PBL EE 181 * @MHI_CH_EE_SBL: Allow channel to be used in SBL EE 182 * @MHI_CH_EE_AMSS: Allow channel to be used in AMSS EE 183 * @MHI_CH_EE_RDDM: Allow channel to be used in RDDM EE 184 * @MHI_CH_EE_PTHRU: Allow channel to be used in PTHRU EE 185 * @MHI_CH_EE_WFW: Allow channel to be used in WFW EE 186 * @MHI_CH_EE_EDL: Allow channel to be used in EDL EE 187 */ 188 enum mhi_ch_ee_mask { 189 MHI_CH_EE_PBL = BIT(MHI_EE_PBL), 190 MHI_CH_EE_SBL = BIT(MHI_EE_SBL), 191 MHI_CH_EE_AMSS = BIT(MHI_EE_AMSS), 192 MHI_CH_EE_RDDM = BIT(MHI_EE_RDDM), 193 MHI_CH_EE_PTHRU = BIT(MHI_EE_PTHRU), 194 MHI_CH_EE_WFW = BIT(MHI_EE_WFW), 195 MHI_CH_EE_EDL = BIT(MHI_EE_EDL), 196 }; 197 198 /** 199 * enum mhi_er_data_type - Event ring data types 200 * @MHI_ER_DATA: Only client data over this ring 201 * @MHI_ER_CTRL: MHI control data and client data 202 */ 203 enum mhi_er_data_type { 204 MHI_ER_DATA, 205 MHI_ER_CTRL, 206 }; 207 208 /** 209 * enum mhi_db_brst_mode - Doorbell mode 210 * @MHI_DB_BRST_DISABLE: Burst mode disable 211 * @MHI_DB_BRST_ENABLE: Burst mode enable 212 */ 213 enum mhi_db_brst_mode { 214 MHI_DB_BRST_DISABLE = 0x2, 215 MHI_DB_BRST_ENABLE = 0x3, 216 }; 217 218 /** 219 * struct mhi_channel_config - Channel configuration structure for controller 220 * @name: The name of this channel 221 * @num: The number assigned to this channel 222 * @num_elements: The number of elements that can be queued to this channel 223 * @local_elements: The local ring length of the channel 224 * @event_ring: The event ring index that services this channel 225 * @dir: Direction that data may flow on this channel 226 * @type: Channel type 227 * @ee_mask: Execution Environment mask for this channel 228 * @pollcfg: Polling configuration for burst mode. 0 is default. milliseconds 229 for UL channels, multiple of 8 ring elements for DL channels 230 * @doorbell: Doorbell mode 231 * @lpm_notify: The channel master requires low power mode notifications 232 * @offload_channel: The client manages the channel completely 233 * @doorbell_mode_switch: Channel switches to doorbell mode on M0 transition 234 * @wake-capable: Channel capable of waking up the system 235 */ 236 struct mhi_channel_config { 237 char *name; 238 u32 num; 239 u32 num_elements; 240 u32 local_elements; 241 u32 event_ring; 242 enum dma_data_direction dir; 243 enum mhi_ch_type type; 244 u32 ee_mask; 245 u32 pollcfg; 246 enum mhi_db_brst_mode doorbell; 247 bool lpm_notify; 248 bool offload_channel; 249 bool doorbell_mode_switch; 250 bool wake_capable; 251 }; 252 253 /** 254 * struct mhi_event_config - Event ring configuration structure for controller 255 * @num_elements: The number of elements that can be queued to this ring 256 * @irq_moderation_ms: Delay irq for additional events to be aggregated 257 * @irq: IRQ associated with this ring 258 * @channel: Dedicated channel number. U32_MAX indicates a non-dedicated ring 259 * @priority: Priority of this ring. Use 1 for now 260 * @mode: Doorbell mode 261 * @data_type: Type of data this ring will process 262 * @hardware_event: This ring is associated with hardware channels 263 * @client_managed: This ring is client managed 264 * @offload_channel: This ring is associated with an offloaded channel 265 */ 266 struct mhi_event_config { 267 u32 num_elements; 268 u32 irq_moderation_ms; 269 u32 irq; 270 u32 channel; 271 u32 priority; 272 enum mhi_db_brst_mode mode; 273 enum mhi_er_data_type data_type; 274 bool hardware_event; 275 bool client_managed; 276 bool offload_channel; 277 }; 278 279 /** 280 * struct mhi_controller_config - Root MHI controller configuration 281 * @max_channels: Maximum number of channels supported 282 * @timeout_ms: Timeout value for operations. 0 means use default 283 * @ready_timeout_ms: Timeout value for waiting device to be ready (optional) 284 * @buf_len: Size of automatically allocated buffers. 0 means use default 285 * @num_channels: Number of channels defined in @ch_cfg 286 * @ch_cfg: Array of defined channels 287 * @num_events: Number of event rings defined in @event_cfg 288 * @event_cfg: Array of defined event rings 289 * @use_bounce_buf: Use a bounce buffer pool due to limited DDR access 290 * @m2_no_db: Host is not allowed to ring DB in M2 state 291 */ 292 struct mhi_controller_config { 293 u32 max_channels; 294 u32 timeout_ms; 295 u32 ready_timeout_ms; 296 u32 buf_len; 297 u32 num_channels; 298 const struct mhi_channel_config *ch_cfg; 299 u32 num_events; 300 struct mhi_event_config *event_cfg; 301 bool use_bounce_buf; 302 bool m2_no_db; 303 }; 304 305 /** 306 * struct mhi_controller - Master MHI controller structure 307 * @name: Device name of the MHI controller 308 * @cntrl_dev: Pointer to the struct device of physical bus acting as the MHI 309 * controller (required) 310 * @mhi_dev: MHI device instance for the controller 311 * @debugfs_dentry: MHI controller debugfs directory 312 * @regs: Base address of MHI MMIO register space (required) 313 * @bhi: Points to base of MHI BHI register space 314 * @bhie: Points to base of MHI BHIe register space 315 * @wake_db: MHI WAKE doorbell register address 316 * @iova_start: IOMMU starting address for data (required) 317 * @iova_stop: IOMMU stop address for data (required) 318 * @fw_image: Firmware image name for normal booting (optional) 319 * @fw_data: Firmware image data content for normal booting, used only 320 * if fw_image is NULL and fbc_download is true (optional) 321 * @fw_sz: Firmware image data size for normal booting, used only if fw_image 322 * is NULL and fbc_download is true (optional) 323 * @edl_image: Firmware image name for emergency download mode (optional) 324 * @rddm_size: RAM dump size that host should allocate for debugging purpose 325 * @sbl_size: SBL image size downloaded through BHIe (optional) 326 * @seg_len: BHIe vector size (optional) 327 * @reg_len: Length of the MHI MMIO region (required) 328 * @fbc_image: Points to firmware image buffer 329 * @rddm_image: Points to RAM dump buffer 330 * @mhi_chan: Points to the channel configuration table 331 * @lpm_chans: List of channels that require LPM notifications 332 * @irq: base irq # to request (required) 333 * @max_chan: Maximum number of channels the controller supports 334 * @total_ev_rings: Total # of event rings allocated 335 * @hw_ev_rings: Number of hardware event rings 336 * @sw_ev_rings: Number of software event rings 337 * @nr_irqs: Number of IRQ allocated by bus master (required) 338 * @serial_number: MHI controller serial number obtained from BHI 339 * @mhi_event: MHI event ring configurations table 340 * @mhi_cmd: MHI command ring configurations table 341 * @mhi_ctxt: MHI device context, shared memory between host and device 342 * @pm_mutex: Mutex for suspend/resume operation 343 * @pm_lock: Lock for protecting MHI power management state 344 * @timeout_ms: Timeout in ms for state transitions 345 * @ready_timeout_ms: Timeout in ms for waiting device to be ready (optional) 346 * @pm_state: MHI power management state 347 * @db_access: DB access states 348 * @ee: MHI device execution environment 349 * @dev_state: MHI device state 350 * @dev_wake: Device wakeup count 351 * @pending_pkts: Pending packets for the controller 352 * @M0, M2, M3: Counters to track number of device MHI state changes 353 * @transition_list: List of MHI state transitions 354 * @transition_lock: Lock for protecting MHI state transition list 355 * @wlock: Lock for protecting device wakeup 356 * @mhi_link_info: Device bandwidth info 357 * @st_worker: State transition worker 358 * @hiprio_wq: High priority workqueue for MHI work such as state transitions 359 * @state_event: State change event 360 * @status_cb: CB function to notify power states of the device (required) 361 * @wake_get: CB function to assert device wake (optional) 362 * @wake_put: CB function to de-assert device wake (optional) 363 * @wake_toggle: CB function to assert and de-assert device wake (optional) 364 * @runtime_get: CB function to controller runtime resume (required) 365 * @runtime_put: CB function to decrement pm usage (required) 366 * @map_single: CB function to create TRE buffer 367 * @unmap_single: CB function to destroy TRE buffer 368 * @read_reg: Read a MHI register via the physical link (required) 369 * @write_reg: Write a MHI register via the physical link (required) 370 * @reset: Controller specific reset function (optional) 371 * @edl_trigger: CB function to trigger EDL mode (optional) 372 * @buffer_len: Bounce buffer length 373 * @index: Index of the MHI controller instance 374 * @bounce_buf: Use of bounce buffer 375 * @fbc_download: MHI host needs to do complete image transfer (optional) 376 * @wake_set: Device wakeup set flag 377 * @irq_flags: irq flags passed to request_irq (optional) 378 * @mru: the default MRU for the MHI device 379 * 380 * Fields marked as (required) need to be populated by the controller driver 381 * before calling mhi_register_controller(). For the fields marked as (optional) 382 * they can be populated depending on the usecase. 383 */ 384 struct mhi_controller { 385 const char *name; 386 struct device *cntrl_dev; 387 struct mhi_device *mhi_dev; 388 struct dentry *debugfs_dentry; 389 void __iomem *regs; 390 void __iomem *bhi; 391 void __iomem *bhie; 392 void __iomem *wake_db; 393 394 dma_addr_t iova_start; 395 dma_addr_t iova_stop; 396 const char *fw_image; 397 const u8 *fw_data; 398 size_t fw_sz; 399 const char *edl_image; 400 size_t rddm_size; 401 size_t sbl_size; 402 size_t seg_len; 403 size_t reg_len; 404 struct image_info *fbc_image; 405 struct image_info *rddm_image; 406 struct mhi_chan *mhi_chan; 407 struct list_head lpm_chans; 408 int *irq; 409 u32 max_chan; 410 u32 total_ev_rings; 411 u32 hw_ev_rings; 412 u32 sw_ev_rings; 413 u32 nr_irqs; 414 u32 serial_number; 415 416 struct mhi_event *mhi_event; 417 struct mhi_cmd *mhi_cmd; 418 struct mhi_ctxt *mhi_ctxt; 419 420 struct mutex pm_mutex; 421 rwlock_t pm_lock; 422 u32 timeout_ms; 423 u32 ready_timeout_ms; 424 u32 pm_state; 425 u32 db_access; 426 enum mhi_ee_type ee; 427 enum mhi_state dev_state; 428 atomic_t dev_wake; 429 atomic_t pending_pkts; 430 u32 M0, M2, M3; 431 struct list_head transition_list; 432 spinlock_t transition_lock; 433 spinlock_t wlock; 434 struct mhi_link_info mhi_link_info; 435 struct work_struct st_worker; 436 struct workqueue_struct *hiprio_wq; 437 wait_queue_head_t state_event; 438 439 void (*status_cb)(struct mhi_controller *mhi_cntrl, 440 enum mhi_callback cb); 441 void (*wake_get)(struct mhi_controller *mhi_cntrl, bool override); 442 void (*wake_put)(struct mhi_controller *mhi_cntrl, bool override); 443 void (*wake_toggle)(struct mhi_controller *mhi_cntrl); 444 int (*runtime_get)(struct mhi_controller *mhi_cntrl); 445 void (*runtime_put)(struct mhi_controller *mhi_cntrl); 446 int (*map_single)(struct mhi_controller *mhi_cntrl, 447 struct mhi_buf_info *buf); 448 void (*unmap_single)(struct mhi_controller *mhi_cntrl, 449 struct mhi_buf_info *buf); 450 int (*read_reg)(struct mhi_controller *mhi_cntrl, void __iomem *addr, 451 u32 *out); 452 void (*write_reg)(struct mhi_controller *mhi_cntrl, void __iomem *addr, 453 u32 val); 454 void (*reset)(struct mhi_controller *mhi_cntrl); 455 int (*edl_trigger)(struct mhi_controller *mhi_cntrl); 456 457 size_t buffer_len; 458 int index; 459 bool bounce_buf; 460 bool fbc_download; 461 bool wake_set; 462 unsigned long irq_flags; 463 u32 mru; 464 }; 465 466 /** 467 * struct mhi_device - Structure representing an MHI device which binds 468 * to channels or is associated with controllers 469 * @id: Pointer to MHI device ID struct 470 * @name: Name of the associated MHI device 471 * @mhi_cntrl: Controller the device belongs to 472 * @ul_chan: UL channel for the device 473 * @dl_chan: DL channel for the device 474 * @dev: Driver model device node for the MHI device 475 * @dev_type: MHI device type 476 * @ul_chan_id: MHI channel id for UL transfer 477 * @dl_chan_id: MHI channel id for DL transfer 478 * @dev_wake: Device wakeup counter 479 */ 480 struct mhi_device { 481 const struct mhi_device_id *id; 482 const char *name; 483 struct mhi_controller *mhi_cntrl; 484 struct mhi_chan *ul_chan; 485 struct mhi_chan *dl_chan; 486 struct device dev; 487 enum mhi_device_type dev_type; 488 int ul_chan_id; 489 int dl_chan_id; 490 u32 dev_wake; 491 }; 492 493 /** 494 * struct mhi_result - Completed buffer information 495 * @buf_addr: Address of data buffer 496 * @bytes_xferd: # of bytes transferred 497 * @dir: Channel direction 498 * @transaction_status: Status of last transaction 499 */ 500 struct mhi_result { 501 void *buf_addr; 502 size_t bytes_xferd; 503 enum dma_data_direction dir; 504 int transaction_status; 505 }; 506 507 /** 508 * struct mhi_driver - Structure representing a MHI client driver 509 * @probe: CB function for client driver probe function 510 * @remove: CB function for client driver remove function 511 * @ul_xfer_cb: CB function for UL data transfer 512 * @dl_xfer_cb: CB function for DL data transfer 513 * @status_cb: CB functions for asynchronous status 514 * @driver: Device driver model driver 515 */ 516 struct mhi_driver { 517 const struct mhi_device_id *id_table; 518 int (*probe)(struct mhi_device *mhi_dev, 519 const struct mhi_device_id *id); 520 void (*remove)(struct mhi_device *mhi_dev); 521 void (*ul_xfer_cb)(struct mhi_device *mhi_dev, 522 struct mhi_result *result); 523 void (*dl_xfer_cb)(struct mhi_device *mhi_dev, 524 struct mhi_result *result); 525 void (*status_cb)(struct mhi_device *mhi_dev, enum mhi_callback mhi_cb); 526 struct device_driver driver; 527 }; 528 529 #define to_mhi_driver(drv) container_of_const(drv, struct mhi_driver, driver) 530 #define to_mhi_device(dev) container_of(dev, struct mhi_device, dev) 531 532 /** 533 * mhi_alloc_controller - Allocate the MHI Controller structure 534 * Allocate the mhi_controller structure using zero initialized memory 535 */ 536 struct mhi_controller *mhi_alloc_controller(void); 537 538 /** 539 * mhi_free_controller - Free the MHI Controller structure 540 * Free the mhi_controller structure which was previously allocated 541 */ 542 void mhi_free_controller(struct mhi_controller *mhi_cntrl); 543 544 /** 545 * mhi_register_controller - Register MHI controller 546 * @mhi_cntrl: MHI controller to register 547 * @config: Configuration to use for the controller 548 */ 549 int mhi_register_controller(struct mhi_controller *mhi_cntrl, 550 const struct mhi_controller_config *config); 551 552 /** 553 * mhi_unregister_controller - Unregister MHI controller 554 * @mhi_cntrl: MHI controller to unregister 555 */ 556 void mhi_unregister_controller(struct mhi_controller *mhi_cntrl); 557 558 /* 559 * module_mhi_driver() - Helper macro for drivers that don't do 560 * anything special other than using default mhi_driver_register() and 561 * mhi_driver_unregister(). This eliminates a lot of boilerplate. 562 * Each module may only use this macro once. 563 */ 564 #define module_mhi_driver(mhi_drv) \ 565 module_driver(mhi_drv, mhi_driver_register, \ 566 mhi_driver_unregister) 567 568 /* 569 * Macro to avoid include chaining to get THIS_MODULE 570 */ 571 #define mhi_driver_register(mhi_drv) \ 572 __mhi_driver_register(mhi_drv, THIS_MODULE) 573 574 /** 575 * __mhi_driver_register - Register driver with MHI framework 576 * @mhi_drv: Driver associated with the device 577 * @owner: The module owner 578 */ 579 int __mhi_driver_register(struct mhi_driver *mhi_drv, struct module *owner); 580 581 /** 582 * mhi_driver_unregister - Unregister a driver for mhi_devices 583 * @mhi_drv: Driver associated with the device 584 */ 585 void mhi_driver_unregister(struct mhi_driver *mhi_drv); 586 587 /** 588 * mhi_set_mhi_state - Set MHI device state 589 * @mhi_cntrl: MHI controller 590 * @state: State to set 591 */ 592 void mhi_set_mhi_state(struct mhi_controller *mhi_cntrl, 593 enum mhi_state state); 594 595 /** 596 * mhi_notify - Notify the MHI client driver about client device status 597 * @mhi_dev: MHI device instance 598 * @cb_reason: MHI callback reason 599 */ 600 void mhi_notify(struct mhi_device *mhi_dev, enum mhi_callback cb_reason); 601 602 /** 603 * mhi_get_free_desc_count - Get transfer ring length 604 * Get # of TD available to queue buffers 605 * @mhi_dev: Device associated with the channels 606 * @dir: Direction of the channel 607 */ 608 int mhi_get_free_desc_count(struct mhi_device *mhi_dev, 609 enum dma_data_direction dir); 610 611 /** 612 * mhi_prepare_for_power_up - Do pre-initialization before power up. 613 * This is optional, call this before power up if 614 * the controller does not want bus framework to 615 * automatically free any allocated memory during 616 * shutdown process. 617 * @mhi_cntrl: MHI controller 618 */ 619 int mhi_prepare_for_power_up(struct mhi_controller *mhi_cntrl); 620 621 /** 622 * mhi_async_power_up - Start MHI power up sequence 623 * @mhi_cntrl: MHI controller 624 */ 625 int mhi_async_power_up(struct mhi_controller *mhi_cntrl); 626 627 /** 628 * mhi_sync_power_up - Start MHI power up sequence and wait till the device 629 * enters valid EE state 630 * @mhi_cntrl: MHI controller 631 */ 632 int mhi_sync_power_up(struct mhi_controller *mhi_cntrl); 633 634 /** 635 * mhi_power_down - Power down the MHI device and also destroy the 636 * 'struct device' for the channels associated with it. 637 * See also mhi_power_down_keep_dev() which is a variant 638 * of this API that keeps the 'struct device' for channels 639 * (useful during suspend/hibernation). 640 * @mhi_cntrl: MHI controller 641 * @graceful: Link is still accessible, so do a graceful shutdown process 642 */ 643 void mhi_power_down(struct mhi_controller *mhi_cntrl, bool graceful); 644 645 /** 646 * mhi_power_down_keep_dev - Power down the MHI device but keep the 'struct 647 * device' for the channels associated with it. 648 * This is a variant of 'mhi_power_down()' and 649 * useful in scenarios such as suspend/hibernation 650 * where destroying of the 'struct device' is not 651 * needed. 652 * @mhi_cntrl: MHI controller 653 * @graceful: Link is still accessible, so do a graceful shutdown process 654 */ 655 void mhi_power_down_keep_dev(struct mhi_controller *mhi_cntrl, bool graceful); 656 657 /** 658 * mhi_unprepare_after_power_down - Free any allocated memory after power down 659 * @mhi_cntrl: MHI controller 660 */ 661 void mhi_unprepare_after_power_down(struct mhi_controller *mhi_cntrl); 662 663 /** 664 * mhi_pm_suspend - Move MHI into a suspended state 665 * @mhi_cntrl: MHI controller 666 */ 667 int mhi_pm_suspend(struct mhi_controller *mhi_cntrl); 668 669 /** 670 * mhi_pm_resume - Resume MHI from suspended state 671 * @mhi_cntrl: MHI controller 672 */ 673 int mhi_pm_resume(struct mhi_controller *mhi_cntrl); 674 675 /** 676 * mhi_pm_resume_force - Force resume MHI from suspended state 677 * @mhi_cntrl: MHI controller 678 * 679 * Resume the device irrespective of its MHI state. As per the MHI spec, devices 680 * has to be in M3 state during resume. But some devices seem to be in a 681 * different MHI state other than M3 but they continue working fine if allowed. 682 * This API is intented to be used for such devices. 683 * 684 * Return: 0 if the resume succeeds, a negative error code otherwise 685 */ 686 int mhi_pm_resume_force(struct mhi_controller *mhi_cntrl); 687 688 /** 689 * mhi_download_rddm_image - Download ramdump image from device for 690 * debugging purpose. 691 * @mhi_cntrl: MHI controller 692 * @in_panic: Download rddm image during kernel panic 693 */ 694 int mhi_download_rddm_image(struct mhi_controller *mhi_cntrl, bool in_panic); 695 696 /** 697 * mhi_force_rddm_mode - Force device into rddm mode 698 * @mhi_cntrl: MHI controller 699 */ 700 int mhi_force_rddm_mode(struct mhi_controller *mhi_cntrl); 701 702 /** 703 * mhi_get_exec_env - Get BHI execution environment of the device 704 * @mhi_cntrl: MHI controller 705 */ 706 enum mhi_ee_type mhi_get_exec_env(struct mhi_controller *mhi_cntrl); 707 708 /** 709 * mhi_get_mhi_state - Get MHI state of the device 710 * @mhi_cntrl: MHI controller 711 */ 712 enum mhi_state mhi_get_mhi_state(struct mhi_controller *mhi_cntrl); 713 714 /** 715 * mhi_soc_reset - Trigger a device reset. This can be used as a last resort 716 * to reset and recover a device. 717 * @mhi_cntrl: MHI controller 718 */ 719 void mhi_soc_reset(struct mhi_controller *mhi_cntrl); 720 721 /** 722 * mhi_device_get_sync - Disable device low power mode. Synchronously 723 * take the controller out of suspended state 724 * @mhi_dev: Device associated with the channel 725 */ 726 int mhi_device_get_sync(struct mhi_device *mhi_dev); 727 728 /** 729 * mhi_device_put - Re-enable device low power mode 730 * @mhi_dev: Device associated with the channel 731 */ 732 void mhi_device_put(struct mhi_device *mhi_dev); 733 734 /** 735 * mhi_prepare_for_transfer - Setup UL and DL channels for data transfer. 736 * @mhi_dev: Device associated with the channels 737 * 738 * Allocate and initialize the channel context and also issue the START channel 739 * command to both channels. Channels can be started only if both host and 740 * device execution environments match and channels are in a DISABLED state. 741 */ 742 int mhi_prepare_for_transfer(struct mhi_device *mhi_dev); 743 744 /** 745 * mhi_unprepare_from_transfer - Reset UL and DL channels for data transfer. 746 * Issue the RESET channel command and let the 747 * device clean-up the context so no incoming 748 * transfers are seen on the host. Free memory 749 * associated with the context on host. If device 750 * is unresponsive, only perform a host side 751 * clean-up. Channels can be reset only if both 752 * host and device execution environments match 753 * and channels are in an ENABLED, STOPPED or 754 * SUSPENDED state. 755 * @mhi_dev: Device associated with the channels 756 */ 757 void mhi_unprepare_from_transfer(struct mhi_device *mhi_dev); 758 759 /** 760 * mhi_queue_buf - Send or receive raw buffers from client device over MHI 761 * channel 762 * @mhi_dev: Device associated with the channels 763 * @dir: DMA direction for the channel 764 * @buf: Buffer for holding the data 765 * @len: Buffer length 766 * @mflags: MHI transfer flags used for the transfer 767 */ 768 int mhi_queue_buf(struct mhi_device *mhi_dev, enum dma_data_direction dir, 769 void *buf, size_t len, enum mhi_flags mflags); 770 771 /** 772 * mhi_queue_skb - Send or receive SKBs from client device over MHI channel 773 * @mhi_dev: Device associated with the channels 774 * @dir: DMA direction for the channel 775 * @skb: Buffer for holding SKBs 776 * @len: Buffer length 777 * @mflags: MHI transfer flags used for the transfer 778 */ 779 int mhi_queue_skb(struct mhi_device *mhi_dev, enum dma_data_direction dir, 780 struct sk_buff *skb, size_t len, enum mhi_flags mflags); 781 782 /** 783 * mhi_queue_is_full - Determine whether queueing new elements is possible 784 * @mhi_dev: Device associated with the channels 785 * @dir: DMA direction for the channel 786 */ 787 bool mhi_queue_is_full(struct mhi_device *mhi_dev, enum dma_data_direction dir); 788 789 /** 790 * mhi_get_channel_doorbell_offset - Get the channel doorbell offset 791 * @mhi_cntrl: MHI controller 792 * @chdb_offset: Read channel doorbell offset 793 * 794 * Return: 0 if the read succeeds, a negative error code otherwise 795 */ 796 int mhi_get_channel_doorbell_offset(struct mhi_controller *mhi_cntrl, u32 *chdb_offset); 797 798 #endif /* _MHI_H_ */ 799