1 // SPDX-License-Identifier: GPL-2.0 2 // Copyright (C) 2019 Arm Ltd. 3 4 #include <linux/arm-smccc.h> 5 #include <linux/kvm_host.h> 6 7 #include <asm/kvm_emulate.h> 8 9 #include <kvm/arm_hypercalls.h> 10 #include <kvm/arm_psci.h> 11 12 #define KVM_ARM_SMCCC_STD_FEATURES \ 13 GENMASK(KVM_REG_ARM_STD_BMAP_BIT_COUNT - 1, 0) 14 #define KVM_ARM_SMCCC_STD_HYP_FEATURES \ 15 GENMASK(KVM_REG_ARM_STD_HYP_BMAP_BIT_COUNT - 1, 0) 16 #define KVM_ARM_SMCCC_VENDOR_HYP_FEATURES \ 17 GENMASK(KVM_REG_ARM_VENDOR_HYP_BMAP_BIT_COUNT - 1, 0) 18 #define KVM_ARM_SMCCC_VENDOR_HYP_FEATURES_2 \ 19 GENMASK(KVM_REG_ARM_VENDOR_HYP_BMAP_2_BIT_COUNT - 1, 0) 20 21 static void kvm_ptp_get_time(struct kvm_vcpu *vcpu, u64 *val) 22 { 23 struct system_time_snapshot systime_snapshot; 24 u64 cycles = ~0UL; 25 u32 feature; 26 27 /* 28 * system time and counter value must captured at the same 29 * time to keep consistency and precision. 30 */ 31 ktime_get_snapshot_id(CLOCK_REALTIME, &systime_snapshot); 32 33 /* 34 * This is only valid if the current clocksource is the 35 * architected counter, as this is the only one the guest 36 * can see. 37 */ 38 if (systime_snapshot.cs_id != CSID_ARM_ARCH_COUNTER) 39 return; 40 41 /* 42 * The guest selects one of the two reference counters 43 * (virtual or physical) with the first argument of the SMCCC 44 * call. In case the identifier is not supported, error out. 45 */ 46 feature = smccc_get_arg1(vcpu); 47 switch (feature) { 48 case KVM_PTP_VIRT_COUNTER: 49 cycles = systime_snapshot.cycles - vcpu->kvm->arch.timer_data.voffset; 50 break; 51 case KVM_PTP_PHYS_COUNTER: 52 cycles = systime_snapshot.cycles - vcpu->kvm->arch.timer_data.poffset; 53 break; 54 default: 55 return; 56 } 57 58 /* 59 * This relies on the top bit of val[0] never being set for 60 * valid values of system time, because that is *really* far 61 * in the future (about 292 years from 1970, and at that stage 62 * nobody will give a damn about it). 63 */ 64 val[0] = upper_32_bits(systime_snapshot.systime); 65 val[1] = lower_32_bits(systime_snapshot.systime); 66 val[2] = upper_32_bits(cycles); 67 val[3] = lower_32_bits(cycles); 68 } 69 70 static bool kvm_smccc_default_allowed(u32 func_id) 71 { 72 switch (func_id) { 73 /* 74 * List of function-ids that are not gated with the bitmapped 75 * feature firmware registers, and are to be allowed for 76 * servicing the call by default. 77 */ 78 case ARM_SMCCC_VERSION_FUNC_ID: 79 case ARM_SMCCC_ARCH_FEATURES_FUNC_ID: 80 return true; 81 default: 82 /* PSCI 0.2 and up is in the 0:0x1f range */ 83 if (ARM_SMCCC_OWNER_NUM(func_id) == ARM_SMCCC_OWNER_STANDARD && 84 ARM_SMCCC_FUNC_NUM(func_id) <= 0x1f) 85 return true; 86 87 /* 88 * KVM's PSCI 0.1 doesn't comply with SMCCC, and has 89 * its own function-id base and range 90 */ 91 if (func_id >= KVM_PSCI_FN(0) && func_id <= KVM_PSCI_FN(3)) 92 return true; 93 94 return false; 95 } 96 } 97 98 static bool kvm_smccc_test_fw_bmap(struct kvm_vcpu *vcpu, u32 func_id) 99 { 100 struct kvm_smccc_features *smccc_feat = &vcpu->kvm->arch.smccc_feat; 101 102 switch (func_id) { 103 case ARM_SMCCC_TRNG_VERSION: 104 case ARM_SMCCC_TRNG_FEATURES: 105 case ARM_SMCCC_TRNG_GET_UUID: 106 case ARM_SMCCC_TRNG_RND32: 107 case ARM_SMCCC_TRNG_RND64: 108 return test_bit(KVM_REG_ARM_STD_BIT_TRNG_V1_0, 109 &smccc_feat->std_bmap); 110 case ARM_SMCCC_HV_PV_TIME_FEATURES: 111 case ARM_SMCCC_HV_PV_TIME_ST: 112 return test_bit(KVM_REG_ARM_STD_HYP_BIT_PV_TIME, 113 &smccc_feat->std_hyp_bmap); 114 case ARM_SMCCC_VENDOR_HYP_KVM_FEATURES_FUNC_ID: 115 case ARM_SMCCC_VENDOR_HYP_CALL_UID_FUNC_ID: 116 return test_bit(KVM_REG_ARM_VENDOR_HYP_BIT_FUNC_FEAT, 117 &smccc_feat->vendor_hyp_bmap); 118 case ARM_SMCCC_VENDOR_HYP_KVM_PTP_FUNC_ID: 119 return test_bit(KVM_REG_ARM_VENDOR_HYP_BIT_PTP, 120 &smccc_feat->vendor_hyp_bmap); 121 default: 122 return false; 123 } 124 } 125 126 #define SMC32_ARCH_RANGE_BEGIN ARM_SMCCC_VERSION_FUNC_ID 127 #define SMC32_ARCH_RANGE_END ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ 128 ARM_SMCCC_SMC_32, \ 129 0, ARM_SMCCC_FUNC_MASK) 130 131 #define SMC64_ARCH_RANGE_BEGIN ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ 132 ARM_SMCCC_SMC_64, \ 133 0, 0) 134 #define SMC64_ARCH_RANGE_END ARM_SMCCC_CALL_VAL(ARM_SMCCC_FAST_CALL, \ 135 ARM_SMCCC_SMC_64, \ 136 0, ARM_SMCCC_FUNC_MASK) 137 138 static int kvm_smccc_filter_insert_reserved(struct kvm *kvm) 139 { 140 int r; 141 142 /* 143 * Prevent userspace from handling any SMCCC calls in the architecture 144 * range, avoiding the risk of misrepresenting Spectre mitigation status 145 * to the guest. 146 */ 147 r = mtree_insert_range(&kvm->arch.smccc_filter, 148 SMC32_ARCH_RANGE_BEGIN, SMC32_ARCH_RANGE_END, 149 xa_mk_value(KVM_SMCCC_FILTER_HANDLE), 150 GFP_KERNEL_ACCOUNT); 151 if (r) 152 goto out_destroy; 153 154 r = mtree_insert_range(&kvm->arch.smccc_filter, 155 SMC64_ARCH_RANGE_BEGIN, SMC64_ARCH_RANGE_END, 156 xa_mk_value(KVM_SMCCC_FILTER_HANDLE), 157 GFP_KERNEL_ACCOUNT); 158 if (r) 159 goto out_destroy; 160 161 return 0; 162 out_destroy: 163 mtree_destroy(&kvm->arch.smccc_filter); 164 return r; 165 } 166 167 static bool kvm_smccc_filter_configured(struct kvm *kvm) 168 { 169 return !mtree_empty(&kvm->arch.smccc_filter); 170 } 171 172 static int kvm_smccc_set_filter(struct kvm *kvm, struct kvm_smccc_filter __user *uaddr) 173 { 174 const void *zero_page = page_to_virt(ZERO_PAGE(0)); 175 struct kvm_smccc_filter filter; 176 u32 start, end; 177 int r; 178 179 if (copy_from_user(&filter, uaddr, sizeof(filter))) 180 return -EFAULT; 181 182 if (memcmp(filter.pad, zero_page, sizeof(filter.pad))) 183 return -EINVAL; 184 185 start = filter.base; 186 end = start + filter.nr_functions - 1; 187 188 if (!filter.nr_functions || end < start || 189 filter.action >= NR_SMCCC_FILTER_ACTIONS) 190 return -EINVAL; 191 192 mutex_lock(&kvm->arch.config_lock); 193 194 if (kvm_vm_has_ran_once(kvm)) { 195 r = -EBUSY; 196 goto out_unlock; 197 } 198 199 if (!kvm_smccc_filter_configured(kvm)) { 200 r = kvm_smccc_filter_insert_reserved(kvm); 201 if (r) { 202 WARN_ON_ONCE(r != -ENOMEM); 203 goto out_unlock; 204 } 205 } 206 207 r = mtree_insert_range(&kvm->arch.smccc_filter, start, end, 208 xa_mk_value(filter.action), GFP_KERNEL_ACCOUNT); 209 out_unlock: 210 mutex_unlock(&kvm->arch.config_lock); 211 return r; 212 } 213 214 static u8 kvm_smccc_filter_get_action(struct kvm *kvm, u32 func_id) 215 { 216 unsigned long idx = func_id; 217 void *val; 218 219 if (!kvm_smccc_filter_configured(kvm)) 220 return KVM_SMCCC_FILTER_HANDLE; 221 222 /* 223 * But where's the error handling, you say? 224 * 225 * mt_find() returns NULL if no entry was found, which just so happens 226 * to match KVM_SMCCC_FILTER_HANDLE. 227 */ 228 val = mt_find(&kvm->arch.smccc_filter, &idx, idx); 229 return xa_to_value(val); 230 } 231 232 static u8 kvm_smccc_get_action(struct kvm_vcpu *vcpu, u32 func_id) 233 { 234 /* 235 * Intervening actions in the SMCCC filter take precedence over the 236 * pseudo-firmware register bitmaps. 237 */ 238 u8 action = kvm_smccc_filter_get_action(vcpu->kvm, func_id); 239 if (action != KVM_SMCCC_FILTER_HANDLE) 240 return action; 241 242 if (kvm_smccc_test_fw_bmap(vcpu, func_id) || 243 kvm_smccc_default_allowed(func_id)) 244 return KVM_SMCCC_FILTER_HANDLE; 245 246 return KVM_SMCCC_FILTER_DENY; 247 } 248 249 static void kvm_prepare_hypercall_exit(struct kvm_vcpu *vcpu, u32 func_id) 250 { 251 u8 ec = ESR_ELx_EC(kvm_vcpu_get_esr(vcpu)); 252 struct kvm_run *run = vcpu->run; 253 u64 flags = 0; 254 255 if (ec == ESR_ELx_EC_SMC32 || ec == ESR_ELx_EC_SMC64) 256 flags |= KVM_HYPERCALL_EXIT_SMC; 257 258 if (!kvm_vcpu_trap_il_is32bit(vcpu)) 259 flags |= KVM_HYPERCALL_EXIT_16BIT; 260 261 run->exit_reason = KVM_EXIT_HYPERCALL; 262 run->hypercall = (typeof(run->hypercall)) { 263 .nr = func_id, 264 .flags = flags, 265 }; 266 } 267 268 int kvm_smccc_call_handler(struct kvm_vcpu *vcpu) 269 { 270 struct kvm_smccc_features *smccc_feat = &vcpu->kvm->arch.smccc_feat; 271 u32 func_id = smccc_get_function(vcpu); 272 u64 val[4] = {SMCCC_RET_NOT_SUPPORTED}; 273 u32 feature; 274 u8 action; 275 gpa_t gpa; 276 uuid_t uuid; 277 278 action = kvm_smccc_get_action(vcpu, func_id); 279 switch (action) { 280 case KVM_SMCCC_FILTER_HANDLE: 281 break; 282 case KVM_SMCCC_FILTER_DENY: 283 goto out; 284 case KVM_SMCCC_FILTER_FWD_TO_USER: 285 kvm_prepare_hypercall_exit(vcpu, func_id); 286 return 0; 287 default: 288 WARN_RATELIMIT(1, "Unhandled SMCCC filter action: %d\n", action); 289 goto out; 290 } 291 292 switch (func_id) { 293 case ARM_SMCCC_VERSION_FUNC_ID: 294 val[0] = ARM_SMCCC_VERSION_1_1; 295 break; 296 case ARM_SMCCC_ARCH_FEATURES_FUNC_ID: 297 feature = smccc_get_arg1(vcpu); 298 switch (feature) { 299 case ARM_SMCCC_VERSION_FUNC_ID: 300 case ARM_SMCCC_ARCH_FEATURES_FUNC_ID: 301 val[0] = SMCCC_RET_SUCCESS; 302 break; 303 case ARM_SMCCC_ARCH_WORKAROUND_1: 304 switch (arm64_get_spectre_v2_state()) { 305 case SPECTRE_VULNERABLE: 306 break; 307 case SPECTRE_MITIGATED: 308 val[0] = SMCCC_RET_SUCCESS; 309 break; 310 case SPECTRE_UNAFFECTED: 311 val[0] = SMCCC_ARCH_WORKAROUND_RET_UNAFFECTED; 312 break; 313 } 314 break; 315 case ARM_SMCCC_ARCH_WORKAROUND_2: 316 switch (arm64_get_spectre_v4_state()) { 317 case SPECTRE_VULNERABLE: 318 break; 319 case SPECTRE_MITIGATED: 320 /* 321 * SSBS everywhere: Indicate no firmware 322 * support, as the SSBS support will be 323 * indicated to the guest and the default is 324 * safe. 325 * 326 * Otherwise, expose a permanent mitigation 327 * to the guest, and hide SSBS so that the 328 * guest stays protected. 329 */ 330 if (kvm_has_feat(vcpu->kvm, ID_AA64PFR1_EL1, SSBS, IMP)) 331 break; 332 fallthrough; 333 case SPECTRE_UNAFFECTED: 334 val[0] = SMCCC_RET_NOT_REQUIRED; 335 break; 336 } 337 break; 338 case ARM_SMCCC_ARCH_WORKAROUND_3: 339 switch (arm64_get_spectre_bhb_state()) { 340 case SPECTRE_VULNERABLE: 341 break; 342 case SPECTRE_MITIGATED: 343 val[0] = SMCCC_RET_SUCCESS; 344 break; 345 case SPECTRE_UNAFFECTED: 346 val[0] = SMCCC_ARCH_WORKAROUND_RET_UNAFFECTED; 347 break; 348 } 349 break; 350 case ARM_SMCCC_HV_PV_TIME_FEATURES: 351 if (test_bit(KVM_REG_ARM_STD_HYP_BIT_PV_TIME, 352 &smccc_feat->std_hyp_bmap)) 353 val[0] = SMCCC_RET_SUCCESS; 354 break; 355 } 356 break; 357 case ARM_SMCCC_HV_PV_TIME_FEATURES: 358 val[0] = kvm_hypercall_pv_features(vcpu); 359 break; 360 case ARM_SMCCC_HV_PV_TIME_ST: 361 gpa = kvm_init_stolen_time(vcpu); 362 if (gpa != INVALID_GPA) 363 val[0] = gpa; 364 break; 365 case ARM_SMCCC_VENDOR_HYP_CALL_UID_FUNC_ID: 366 uuid = ARM_SMCCC_VENDOR_HYP_UID_KVM; 367 val[0] = smccc_uuid_to_reg(&uuid, 0); 368 val[1] = smccc_uuid_to_reg(&uuid, 1); 369 val[2] = smccc_uuid_to_reg(&uuid, 2); 370 val[3] = smccc_uuid_to_reg(&uuid, 3); 371 break; 372 case ARM_SMCCC_VENDOR_HYP_KVM_FEATURES_FUNC_ID: 373 val[0] = smccc_feat->vendor_hyp_bmap; 374 /* Function numbers 2-63 are reserved for pKVM for now */ 375 val[2] = smccc_feat->vendor_hyp_bmap_2; 376 break; 377 case ARM_SMCCC_VENDOR_HYP_KVM_PTP_FUNC_ID: 378 kvm_ptp_get_time(vcpu, val); 379 break; 380 case ARM_SMCCC_TRNG_VERSION: 381 case ARM_SMCCC_TRNG_FEATURES: 382 case ARM_SMCCC_TRNG_GET_UUID: 383 case ARM_SMCCC_TRNG_RND32: 384 case ARM_SMCCC_TRNG_RND64: 385 return kvm_trng_call(vcpu); 386 default: 387 return kvm_psci_call(vcpu); 388 } 389 390 out: 391 smccc_set_retval(vcpu, val[0], val[1], val[2], val[3]); 392 return 1; 393 } 394 395 static const u64 kvm_arm_fw_reg_ids[] = { 396 KVM_REG_ARM_PSCI_VERSION, 397 KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1, 398 KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2, 399 KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3, 400 KVM_REG_ARM_STD_BMAP, 401 KVM_REG_ARM_STD_HYP_BMAP, 402 KVM_REG_ARM_VENDOR_HYP_BMAP, 403 KVM_REG_ARM_VENDOR_HYP_BMAP_2, 404 }; 405 406 void kvm_arm_init_hypercalls(struct kvm *kvm) 407 { 408 struct kvm_smccc_features *smccc_feat = &kvm->arch.smccc_feat; 409 410 smccc_feat->std_bmap = KVM_ARM_SMCCC_STD_FEATURES; 411 smccc_feat->std_hyp_bmap = KVM_ARM_SMCCC_STD_HYP_FEATURES; 412 smccc_feat->vendor_hyp_bmap = KVM_ARM_SMCCC_VENDOR_HYP_FEATURES; 413 414 mt_init(&kvm->arch.smccc_filter); 415 } 416 417 void kvm_arm_teardown_hypercalls(struct kvm *kvm) 418 { 419 mtree_destroy(&kvm->arch.smccc_filter); 420 } 421 422 int kvm_arm_get_fw_num_regs(struct kvm_vcpu *vcpu) 423 { 424 return ARRAY_SIZE(kvm_arm_fw_reg_ids); 425 } 426 427 int kvm_arm_copy_fw_reg_indices(struct kvm_vcpu *vcpu, u64 __user *uindices) 428 { 429 int i; 430 431 for (i = 0; i < ARRAY_SIZE(kvm_arm_fw_reg_ids); i++) { 432 if (put_user(kvm_arm_fw_reg_ids[i], uindices++)) 433 return -EFAULT; 434 } 435 436 return 0; 437 } 438 439 #define KVM_REG_FEATURE_LEVEL_MASK GENMASK(3, 0) 440 441 /* 442 * Convert the workaround level into an easy-to-compare number, where higher 443 * values mean better protection. 444 */ 445 static int get_kernel_wa_level(struct kvm_vcpu *vcpu, u64 regid) 446 { 447 switch (regid) { 448 case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1: 449 switch (arm64_get_spectre_v2_state()) { 450 case SPECTRE_VULNERABLE: 451 return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_NOT_AVAIL; 452 case SPECTRE_MITIGATED: 453 return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_AVAIL; 454 case SPECTRE_UNAFFECTED: 455 return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_NOT_REQUIRED; 456 } 457 return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1_NOT_AVAIL; 458 case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2: 459 switch (arm64_get_spectre_v4_state()) { 460 case SPECTRE_MITIGATED: 461 /* 462 * As for the hypercall discovery, we pretend we 463 * don't have any FW mitigation if SSBS is there at 464 * all times. 465 */ 466 if (kvm_has_feat(vcpu->kvm, ID_AA64PFR1_EL1, SSBS, IMP)) 467 return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_AVAIL; 468 fallthrough; 469 case SPECTRE_UNAFFECTED: 470 return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_REQUIRED; 471 case SPECTRE_VULNERABLE: 472 return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_AVAIL; 473 } 474 break; 475 case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3: 476 switch (arm64_get_spectre_bhb_state()) { 477 case SPECTRE_VULNERABLE: 478 return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3_NOT_AVAIL; 479 case SPECTRE_MITIGATED: 480 return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3_AVAIL; 481 case SPECTRE_UNAFFECTED: 482 return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3_NOT_REQUIRED; 483 } 484 return KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3_NOT_AVAIL; 485 } 486 487 return -EINVAL; 488 } 489 490 int kvm_arm_get_fw_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg) 491 { 492 struct kvm_smccc_features *smccc_feat = &vcpu->kvm->arch.smccc_feat; 493 void __user *uaddr = (void __user *)(long)reg->addr; 494 u64 val; 495 496 switch (reg->id) { 497 case KVM_REG_ARM_PSCI_VERSION: 498 val = kvm_psci_version(vcpu); 499 break; 500 case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1: 501 case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2: 502 case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3: 503 val = get_kernel_wa_level(vcpu, reg->id) & KVM_REG_FEATURE_LEVEL_MASK; 504 break; 505 case KVM_REG_ARM_STD_BMAP: 506 val = READ_ONCE(smccc_feat->std_bmap); 507 break; 508 case KVM_REG_ARM_STD_HYP_BMAP: 509 val = READ_ONCE(smccc_feat->std_hyp_bmap); 510 break; 511 case KVM_REG_ARM_VENDOR_HYP_BMAP: 512 val = READ_ONCE(smccc_feat->vendor_hyp_bmap); 513 break; 514 case KVM_REG_ARM_VENDOR_HYP_BMAP_2: 515 val = READ_ONCE(smccc_feat->vendor_hyp_bmap_2); 516 break; 517 default: 518 return -ENOENT; 519 } 520 521 if (copy_to_user(uaddr, &val, KVM_REG_SIZE(reg->id))) 522 return -EFAULT; 523 524 return 0; 525 } 526 527 static int kvm_arm_set_fw_reg_bmap(struct kvm_vcpu *vcpu, u64 reg_id, u64 val) 528 { 529 int ret = 0; 530 struct kvm *kvm = vcpu->kvm; 531 struct kvm_smccc_features *smccc_feat = &kvm->arch.smccc_feat; 532 unsigned long *fw_reg_bmap, fw_reg_features; 533 534 switch (reg_id) { 535 case KVM_REG_ARM_STD_BMAP: 536 fw_reg_bmap = &smccc_feat->std_bmap; 537 fw_reg_features = KVM_ARM_SMCCC_STD_FEATURES; 538 break; 539 case KVM_REG_ARM_STD_HYP_BMAP: 540 fw_reg_bmap = &smccc_feat->std_hyp_bmap; 541 fw_reg_features = KVM_ARM_SMCCC_STD_HYP_FEATURES; 542 break; 543 case KVM_REG_ARM_VENDOR_HYP_BMAP: 544 fw_reg_bmap = &smccc_feat->vendor_hyp_bmap; 545 fw_reg_features = KVM_ARM_SMCCC_VENDOR_HYP_FEATURES; 546 break; 547 case KVM_REG_ARM_VENDOR_HYP_BMAP_2: 548 fw_reg_bmap = &smccc_feat->vendor_hyp_bmap_2; 549 fw_reg_features = KVM_ARM_SMCCC_VENDOR_HYP_FEATURES_2; 550 break; 551 default: 552 return -ENOENT; 553 } 554 555 /* Check for unsupported bit */ 556 if (val & ~fw_reg_features) 557 return -EINVAL; 558 559 mutex_lock(&kvm->arch.config_lock); 560 561 if (kvm_vm_has_ran_once(kvm) && val != *fw_reg_bmap) { 562 ret = -EBUSY; 563 goto out; 564 } 565 566 WRITE_ONCE(*fw_reg_bmap, val); 567 out: 568 mutex_unlock(&kvm->arch.config_lock); 569 return ret; 570 } 571 572 int kvm_arm_set_fw_reg(struct kvm_vcpu *vcpu, const struct kvm_one_reg *reg) 573 { 574 void __user *uaddr = (void __user *)(long)reg->addr; 575 u64 val; 576 int wa_level; 577 578 if (KVM_REG_SIZE(reg->id) != sizeof(val)) 579 return -ENOENT; 580 if (copy_from_user(&val, uaddr, KVM_REG_SIZE(reg->id))) 581 return -EFAULT; 582 583 switch (reg->id) { 584 case KVM_REG_ARM_PSCI_VERSION: 585 { 586 bool wants_02; 587 588 wants_02 = vcpu_has_feature(vcpu, KVM_ARM_VCPU_PSCI_0_2); 589 590 /* 591 * EL2 advertises PSCI 1.1; the host handles the forwarded calls 592 * by this version. 593 */ 594 if (vcpu_is_protected(vcpu) && val < KVM_ARM_PSCI_1_1) 595 return -EINVAL; 596 597 switch (val) { 598 case KVM_ARM_PSCI_0_1: 599 if (wants_02) 600 return -EINVAL; 601 vcpu->kvm->arch.psci_version = val; 602 return 0; 603 case KVM_ARM_PSCI_0_2: 604 case KVM_ARM_PSCI_1_0: 605 case KVM_ARM_PSCI_1_1: 606 case KVM_ARM_PSCI_1_2: 607 case KVM_ARM_PSCI_1_3: 608 if (!wants_02) 609 return -EINVAL; 610 vcpu->kvm->arch.psci_version = val; 611 return 0; 612 } 613 break; 614 } 615 616 case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_1: 617 case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_3: 618 if (val & ~KVM_REG_FEATURE_LEVEL_MASK) 619 return -EINVAL; 620 621 if (get_kernel_wa_level(vcpu, reg->id) < val) 622 return -EINVAL; 623 624 return 0; 625 626 case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2: 627 if (val & ~(KVM_REG_FEATURE_LEVEL_MASK | 628 KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_ENABLED)) 629 return -EINVAL; 630 631 /* The enabled bit must not be set unless the level is AVAIL. */ 632 if ((val & KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_ENABLED) && 633 (val & KVM_REG_FEATURE_LEVEL_MASK) != KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_AVAIL) 634 return -EINVAL; 635 636 /* 637 * Map all the possible incoming states to the only two we 638 * really want to deal with. 639 */ 640 switch (val & KVM_REG_FEATURE_LEVEL_MASK) { 641 case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_AVAIL: 642 case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_UNKNOWN: 643 wa_level = KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_AVAIL; 644 break; 645 case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_AVAIL: 646 case KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_REQUIRED: 647 wa_level = KVM_REG_ARM_SMCCC_ARCH_WORKAROUND_2_NOT_REQUIRED; 648 break; 649 default: 650 return -EINVAL; 651 } 652 653 /* 654 * We can deal with NOT_AVAIL on NOT_REQUIRED, but not the 655 * other way around. 656 */ 657 if (get_kernel_wa_level(vcpu, reg->id) < wa_level) 658 return -EINVAL; 659 660 return 0; 661 case KVM_REG_ARM_STD_BMAP: 662 case KVM_REG_ARM_STD_HYP_BMAP: 663 case KVM_REG_ARM_VENDOR_HYP_BMAP: 664 case KVM_REG_ARM_VENDOR_HYP_BMAP_2: 665 return kvm_arm_set_fw_reg_bmap(vcpu, reg->id, val); 666 default: 667 return -ENOENT; 668 } 669 670 return -EINVAL; 671 } 672 673 int kvm_vm_smccc_has_attr(struct kvm *kvm, struct kvm_device_attr *attr) 674 { 675 switch (attr->attr) { 676 case KVM_ARM_VM_SMCCC_FILTER: 677 return 0; 678 default: 679 return -ENXIO; 680 } 681 } 682 683 int kvm_vm_smccc_set_attr(struct kvm *kvm, struct kvm_device_attr *attr) 684 { 685 void __user *uaddr = (void __user *)attr->addr; 686 687 switch (attr->attr) { 688 case KVM_ARM_VM_SMCCC_FILTER: 689 return kvm_smccc_set_filter(kvm, uaddr); 690 default: 691 return -ENXIO; 692 } 693 } 694